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0cb3fcd72c
To get rid of port expanders, the free GPIOs of ab8500 can be used. There are 42 GPIO pins. Out of which 16 are interrupt capable.This patch implements 16 virtual IRQ mapped to 16 interrupt capable AB8500 GPIOs. Signed-off-by: Bibek Basu <bibek.basu@stericsson.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> [Renamed header file as per MFD structure] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
208 lines
6.1 KiB
C
208 lines
6.1 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License Terms: GNU General Public License v2
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* Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
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*/
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#ifndef MFD_AB8500_H
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#define MFD_AB8500_H
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#include <linux/device.h>
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/*
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* AB8500 bank addresses
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*/
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#define AB8500_SYS_CTRL1_BLOCK 0x1
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#define AB8500_SYS_CTRL2_BLOCK 0x2
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#define AB8500_REGU_CTRL1 0x3
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#define AB8500_REGU_CTRL2 0x4
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#define AB8500_USB 0x5
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#define AB8500_TVOUT 0x6
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#define AB8500_DBI 0x7
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#define AB8500_ECI_AV_ACC 0x8
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#define AB8500_RESERVED 0x9
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#define AB8500_GPADC 0xA
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#define AB8500_CHARGER 0xB
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#define AB8500_GAS_GAUGE 0xC
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#define AB8500_AUDIO 0xD
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#define AB8500_INTERRUPT 0xE
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#define AB8500_RTC 0xF
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#define AB8500_MISC 0x10
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#define AB8500_DEBUG 0x12
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#define AB8500_PROD_TEST 0x13
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#define AB8500_OTP_EMUL 0x15
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/*
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* Interrupts
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*/
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#define AB8500_INT_MAIN_EXT_CH_NOT_OK 0
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#define AB8500_INT_UN_PLUG_TV_DET 1
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#define AB8500_INT_PLUG_TV_DET 2
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#define AB8500_INT_TEMP_WARM 3
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#define AB8500_INT_PON_KEY2DB_F 4
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#define AB8500_INT_PON_KEY2DB_R 5
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#define AB8500_INT_PON_KEY1DB_F 6
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#define AB8500_INT_PON_KEY1DB_R 7
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#define AB8500_INT_BATT_OVV 8
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#define AB8500_INT_MAIN_CH_UNPLUG_DET 10
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#define AB8500_INT_MAIN_CH_PLUG_DET 11
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#define AB8500_INT_USB_ID_DET_F 12
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#define AB8500_INT_USB_ID_DET_R 13
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#define AB8500_INT_VBUS_DET_F 14
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#define AB8500_INT_VBUS_DET_R 15
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#define AB8500_INT_VBUS_CH_DROP_END 16
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#define AB8500_INT_RTC_60S 17
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#define AB8500_INT_RTC_ALARM 18
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#define AB8500_INT_BAT_CTRL_INDB 20
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#define AB8500_INT_CH_WD_EXP 21
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#define AB8500_INT_VBUS_OVV 22
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#define AB8500_INT_MAIN_CH_DROP_END 23
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#define AB8500_INT_CCN_CONV_ACC 24
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#define AB8500_INT_INT_AUD 25
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#define AB8500_INT_CCEOC 26
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#define AB8500_INT_CC_INT_CALIB 27
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#define AB8500_INT_LOW_BAT_F 28
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#define AB8500_INT_LOW_BAT_R 29
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#define AB8500_INT_BUP_CHG_NOT_OK 30
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#define AB8500_INT_BUP_CHG_OK 31
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#define AB8500_INT_GP_HW_ADC_CONV_END 32
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#define AB8500_INT_ACC_DETECT_1DB_F 33
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#define AB8500_INT_ACC_DETECT_1DB_R 34
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#define AB8500_INT_ACC_DETECT_22DB_F 35
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#define AB8500_INT_ACC_DETECT_22DB_R 36
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#define AB8500_INT_ACC_DETECT_21DB_F 37
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#define AB8500_INT_ACC_DETECT_21DB_R 38
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#define AB8500_INT_GP_SW_ADC_CONV_END 39
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#define AB8500_INT_ACC_DETECT_1DB_F 33
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#define AB8500_INT_ACC_DETECT_1DB_R 34
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#define AB8500_INT_ACC_DETECT_22DB_F 35
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#define AB8500_INT_ACC_DETECT_22DB_R 36
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#define AB8500_INT_ACC_DETECT_21DB_F 37
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#define AB8500_INT_ACC_DETECT_21DB_R 38
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#define AB8500_INT_GP_SW_ADC_CONV_END 39
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#define AB8500_INT_GPIO6R 40
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#define AB8500_INT_GPIO7R 41
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#define AB8500_INT_GPIO8R 42
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#define AB8500_INT_GPIO9R 43
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#define AB8500_INT_GPIO10R 44
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#define AB8500_INT_GPIO11R 45
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#define AB8500_INT_GPIO12R 46
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#define AB8500_INT_GPIO13R 47
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#define AB8500_INT_GPIO24R 48
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#define AB8500_INT_GPIO25R 49
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#define AB8500_INT_GPIO36R 50
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#define AB8500_INT_GPIO37R 51
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#define AB8500_INT_GPIO38R 52
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#define AB8500_INT_GPIO39R 53
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#define AB8500_INT_GPIO40R 54
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#define AB8500_INT_GPIO41R 55
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#define AB8500_INT_GPIO6F 56
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#define AB8500_INT_GPIO7F 57
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#define AB8500_INT_GPIO8F 58
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#define AB8500_INT_GPIO9F 59
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#define AB8500_INT_GPIO10F 60
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#define AB8500_INT_GPIO11F 61
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#define AB8500_INT_GPIO12F 62
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#define AB8500_INT_GPIO13F 63
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#define AB8500_INT_GPIO24F 64
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#define AB8500_INT_GPIO25F 65
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#define AB8500_INT_GPIO36F 66
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#define AB8500_INT_GPIO37F 67
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#define AB8500_INT_GPIO38F 68
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#define AB8500_INT_GPIO39F 69
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#define AB8500_INT_GPIO40F 70
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#define AB8500_INT_GPIO41F 71
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#define AB8500_INT_ADP_SOURCE_ERROR 72
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#define AB8500_INT_ADP_SINK_ERROR 73
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#define AB8500_INT_ADP_PROBE_PLUG 74
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#define AB8500_INT_ADP_PROBE_UNPLUG 75
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#define AB8500_INT_ADP_SENSE_OFF 76
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#define AB8500_INT_USB_PHY_POWER_ERR 78
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#define AB8500_INT_USB_LINK_STATUS 79
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#define AB8500_INT_BTEMP_LOW 80
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#define AB8500_INT_BTEMP_LOW_MEDIUM 81
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#define AB8500_INT_BTEMP_MEDIUM_HIGH 82
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#define AB8500_INT_BTEMP_HIGH 83
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#define AB8500_INT_USB_CHARGER_NOT_OK 89
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#define AB8500_INT_ID_WAKEUP_R 90
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#define AB8500_INT_ID_DET_R1R 92
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#define AB8500_INT_ID_DET_R2R 93
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#define AB8500_INT_ID_DET_R3R 94
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#define AB8500_INT_ID_DET_R4R 95
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#define AB8500_INT_ID_WAKEUP_F 96
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#define AB8500_INT_ID_DET_R1F 98
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#define AB8500_INT_ID_DET_R2F 99
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#define AB8500_INT_ID_DET_R3F 100
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#define AB8500_INT_ID_DET_R4F 101
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#define AB8500_INT_USB_CHG_DET_DONE 102
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#define AB8500_INT_USB_CH_TH_PROT_F 104
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#define AB8500_INT_USB_CH_TH_PROT_R 105
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#define AB8500_INT_MAIN_CH_TH_PROT_F 106
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#define AB8500_INT_MAIN_CH_TH_PROT_R 107
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#define AB8500_INT_USB_CHARGER_NOT_OKF 111
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#define AB8500_NR_IRQS 112
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#define AB8500_NUM_IRQ_REGS 14
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/**
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* struct ab8500 - ab8500 internal structure
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* @dev: parent device
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* @lock: read/write operations lock
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* @irq_lock: genirq bus lock
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* @irq: irq line
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* @chip_id: chip revision id
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* @write: register write
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* @read: register read
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* @rx_buf: rx buf for SPI
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* @tx_buf: tx buf for SPI
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* @mask: cache of IRQ regs for bus lock
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* @oldmask: cache of previous IRQ regs for bus lock
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*/
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struct ab8500 {
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struct device *dev;
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struct mutex lock;
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struct mutex irq_lock;
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int irq_base;
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int irq;
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u8 chip_id;
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int (*write) (struct ab8500 *a8500, u16 addr, u8 data);
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int (*read) (struct ab8500 *a8500, u16 addr);
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unsigned long tx_buf[4];
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unsigned long rx_buf[4];
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u8 mask[AB8500_NUM_IRQ_REGS];
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u8 oldmask[AB8500_NUM_IRQ_REGS];
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};
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struct regulator_reg_init;
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struct regulator_init_data;
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struct ab8500_gpio_platform_data;
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/**
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* struct ab8500_platform_data - AB8500 platform data
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* @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
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* @init: board-specific initialization after detection of ab8500
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* @num_regulator_reg_init: number of regulator init registers
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* @regulator_reg_init: regulator init registers
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* @num_regulator: number of regulators
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* @regulator: machine-specific constraints for regulators
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*/
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struct ab8500_platform_data {
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int irq_base;
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void (*init) (struct ab8500 *);
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int num_regulator_reg_init;
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struct ab8500_regulator_reg_init *regulator_reg_init;
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int num_regulator;
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struct regulator_init_data *regulator;
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struct ab8500_gpio_platform_data *gpio;
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};
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extern int __devinit ab8500_init(struct ab8500 *ab8500);
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extern int __devexit ab8500_exit(struct ab8500 *ab8500);
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#endif /* MFD_AB8500_H */
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