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1646a6f352
Interrupts are normally generated by the event queues, moderated by timers. However, they may also be triggered by detection of a 'fatal' error condition (e.g. memory parity error) or by the host writing to certain CSR fields as part of a self-test. The IRQ level/index used for these on Falcon rev B0 and Siena is set by the KER_INT_LEVE_SEL field and cached by the driver in efx_nic::fatal_irq_level. Since this value is also relevant to self-tests rename the field to just 'irq_level'. Avoid unnecessary cache traffic by using a per-channel 'last_irq_cpu' field and only writing to the per-controller field when the interrupt matches efx_nic::irq_level. Remove the volatile qualifier and use ACCESS_ONCE in the places we read these fields. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
159 lines
6.1 KiB
C
159 lines
6.1 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2005-2006 Fen Systems Ltd.
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* Copyright 2006-2010 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef EFX_EFX_H
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#define EFX_EFX_H
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#include "net_driver.h"
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#include "filter.h"
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/* Solarstorm controllers use BAR 0 for I/O space and BAR 2(&3) for memory */
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#define EFX_MEM_BAR 2
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/* TX */
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extern int efx_probe_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_remove_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_init_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue);
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extern void efx_fini_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_release_tx_buffers(struct efx_tx_queue *tx_queue);
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extern netdev_tx_t
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efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
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extern netdev_tx_t
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efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb);
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extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
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extern int efx_setup_tc(struct net_device *net_dev, u8 num_tc);
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/* RX */
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extern int efx_probe_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_remove_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_init_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_rx_strategy(struct efx_channel *channel);
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extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue);
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extern void efx_rx_slow_fill(unsigned long context);
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extern void __efx_rx_packet(struct efx_channel *channel,
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struct efx_rx_buffer *rx_buf, bool checksummed);
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extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
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unsigned int len, bool checksummed, bool discard);
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extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue);
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#define EFX_MAX_DMAQ_SIZE 4096UL
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#define EFX_DEFAULT_DMAQ_SIZE 1024UL
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#define EFX_MIN_DMAQ_SIZE 512UL
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#define EFX_MAX_EVQ_SIZE 16384UL
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#define EFX_MIN_EVQ_SIZE 512UL
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/* The smallest [rt]xq_entries that the driver supports. Callers of
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* efx_wake_queue() assume that they can subsequently send at least one
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* skb. Falcon/A1 may require up to three descriptors per skb_frag. */
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#define EFX_MIN_RING_SIZE (roundup_pow_of_two(2 * 3 * MAX_SKB_FRAGS))
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/* Filters */
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extern int efx_probe_filters(struct efx_nic *efx);
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extern void efx_restore_filters(struct efx_nic *efx);
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extern void efx_remove_filters(struct efx_nic *efx);
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extern s32 efx_filter_insert_filter(struct efx_nic *efx,
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struct efx_filter_spec *spec,
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bool replace);
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extern int efx_filter_remove_id_safe(struct efx_nic *efx,
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enum efx_filter_priority priority,
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u32 filter_id);
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extern int efx_filter_get_filter_safe(struct efx_nic *efx,
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enum efx_filter_priority priority,
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u32 filter_id, struct efx_filter_spec *);
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extern void efx_filter_clear_rx(struct efx_nic *efx,
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enum efx_filter_priority priority);
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extern u32 efx_filter_count_rx_used(struct efx_nic *efx,
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enum efx_filter_priority priority);
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extern u32 efx_filter_get_rx_id_limit(struct efx_nic *efx);
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extern s32 efx_filter_get_rx_ids(struct efx_nic *efx,
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enum efx_filter_priority priority,
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u32 *buf, u32 size);
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#ifdef CONFIG_RFS_ACCEL
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extern int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
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u16 rxq_index, u32 flow_id);
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extern bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned quota);
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static inline void efx_filter_rfs_expire(struct efx_channel *channel)
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{
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if (channel->rfs_filters_added >= 60 &&
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__efx_filter_rfs_expire(channel->efx, 100))
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channel->rfs_filters_added -= 60;
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}
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#define efx_filter_rfs_enabled() 1
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#else
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static inline void efx_filter_rfs_expire(struct efx_channel *channel) {}
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#define efx_filter_rfs_enabled() 0
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#endif
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/* Channels */
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extern void efx_process_channel_now(struct efx_channel *channel);
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extern int
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efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries);
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/* Ports */
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extern int efx_reconfigure_port(struct efx_nic *efx);
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extern int __efx_reconfigure_port(struct efx_nic *efx);
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/* Ethtool support */
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extern const struct ethtool_ops efx_ethtool_ops;
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/* Reset handling */
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extern int efx_reset(struct efx_nic *efx, enum reset_type method);
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extern void efx_reset_down(struct efx_nic *efx, enum reset_type method);
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extern int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok);
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/* Global */
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extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
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extern int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
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unsigned int rx_usecs, bool rx_adaptive,
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bool rx_may_override_tx);
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extern void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
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unsigned int *rx_usecs, bool *rx_adaptive);
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/* Dummy PHY ops for PHY drivers */
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extern int efx_port_dummy_op_int(struct efx_nic *efx);
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extern void efx_port_dummy_op_void(struct efx_nic *efx);
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/* MTD */
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#ifdef CONFIG_SFC_MTD
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extern int efx_mtd_probe(struct efx_nic *efx);
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extern void efx_mtd_rename(struct efx_nic *efx);
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extern void efx_mtd_remove(struct efx_nic *efx);
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#else
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static inline int efx_mtd_probe(struct efx_nic *efx) { return 0; }
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static inline void efx_mtd_rename(struct efx_nic *efx) {}
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static inline void efx_mtd_remove(struct efx_nic *efx) {}
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#endif
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static inline void efx_schedule_channel(struct efx_channel *channel)
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{
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netif_vdbg(channel->efx, intr, channel->efx->net_dev,
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"channel %d scheduling NAPI poll on CPU%d\n",
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channel->channel, raw_smp_processor_id());
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channel->work_pending = true;
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napi_schedule(&channel->napi_str);
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}
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static inline void efx_schedule_channel_irq(struct efx_channel *channel)
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{
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channel->last_irq_cpu = raw_smp_processor_id();
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efx_schedule_channel(channel);
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}
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extern void efx_link_status_changed(struct efx_nic *efx);
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extern void efx_link_set_advertising(struct efx_nic *efx, u32);
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extern void efx_link_set_wanted_fc(struct efx_nic *efx, u8);
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#endif /* EFX_EFX_H */
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