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The main pll controller used to drive theC66x CorePacs, the switch fabric, and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and the NETCP modules) requires a PLL Controller to manage the various clock divisions, gating, and synchronization. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> [santosh.shilimkar@ti.com: Fixed the subject line] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
21 lines
607 B
Plaintext
21 lines
607 B
Plaintext
* Device tree bindings for Texas Instruments keystone pll controller
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The main pll controller used to drive theC66x CorePacs, the switch fabric,
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and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
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the NETCP modules) requires a PLL Controller to manage the various clock
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divisions, gating, and synchronization.
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Required properties:
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- compatible: "ti,keystone-pllctrl", "syscon"
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- reg: contains offset/length value for pll controller
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registers space.
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Example:
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pllctrl: pll-controller@0x02310000 {
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compatible = "ti,keystone-pllctrl", "syscon";
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reg = <0x02310000 0x200>;
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};
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