mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-23 04:34:11 +08:00
9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
26 lines
644 B
C
26 lines
644 B
C
/*
|
|
* include/asm-xtensa/tlb.h
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
* for more details.
|
|
*
|
|
* Copyright (C) 2001 - 2005 Tensilica Inc.
|
|
*/
|
|
|
|
#ifndef _XTENSA_TLB_H
|
|
#define _XTENSA_TLB_H
|
|
|
|
#define tlb_start_vma(tlb,vma) do { } while (0)
|
|
#define tlb_end_vma(tlb,vma) do { } while (0)
|
|
#define __tlb_remove_tlb_entry(tlb,pte,addr) do { } while (0)
|
|
|
|
#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
|
|
|
|
#include <asm-generic/tlb.h>
|
|
#include <asm/page.h>
|
|
|
|
#define __pte_free_tlb(tlb,pte) pte_free(pte)
|
|
|
|
#endif /* _XTENSA_TLB_H */
|