mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 07:34:06 +08:00
a0a53aa8c7
This patch allows the CPU to map the stolen vram segment directly rather than going through the PCI BAR. This significantly improves performance for certain workloads with a properly patched ddx. Use radeon.fastfb=1 to enable it (disabled by default). Currently only supported on RS690, but support for RS780/880 and newer APUs may be added eventually. Signed-off-by: Samuel Li <samuel.li@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
314 lines
21 KiB
C
314 lines
21 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#ifndef __RS690D_H__
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#define __RS690D_H__
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/* Registers */
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#define R_00001E_K8_FB_LOCATION 0x00001E
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#define R_00005F_MC_MISC_UMA_CNTL 0x00005F
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#define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF)
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#define R_000078_MC_INDEX 0x000078
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#define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0)
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#define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF)
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#define C_000078_MC_IND_ADDR 0xFFFFFE00
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#define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9)
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#define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1)
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#define C_000078_MC_IND_WR_EN 0xFFFFFDFF
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#define R_00007C_MC_DATA 0x00007C
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#define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0)
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#define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
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#define C_00007C_MC_DATA 0x00000000
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#define R_0000F8_CONFIG_MEMSIZE 0x0000F8
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#define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)
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#define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)
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#define C_0000F8_CONFIG_MEMSIZE 0x00000000
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#define R_000134_HDP_FB_LOCATION 0x000134
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#define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)
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#define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)
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#define C_000134_HDP_FB_START 0xFFFF0000
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#define R_0007C0_CP_STAT 0x0007C0
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#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
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#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
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#define C_0007C0_MRU_BUSY 0xFFFFFFFE
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#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
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#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
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#define C_0007C0_MWU_BUSY 0xFFFFFFFD
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#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
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#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
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#define C_0007C0_RSIU_BUSY 0xFFFFFFFB
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#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
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#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
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#define C_0007C0_RCIU_BUSY 0xFFFFFFF7
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#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
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#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
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#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
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#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
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#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
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#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
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#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
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#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
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#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
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#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
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#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
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#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
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#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
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#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
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#define C_0007C0_CSI_BUSY 0xFFFFDFFF
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#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
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#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
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#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
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#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
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#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
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#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
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#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
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#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
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#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
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#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
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#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
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#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
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#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
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#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
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#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
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#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
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#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
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#define C_0007C0_CP_BUSY 0x7FFFFFFF
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#define R_000E40_RBBM_STATUS 0x000E40
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#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
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#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
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#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
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#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
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#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
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#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
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#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
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#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
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#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
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#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
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#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
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#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
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#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
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#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
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#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
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#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
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#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
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#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
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#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
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#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
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#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
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#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
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#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
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#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
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#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
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#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
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#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
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#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
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#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
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#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
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#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
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#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
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#define C_000E40_E2_BUSY 0xFFFDFFFF
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#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
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#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
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#define C_000E40_RB2D_BUSY 0xFFFBFFFF
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#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
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#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
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#define C_000E40_RB3D_BUSY 0xFFF7FFFF
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#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
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#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
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#define C_000E40_VAP_BUSY 0xFFEFFFFF
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#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
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#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
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#define C_000E40_RE_BUSY 0xFFDFFFFF
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#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
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#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
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#define C_000E40_TAM_BUSY 0xFFBFFFFF
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#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
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#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
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#define C_000E40_TDM_BUSY 0xFF7FFFFF
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#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
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#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
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#define C_000E40_PB_BUSY 0xFEFFFFFF
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#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
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#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
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#define C_000E40_TIM_BUSY 0xFDFFFFFF
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#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
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#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
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#define C_000E40_GA_BUSY 0xFBFFFFFF
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#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
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#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
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#define C_000E40_CBA2D_BUSY 0xF7FFFFFF
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#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
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#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
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#define C_000E40_GUI_ACTIVE 0x7FFFFFFF
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#define R_006520_DC_LB_MEMORY_SPLIT 0x006520
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#define S_006520_DC_LB_MEMORY_SPLIT(x) (((x) & 0x3) << 0)
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#define G_006520_DC_LB_MEMORY_SPLIT(x) (((x) >> 0) & 0x3)
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#define C_006520_DC_LB_MEMORY_SPLIT 0xFFFFFFFC
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#define S_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) & 0x1) << 2)
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#define G_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) >> 2) & 0x1)
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#define C_006520_DC_LB_MEMORY_SPLIT_MODE 0xFFFFFFFB
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#define V_006520_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0
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#define V_006520_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1
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#define V_006520_DC_LB_MEMORY_SPLIT_D1_ONLY 2
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#define V_006520_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3
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#define S_006520_DC_LB_DISP1_END_ADR(x) (((x) & 0x7FF) << 4)
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#define G_006520_DC_LB_DISP1_END_ADR(x) (((x) >> 4) & 0x7FF)
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#define C_006520_DC_LB_DISP1_END_ADR 0xFFFF800F
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#define R_006548_D1MODE_PRIORITY_A_CNT 0x006548
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#define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
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#define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
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#define C_006548_D1MODE_PRIORITY_MARK_A 0xFFFF8000
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#define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
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#define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
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#define C_006548_D1MODE_PRIORITY_A_OFF 0xFFFEFFFF
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#define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
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#define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
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#define C_006548_D1MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
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#define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
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#define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
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#define C_006548_D1MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
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#define R_00654C_D1MODE_PRIORITY_B_CNT 0x00654C
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#define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
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#define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
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#define C_00654C_D1MODE_PRIORITY_MARK_B 0xFFFF8000
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#define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
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#define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
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#define C_00654C_D1MODE_PRIORITY_B_OFF 0xFFFEFFFF
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#define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
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#define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
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#define C_00654C_D1MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
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#define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
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#define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
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#define C_00654C_D1MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
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#define R_006C9C_DCP_CONTROL 0x006C9C
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#define R_006D48_D2MODE_PRIORITY_A_CNT 0x006D48
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#define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
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#define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
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#define C_006D48_D2MODE_PRIORITY_MARK_A 0xFFFF8000
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#define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
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#define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
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#define C_006D48_D2MODE_PRIORITY_A_OFF 0xFFFEFFFF
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#define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
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#define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
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#define C_006D48_D2MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
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#define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
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#define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
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#define C_006D48_D2MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
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#define R_006D4C_D2MODE_PRIORITY_B_CNT 0x006D4C
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#define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
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#define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
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#define C_006D4C_D2MODE_PRIORITY_MARK_B 0xFFFF8000
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#define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
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#define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
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#define C_006D4C_D2MODE_PRIORITY_B_OFF 0xFFFEFFFF
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#define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
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#define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
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#define C_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
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#define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
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#define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
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#define C_006D4C_D2MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
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#define R_006D58_LB_MAX_REQ_OUTSTANDING 0x006D58
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#define S_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 0)
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#define G_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) >> 0) & 0xF)
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#define C_006D58_LB_D1_MAX_REQ_OUTSTANDING 0xFFFFFFF0
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#define S_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 16)
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#define G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) >> 16) & 0xF)
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#define C_006D58_LB_D2_MAX_REQ_OUTSTANDING 0xFFF0FFFF
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#define R_000090_MC_SYSTEM_STATUS 0x000090
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#define S_000090_MC_SYSTEM_IDLE(x) (((x) & 0x1) << 0)
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#define G_000090_MC_SYSTEM_IDLE(x) (((x) >> 0) & 0x1)
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#define C_000090_MC_SYSTEM_IDLE 0xFFFFFFFE
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#define S_000090_MC_SEQUENCER_IDLE(x) (((x) & 0x1) << 1)
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#define G_000090_MC_SEQUENCER_IDLE(x) (((x) >> 1) & 0x1)
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#define C_000090_MC_SEQUENCER_IDLE 0xFFFFFFFD
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#define S_000090_MC_ARBITER_IDLE(x) (((x) & 0x1) << 2)
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#define G_000090_MC_ARBITER_IDLE(x) (((x) >> 2) & 0x1)
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#define C_000090_MC_ARBITER_IDLE 0xFFFFFFFB
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#define S_000090_MC_SELECT_PM(x) (((x) & 0x1) << 3)
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#define G_000090_MC_SELECT_PM(x) (((x) >> 3) & 0x1)
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#define C_000090_MC_SELECT_PM 0xFFFFFFF7
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#define S_000090_RESERVED4(x) (((x) & 0xF) << 4)
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#define G_000090_RESERVED4(x) (((x) >> 4) & 0xF)
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#define C_000090_RESERVED4 0xFFFFFF0F
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#define S_000090_RESERVED8(x) (((x) & 0xF) << 8)
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#define G_000090_RESERVED8(x) (((x) >> 8) & 0xF)
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#define C_000090_RESERVED8 0xFFFFF0FF
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#define S_000090_RESERVED12(x) (((x) & 0xF) << 12)
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#define G_000090_RESERVED12(x) (((x) >> 12) & 0xF)
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#define C_000090_RESERVED12 0xFFFF0FFF
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#define S_000090_MCA_INIT_EXECUTED(x) (((x) & 0x1) << 16)
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#define G_000090_MCA_INIT_EXECUTED(x) (((x) >> 16) & 0x1)
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#define C_000090_MCA_INIT_EXECUTED 0xFFFEFFFF
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#define S_000090_MCA_IDLE(x) (((x) & 0x1) << 17)
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#define G_000090_MCA_IDLE(x) (((x) >> 17) & 0x1)
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#define C_000090_MCA_IDLE 0xFFFDFFFF
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#define S_000090_MCA_SEQ_IDLE(x) (((x) & 0x1) << 18)
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#define G_000090_MCA_SEQ_IDLE(x) (((x) >> 18) & 0x1)
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#define C_000090_MCA_SEQ_IDLE 0xFFFBFFFF
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#define S_000090_MCA_ARB_IDLE(x) (((x) & 0x1) << 19)
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#define G_000090_MCA_ARB_IDLE(x) (((x) >> 19) & 0x1)
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#define C_000090_MCA_ARB_IDLE 0xFFF7FFFF
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#define S_000090_RESERVED20(x) (((x) & 0xFFF) << 20)
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#define G_000090_RESERVED20(x) (((x) >> 20) & 0xFFF)
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#define C_000090_RESERVED20 0x000FFFFF
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#define R_000100_MCCFG_FB_LOCATION 0x000100
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#define S_000100_MC_FB_START(x) (((x) & 0xFFFF) << 0)
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#define G_000100_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
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#define C_000100_MC_FB_START 0xFFFF0000
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#define S_000100_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
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#define G_000100_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
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#define C_000100_MC_FB_TOP 0x0000FFFF
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#define R_000104_MC_INIT_MISC_LAT_TIMER 0x000104
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#define S_000104_MC_CPR_INIT_LAT(x) (((x) & 0xF) << 0)
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#define G_000104_MC_CPR_INIT_LAT(x) (((x) >> 0) & 0xF)
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#define C_000104_MC_CPR_INIT_LAT 0xFFFFFFF0
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#define S_000104_MC_VF_INIT_LAT(x) (((x) & 0xF) << 4)
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#define G_000104_MC_VF_INIT_LAT(x) (((x) >> 4) & 0xF)
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#define C_000104_MC_VF_INIT_LAT 0xFFFFFF0F
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#define S_000104_MC_DISP0R_INIT_LAT(x) (((x) & 0xF) << 8)
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#define G_000104_MC_DISP0R_INIT_LAT(x) (((x) >> 8) & 0xF)
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#define C_000104_MC_DISP0R_INIT_LAT 0xFFFFF0FF
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#define S_000104_MC_DISP1R_INIT_LAT(x) (((x) & 0xF) << 12)
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#define G_000104_MC_DISP1R_INIT_LAT(x) (((x) >> 12) & 0xF)
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#define C_000104_MC_DISP1R_INIT_LAT 0xFFFF0FFF
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#define S_000104_MC_FIXED_INIT_LAT(x) (((x) & 0xF) << 16)
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#define G_000104_MC_FIXED_INIT_LAT(x) (((x) >> 16) & 0xF)
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#define C_000104_MC_FIXED_INIT_LAT 0xFFF0FFFF
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#define S_000104_MC_E2R_INIT_LAT(x) (((x) & 0xF) << 20)
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#define G_000104_MC_E2R_INIT_LAT(x) (((x) >> 20) & 0xF)
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#define C_000104_MC_E2R_INIT_LAT 0xFF0FFFFF
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#define S_000104_SAME_PAGE_PRIO(x) (((x) & 0xF) << 24)
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#define G_000104_SAME_PAGE_PRIO(x) (((x) >> 24) & 0xF)
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#define C_000104_SAME_PAGE_PRIO 0xF0FFFFFF
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#define S_000104_MC_GLOBW_INIT_LAT(x) (((x) & 0xF) << 28)
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#define G_000104_MC_GLOBW_INIT_LAT(x) (((x) >> 28) & 0xF)
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#define C_000104_MC_GLOBW_INIT_LAT 0x0FFFFFFF
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#endif
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