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218d72a77b
These codecs have a variable number of I/O lines each of which is individually selectable to a wide range of possible functions. The functionality is slightly different from the traditional muxed GPIO since most of the functions can be mapped to any pin (and even the same function to multiple pins). Most pins have a dedicated "alternate" function that is only available on that pin. The alternate functions are usually a group of signals, though it is not always necessary to enable the full group, depending on the alternate function and how it is to be used. The mapping between alternate functions and GPIO pins varies between codecs depending on the number of alternate functions and available pins. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
60 lines
2.5 KiB
C
60 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Pinctrl for Cirrus Logic CS47L85
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*
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* Copyright (C) 2016-2017 Cirrus Logic
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2.
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*/
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#include <linux/err.h>
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#include <linux/mfd/madera/core.h>
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#include "pinctrl-madera.h"
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/*
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* The alt func groups are the most commonly used functions we place these at
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* the lower function indexes for convenience, and the less commonly used gpio
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* functions at higher indexes.
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*
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* To stay consistent with the datasheet the function names are the same as
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* the group names for that function's pins
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*
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* Note - all 1 less than in datasheet because these are zero-indexed
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*/
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static const unsigned int cs47l85_mif1_pins[] = { 8, 9 };
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static const unsigned int cs47l85_mif2_pins[] = { 10, 11 };
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static const unsigned int cs47l85_mif3_pins[] = { 12, 13 };
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static const unsigned int cs47l85_aif1_pins[] = { 14, 15, 16, 17 };
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static const unsigned int cs47l85_aif2_pins[] = { 18, 19, 20, 21 };
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static const unsigned int cs47l85_aif3_pins[] = { 22, 23, 24, 25 };
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static const unsigned int cs47l85_aif4_pins[] = { 26, 27, 28, 29 };
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static const unsigned int cs47l85_dmic4_pins[] = { 30, 31 };
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static const unsigned int cs47l85_dmic5_pins[] = { 32, 33 };
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static const unsigned int cs47l85_dmic6_pins[] = { 34, 35 };
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static const unsigned int cs47l85_spk1_pins[] = { 36, 38 };
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static const unsigned int cs47l85_spk2_pins[] = { 37, 39 };
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static const struct madera_pin_groups cs47l85_pin_groups[] = {
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{ "aif1", cs47l85_aif1_pins, ARRAY_SIZE(cs47l85_aif1_pins) },
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{ "aif2", cs47l85_aif2_pins, ARRAY_SIZE(cs47l85_aif2_pins) },
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{ "aif3", cs47l85_aif3_pins, ARRAY_SIZE(cs47l85_aif3_pins) },
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{ "aif4", cs47l85_aif4_pins, ARRAY_SIZE(cs47l85_aif4_pins) },
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{ "mif1", cs47l85_mif1_pins, ARRAY_SIZE(cs47l85_mif1_pins) },
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{ "mif2", cs47l85_mif2_pins, ARRAY_SIZE(cs47l85_mif2_pins) },
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{ "mif3", cs47l85_mif3_pins, ARRAY_SIZE(cs47l85_mif3_pins) },
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{ "dmic4", cs47l85_dmic4_pins, ARRAY_SIZE(cs47l85_dmic4_pins) },
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{ "dmic5", cs47l85_dmic5_pins, ARRAY_SIZE(cs47l85_dmic5_pins) },
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{ "dmic6", cs47l85_dmic6_pins, ARRAY_SIZE(cs47l85_dmic6_pins) },
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{ "pdmspk1", cs47l85_spk1_pins, ARRAY_SIZE(cs47l85_spk1_pins) },
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{ "pdmspk2", cs47l85_spk2_pins, ARRAY_SIZE(cs47l85_spk2_pins) },
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};
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const struct madera_pin_chip cs47l85_pin_chip = {
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.n_pins = CS47L85_NUM_GPIOS,
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.pin_groups = cs47l85_pin_groups,
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.n_pin_groups = ARRAY_SIZE(cs47l85_pin_groups),
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};
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