mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-26 14:14:01 +08:00
f45913fde0
We have a handy macro to replace open coded __cpuc_flush_dcache_area(() and outer_clean_range() sequences. Let's use it. No functional change. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
117 lines
2.5 KiB
C
117 lines
2.5 KiB
C
/*
|
|
* arch/arm/mach-sti/platsmp.c
|
|
*
|
|
* Copyright (C) 2013 STMicroelectronics (R&D) Limited.
|
|
* http://www.st.com
|
|
*
|
|
* Cloned from linux/arch/arm/mach-vexpress/platsmp.c
|
|
*
|
|
* Copyright (C) 2002 ARM Ltd.
|
|
* All Rights Reserved
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include <linux/init.h>
|
|
#include <linux/errno.h>
|
|
#include <linux/delay.h>
|
|
#include <linux/smp.h>
|
|
#include <linux/io.h>
|
|
#include <linux/of.h>
|
|
#include <linux/of_address.h>
|
|
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/smp_plat.h>
|
|
#include <asm/smp_scu.h>
|
|
|
|
#include "smp.h"
|
|
|
|
static void write_pen_release(int val)
|
|
{
|
|
pen_release = val;
|
|
smp_wmb();
|
|
sync_cache_w(&pen_release);
|
|
}
|
|
|
|
static DEFINE_SPINLOCK(boot_lock);
|
|
|
|
void sti_secondary_init(unsigned int cpu)
|
|
{
|
|
trace_hardirqs_off();
|
|
|
|
/*
|
|
* let the primary processor know we're out of the
|
|
* pen, then head off into the C entry point
|
|
*/
|
|
write_pen_release(-1);
|
|
|
|
/*
|
|
* Synchronise with the boot thread.
|
|
*/
|
|
spin_lock(&boot_lock);
|
|
spin_unlock(&boot_lock);
|
|
}
|
|
|
|
int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|
{
|
|
unsigned long timeout;
|
|
|
|
/*
|
|
* set synchronisation state between this boot processor
|
|
* and the secondary one
|
|
*/
|
|
spin_lock(&boot_lock);
|
|
|
|
/*
|
|
* The secondary processor is waiting to be released from
|
|
* the holding pen - release it, then wait for it to flag
|
|
* that it has been released by resetting pen_release.
|
|
*
|
|
* Note that "pen_release" is the hardware CPU ID, whereas
|
|
* "cpu" is Linux's internal ID.
|
|
*/
|
|
write_pen_release(cpu_logical_map(cpu));
|
|
|
|
/*
|
|
* Send the secondary CPU a soft interrupt, thereby causing
|
|
* it to jump to the secondary entrypoint.
|
|
*/
|
|
arch_send_wakeup_ipi_mask(cpumask_of(cpu));
|
|
|
|
timeout = jiffies + (1 * HZ);
|
|
while (time_before(jiffies, timeout)) {
|
|
smp_rmb();
|
|
if (pen_release == -1)
|
|
break;
|
|
|
|
udelay(10);
|
|
}
|
|
|
|
/*
|
|
* now the secondary core is starting up let it run its
|
|
* calibrations, then wait for it to finish
|
|
*/
|
|
spin_unlock(&boot_lock);
|
|
|
|
return pen_release != -1 ? -ENOSYS : 0;
|
|
}
|
|
|
|
void __init sti_smp_prepare_cpus(unsigned int max_cpus)
|
|
{
|
|
void __iomem *scu_base = NULL;
|
|
struct device_node *np = of_find_compatible_node(
|
|
NULL, NULL, "arm,cortex-a9-scu");
|
|
if (np) {
|
|
scu_base = of_iomap(np, 0);
|
|
scu_enable(scu_base);
|
|
of_node_put(np);
|
|
}
|
|
}
|
|
|
|
struct smp_operations __initdata sti_smp_ops = {
|
|
.smp_prepare_cpus = sti_smp_prepare_cpus,
|
|
.smp_secondary_init = sti_secondary_init,
|
|
.smp_boot_secondary = sti_boot_secondary,
|
|
};
|