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9569dae75f
Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
61 lines
1.6 KiB
C
61 lines
1.6 KiB
C
/*
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* arch/arm/mach-orion5x/include/mach/irqs.h
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*
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* IRQ definitions for Orion SoC
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*
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* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/*
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* Orion Main Interrupt Controller
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*/
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#define IRQ_ORION5X_BRIDGE 0
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#define IRQ_ORION5X_DOORBELL_H2C 1
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#define IRQ_ORION5X_DOORBELL_C2H 2
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#define IRQ_ORION5X_UART0 3
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#define IRQ_ORION5X_UART1 4
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#define IRQ_ORION5X_I2C 5
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#define IRQ_ORION5X_GPIO_0_7 6
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#define IRQ_ORION5X_GPIO_8_15 7
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#define IRQ_ORION5X_GPIO_16_23 8
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#define IRQ_ORION5X_GPIO_24_31 9
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#define IRQ_ORION5X_PCIE0_ERR 10
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#define IRQ_ORION5X_PCIE0_INT 11
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#define IRQ_ORION5X_USB1_CTRL 12
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#define IRQ_ORION5X_DEV_BUS_ERR 14
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#define IRQ_ORION5X_PCI_ERR 15
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#define IRQ_ORION5X_USB_BR_ERR 16
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#define IRQ_ORION5X_USB0_CTRL 17
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#define IRQ_ORION5X_ETH_RX 18
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#define IRQ_ORION5X_ETH_TX 19
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#define IRQ_ORION5X_ETH_MISC 20
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#define IRQ_ORION5X_ETH_SUM 21
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#define IRQ_ORION5X_ETH_ERR 22
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#define IRQ_ORION5X_IDMA_ERR 23
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#define IRQ_ORION5X_IDMA_0 24
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#define IRQ_ORION5X_IDMA_1 25
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#define IRQ_ORION5X_IDMA_2 26
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#define IRQ_ORION5X_IDMA_3 27
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#define IRQ_ORION5X_CESA 28
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#define IRQ_ORION5X_SATA 29
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#define IRQ_ORION5X_XOR0 30
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#define IRQ_ORION5X_XOR1 31
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/*
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* Orion General Purpose Pins
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*/
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#define IRQ_ORION5X_GPIO_START 32
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#define NR_GPIO_IRQS 32
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#define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
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#endif
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