mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-26 22:24:09 +08:00
1574cf6cb4
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
317 lines
8.1 KiB
C
317 lines
8.1 KiB
C
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#include <linux/kernel.h>
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#include <linux/ide.h>
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/*
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* Conventional PIO operations for ATA devices
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*/
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static u8 ide_inb(unsigned long port)
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{
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return (u8) inb(port);
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}
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static void ide_outb(u8 val, unsigned long port)
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{
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outb(val, port);
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}
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/*
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* MMIO operations, typically used for SATA controllers
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*/
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static u8 ide_mm_inb(unsigned long port)
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{
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return (u8) readb((void __iomem *) port);
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}
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static void ide_mm_outb(u8 value, unsigned long port)
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{
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writeb(value, (void __iomem *) port);
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}
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void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
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else
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outb(cmd, hwif->io_ports.command_addr);
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}
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EXPORT_SYMBOL_GPL(ide_exec_command);
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u8 ide_read_status(ide_hwif_t *hwif)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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return readb((void __iomem *)hwif->io_ports.status_addr);
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else
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return inb(hwif->io_ports.status_addr);
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}
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EXPORT_SYMBOL_GPL(ide_read_status);
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u8 ide_read_altstatus(ide_hwif_t *hwif)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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return readb((void __iomem *)hwif->io_ports.ctl_addr);
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else
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return inb(hwif->io_ports.ctl_addr);
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}
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EXPORT_SYMBOL_GPL(ide_read_altstatus);
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void ide_set_irq(ide_hwif_t *hwif, int on)
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{
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u8 ctl = ATA_DEVCTL_OBS;
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if (on == 4) { /* hack for SRST */
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ctl |= 4;
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on &= ~4;
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}
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ctl |= on ? 0 : 2;
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
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else
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outb(ctl, hwif->io_ports.ctl_addr);
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}
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EXPORT_SYMBOL_GPL(ide_set_irq);
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void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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struct ide_taskfile *tf = &task->tf;
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void (*tf_outb)(u8 addr, unsigned long port);
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
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if (mmio)
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tf_outb = ide_mm_outb;
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else
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tf_outb = ide_outb;
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if (task->tf_flags & IDE_TFLAG_FLAGGED)
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HIHI = 0xFF;
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if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
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u16 data = (tf->hob_data << 8) | tf->data;
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if (mmio)
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writew(data, (void __iomem *)io_ports->data_addr);
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else
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outw(data, io_ports->data_addr);
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}
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
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tf_outb(tf->hob_feature, io_ports->feature_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
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tf_outb(tf->hob_nsect, io_ports->nsect_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
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tf_outb(tf->hob_lbal, io_ports->lbal_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
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tf_outb(tf->hob_lbam, io_ports->lbam_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
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tf_outb(tf->hob_lbah, io_ports->lbah_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
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tf_outb(tf->feature, io_ports->feature_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
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tf_outb(tf->nsect, io_ports->nsect_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
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tf_outb(tf->lbal, io_ports->lbal_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
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tf_outb(tf->lbam, io_ports->lbam_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
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tf_outb(tf->lbah, io_ports->lbah_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
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tf_outb((tf->device & HIHI) | drive->select,
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io_ports->device_addr);
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}
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EXPORT_SYMBOL_GPL(ide_tf_load);
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void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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struct ide_taskfile *tf = &task->tf;
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void (*tf_outb)(u8 addr, unsigned long port);
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u8 (*tf_inb)(unsigned long port);
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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if (mmio) {
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tf_outb = ide_mm_outb;
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tf_inb = ide_mm_inb;
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} else {
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tf_outb = ide_outb;
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tf_inb = ide_inb;
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}
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if (task->tf_flags & IDE_TFLAG_IN_DATA) {
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u16 data;
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if (mmio)
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data = readw((void __iomem *)io_ports->data_addr);
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else
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data = inw(io_ports->data_addr);
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tf->data = data & 0xff;
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tf->hob_data = (data >> 8) & 0xff;
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}
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/* be sure we're looking at the low order bits */
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tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
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if (task->tf_flags & IDE_TFLAG_IN_FEATURE)
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tf->feature = tf_inb(io_ports->feature_addr);
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if (task->tf_flags & IDE_TFLAG_IN_NSECT)
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tf->nsect = tf_inb(io_ports->nsect_addr);
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if (task->tf_flags & IDE_TFLAG_IN_LBAL)
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tf->lbal = tf_inb(io_ports->lbal_addr);
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if (task->tf_flags & IDE_TFLAG_IN_LBAM)
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tf->lbam = tf_inb(io_ports->lbam_addr);
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if (task->tf_flags & IDE_TFLAG_IN_LBAH)
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tf->lbah = tf_inb(io_ports->lbah_addr);
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if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
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tf->device = tf_inb(io_ports->device_addr);
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if (task->tf_flags & IDE_TFLAG_LBA48) {
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tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
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if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
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tf->hob_feature = tf_inb(io_ports->feature_addr);
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if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
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tf->hob_nsect = tf_inb(io_ports->nsect_addr);
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if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
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tf->hob_lbal = tf_inb(io_ports->lbal_addr);
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if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
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tf->hob_lbam = tf_inb(io_ports->lbam_addr);
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if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
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tf->hob_lbah = tf_inb(io_ports->lbah_addr);
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}
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}
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EXPORT_SYMBOL_GPL(ide_tf_read);
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/*
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* Some localbus EIDE interfaces require a special access sequence
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* when using 32-bit I/O instructions to transfer data. We call this
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* the "vlb_sync" sequence, which consists of three successive reads
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* of the sector count register location, with interrupts disabled
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* to ensure that the reads all happen together.
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*/
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static void ata_vlb_sync(unsigned long port)
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{
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(void)inb(port);
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(void)inb(port);
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(void)inb(port);
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}
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/*
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* This is used for most PIO data transfers *from* the IDE interface
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*
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* These routines will round up any request for an odd number of bytes,
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* so if an odd len is specified, be sure that there's at least one
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* extra byte allocated for the buffer.
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*/
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void ide_input_data(ide_drive_t *drive, struct request *rq, void *buf,
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unsigned int len)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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unsigned long data_addr = io_ports->data_addr;
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u8 io_32bit = drive->io_32bit;
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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len++;
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if (io_32bit) {
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unsigned long uninitialized_var(flags);
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if ((io_32bit & 2) && !mmio) {
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local_irq_save(flags);
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ata_vlb_sync(io_ports->nsect_addr);
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}
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if (mmio)
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__ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
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else
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insl(data_addr, buf, len / 4);
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if ((io_32bit & 2) && !mmio)
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local_irq_restore(flags);
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if ((len & 3) >= 2) {
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if (mmio)
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__ide_mm_insw((void __iomem *)data_addr,
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(u8 *)buf + (len & ~3), 1);
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else
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insw(data_addr, (u8 *)buf + (len & ~3), 1);
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}
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} else {
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if (mmio)
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__ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
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else
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insw(data_addr, buf, len / 2);
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}
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}
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EXPORT_SYMBOL_GPL(ide_input_data);
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/*
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* This is used for most PIO data transfers *to* the IDE interface
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*/
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void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf,
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unsigned int len)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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unsigned long data_addr = io_ports->data_addr;
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u8 io_32bit = drive->io_32bit;
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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len++;
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if (io_32bit) {
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unsigned long uninitialized_var(flags);
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if ((io_32bit & 2) && !mmio) {
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local_irq_save(flags);
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ata_vlb_sync(io_ports->nsect_addr);
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}
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if (mmio)
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__ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
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else
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outsl(data_addr, buf, len / 4);
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if ((io_32bit & 2) && !mmio)
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local_irq_restore(flags);
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if ((len & 3) >= 2) {
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if (mmio)
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__ide_mm_outsw((void __iomem *)data_addr,
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(u8 *)buf + (len & ~3), 1);
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else
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outsw(data_addr, (u8 *)buf + (len & ~3), 1);
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}
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} else {
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if (mmio)
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__ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
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else
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outsw(data_addr, buf, len / 2);
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}
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}
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EXPORT_SYMBOL_GPL(ide_output_data);
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const struct ide_tp_ops default_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.set_irq = ide_set_irq,
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.tf_load = ide_tf_load,
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.tf_read = ide_tf_read,
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.input_data = ide_input_data,
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.output_data = ide_output_data,
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};
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