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0a5709b2dc
Rationalise hardware.h include. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
117 lines
3.9 KiB
C
117 lines
3.9 KiB
C
/*
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* linux/include/asm-arm/arch-imxads/irqs.h
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*
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* Copyright (C) 1999 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ARM_IRQS_H__
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#define __ARM_IRQS_H__
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/* Use the imx definitions */
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#include <asm/hardware.h>
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/*
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* IMX Interrupt numbers
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*
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*/
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#define INT_SOFTINT 0
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#define CSI_INT 6
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#define DSPA_MAC_INT 7
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#define DSPA_INT 8
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#define COMP_INT 9
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#define MSHC_XINT 10
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#define GPIO_INT_PORTA 11
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#define GPIO_INT_PORTB 12
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#define GPIO_INT_PORTC 13
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#define LCDC_INT 14
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#define SIM_INT 15
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#define SIM_DATA_INT 16
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#define RTC_INT 17
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#define RTC_SAMINT 18
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#define UART2_MINT_PFERR 19
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#define UART2_MINT_RTS 20
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#define UART2_MINT_DTR 21
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#define UART2_MINT_UARTC 22
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#define UART2_MINT_TX 23
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#define UART2_MINT_RX 24
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#define UART1_MINT_PFERR 25
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#define UART1_MINT_RTS 26
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#define UART1_MINT_DTR 27
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#define UART1_MINT_UARTC 28
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#define UART1_MINT_TX 29
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#define UART1_MINT_RX 30
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#define VOICE_DAC_INT 31
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#define VOICE_ADC_INT 32
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#define PEN_DATA_INT 33
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#define PWM_INT 34
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#define SDHC_INT 35
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#define I2C_INT 39
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#define CSPI_INT 41
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#define SSI_TX_INT 42
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#define SSI_TX_ERR_INT 43
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#define SSI_RX_INT 44
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#define SSI_RX_ERR_INT 45
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#define TOUCH_INT 46
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#define USBD_INT0 47
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#define USBD_INT1 48
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#define USBD_INT2 49
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#define USBD_INT3 50
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#define USBD_INT4 51
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#define USBD_INT5 52
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#define USBD_INT6 53
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#define BTSYS_INT 55
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#define BTTIM_INT 56
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#define BTWUI_INT 57
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#define TIM2_INT 58
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#define TIM1_INT 59
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#define DMA_ERR 60
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#define DMA_INT 61
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#define GPIO_INT_PORTD 62
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#define IMX_IRQS (64)
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/* note: the IMX has four gpio ports (A-D), but only
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* the following pins are connected to the outside
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* world:
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*
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* PORT A: bits 0-31
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* PORT B: bits 8-31
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* PORT C: bits 3-17
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* PORT D: bits 6-31
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*
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* We map these interrupts straight on. As a result we have
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* several holes in the interrupt mapping. We do this for two
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* reasons:
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* - mapping the interrupts without holes would get
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* far more complicated
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* - Motorola could well decide to bring some processor
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* with more pins connected
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*/
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#define IRQ_GPIOA(x) (IMX_IRQS + x)
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#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x)
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#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x)
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#define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x)
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/* decode irq number to use with IMR(x), ISR(x) and friends */
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#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5)
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#define NR_IRQS (IRQ_GPIOD(32) + 1)
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#define IRQ_GPIO(x)
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#endif
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