mirror of
https://github.com/edk2-porting/linux-next.git
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e5680c4de3
These regulator_ops variables should never change, make them const. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
478 lines
16 KiB
C
478 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Regulator Driver for Freescale MC13783 PMIC
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//
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// Copyright 2010 Yong Shen <yong.shen@linaro.org>
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// Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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// Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
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#include <linux/mfd/mc13783.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/driver.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include "mc13xxx.h"
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#define MC13783_REG_SWITCHERS0 24
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/* Enable does not exist for SW1A */
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#define MC13783_REG_SWITCHERS0_SW1AEN 0
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#define MC13783_REG_SWITCHERS0_SW1AVSEL 0
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#define MC13783_REG_SWITCHERS0_SW1AVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS1 25
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/* Enable does not exist for SW1B */
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#define MC13783_REG_SWITCHERS1_SW1BEN 0
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#define MC13783_REG_SWITCHERS1_SW1BVSEL 0
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#define MC13783_REG_SWITCHERS1_SW1BVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS2 26
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/* Enable does not exist for SW2A */
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#define MC13783_REG_SWITCHERS2_SW2AEN 0
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#define MC13783_REG_SWITCHERS2_SW2AVSEL 0
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#define MC13783_REG_SWITCHERS2_SW2AVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS3 27
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/* Enable does not exist for SW2B */
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#define MC13783_REG_SWITCHERS3_SW2BEN 0
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#define MC13783_REG_SWITCHERS3_SW2BVSEL 0
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#define MC13783_REG_SWITCHERS3_SW2BVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS5 29
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#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
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#define MC13783_REG_SWITCHERS5_SW3VSEL 18
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#define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
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#define MC13783_REG_REGULATORSETTING0 30
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#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
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#define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
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#define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
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#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
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#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
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#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
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#define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
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#define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
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#define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
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#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
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#define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
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#define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
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#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
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#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
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#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
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#define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
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#define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
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#define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
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#define MC13783_REG_REGULATORSETTING1 31
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#define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
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#define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
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#define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
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#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
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#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
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#define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
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#define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
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#define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
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#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
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#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
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#define MC13783_REG_REGULATORMODE0 32
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#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
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#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
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#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
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#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
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#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
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#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
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#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
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#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
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#define MC13783_REG_REGULATORMODE1 33
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#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
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#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
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#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
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#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
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#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
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#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
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#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
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#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
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#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
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#define MC13783_REG_POWERMISC 34
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#define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
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#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
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#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
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#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
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#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
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#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
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#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
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/* Voltage Values */
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static const int mc13783_sw1x_val[] = {
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900000, 925000, 950000, 975000,
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1000000, 1025000, 1050000, 1075000,
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1100000, 1125000, 1150000, 1175000,
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1200000, 1225000, 1250000, 1275000,
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1300000, 1325000, 1350000, 1375000,
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1400000, 1425000, 1450000, 1475000,
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1500000, 1525000, 1550000, 1575000,
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1600000, 1625000, 1650000, 1675000,
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1700000, 1700000, 1700000, 1700000,
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1800000, 1800000, 1800000, 1800000,
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1850000, 1850000, 1850000, 1850000,
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2000000, 2000000, 2000000, 2000000,
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2100000, 2100000, 2100000, 2100000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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};
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static const int mc13783_sw2x_val[] = {
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900000, 925000, 950000, 975000,
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1000000, 1025000, 1050000, 1075000,
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1100000, 1125000, 1150000, 1175000,
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1200000, 1225000, 1250000, 1275000,
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1300000, 1325000, 1350000, 1375000,
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1400000, 1425000, 1450000, 1475000,
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1500000, 1525000, 1550000, 1575000,
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1600000, 1625000, 1650000, 1675000,
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1700000, 1700000, 1700000, 1700000,
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1800000, 1800000, 1800000, 1800000,
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1900000, 1900000, 1900000, 1900000,
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2000000, 2000000, 2000000, 2000000,
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2100000, 2100000, 2100000, 2100000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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};
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static const unsigned int mc13783_sw3_val[] = {
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5000000, 5000000, 5000000, 5500000,
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};
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static const unsigned int mc13783_vaudio_val[] = {
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2775000,
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};
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static const unsigned int mc13783_viohi_val[] = {
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2775000,
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};
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static const unsigned int mc13783_violo_val[] = {
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1200000, 1300000, 1500000, 1800000,
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};
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static const unsigned int mc13783_vdig_val[] = {
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1200000, 1300000, 1500000, 1800000,
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};
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static const unsigned int mc13783_vgen_val[] = {
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1200000, 1300000, 1500000, 1800000,
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1100000, 2000000, 2775000, 2400000,
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};
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static const unsigned int mc13783_vrfdig_val[] = {
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1200000, 1500000, 1800000, 1875000,
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};
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static const unsigned int mc13783_vrfref_val[] = {
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2475000, 2600000, 2700000, 2775000,
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};
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static const unsigned int mc13783_vrfcp_val[] = {
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2700000, 2775000,
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};
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static const unsigned int mc13783_vsim_val[] = {
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1800000, 2900000, 3000000,
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};
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static const unsigned int mc13783_vesim_val[] = {
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1800000, 2900000,
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};
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static const unsigned int mc13783_vcam_val[] = {
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1500000, 1800000, 2500000, 2550000,
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2600000, 2750000, 2800000, 3000000,
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};
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static const unsigned int mc13783_vrfbg_val[] = {
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1250000,
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};
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static const unsigned int mc13783_vvib_val[] = {
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1300000, 1800000, 2000000, 3000000,
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};
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static const unsigned int mc13783_vmmc_val[] = {
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1600000, 1800000, 2000000, 2600000,
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2700000, 2800000, 2900000, 3000000,
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};
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static const unsigned int mc13783_vrf_val[] = {
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1500000, 1875000, 2700000, 2775000,
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};
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static const unsigned int mc13783_gpo_val[] = {
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3100000,
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};
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static const unsigned int mc13783_pwgtdrv_val[] = {
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5500000,
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};
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static const struct regulator_ops mc13783_gpo_regulator_ops;
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#define MC13783_DEFINE(prefix, name, node, reg, vsel_reg, voltages) \
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MC13xxx_DEFINE(MC13783_REG_, name, node, reg, vsel_reg, voltages, \
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mc13xxx_regulator_ops)
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#define MC13783_FIXED_DEFINE(prefix, name, node, reg, voltages) \
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MC13xxx_FIXED_DEFINE(MC13783_REG_, name, node, reg, voltages, \
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mc13xxx_fixed_regulator_ops)
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#define MC13783_GPO_DEFINE(prefix, name, node, reg, voltages) \
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MC13xxx_GPO_DEFINE(MC13783_REG_, name, node, reg, voltages, \
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mc13783_gpo_regulator_ops)
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#define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \
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MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages)
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#define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \
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MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages)
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static struct mc13xxx_regulator mc13783_regulators[] = {
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MC13783_DEFINE_SW(SW1A, sw1a, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val),
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MC13783_DEFINE_SW(SW1B, sw1b, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val),
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MC13783_DEFINE_SW(SW2A, sw2a, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val),
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MC13783_DEFINE_SW(SW2B, sw2b, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val),
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MC13783_DEFINE_SW(SW3, sw3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
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MC13783_FIXED_DEFINE(REG, VAUDIO, vaudio, REGULATORMODE0, mc13783_vaudio_val),
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MC13783_FIXED_DEFINE(REG, VIOHI, viohi, REGULATORMODE0, mc13783_viohi_val),
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MC13783_DEFINE_REGU(VIOLO, violo, REGULATORMODE0, REGULATORSETTING0,
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mc13783_violo_val),
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MC13783_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0,
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mc13783_vdig_val),
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MC13783_DEFINE_REGU(VGEN, vgen, REGULATORMODE0, REGULATORSETTING0,
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mc13783_vgen_val),
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MC13783_DEFINE_REGU(VRFDIG, vrfdig, REGULATORMODE0, REGULATORSETTING0,
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mc13783_vrfdig_val),
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MC13783_DEFINE_REGU(VRFREF, vrfref, REGULATORMODE0, REGULATORSETTING0,
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mc13783_vrfref_val),
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MC13783_DEFINE_REGU(VRFCP, vrfcp, REGULATORMODE0, REGULATORSETTING0,
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mc13783_vrfcp_val),
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MC13783_DEFINE_REGU(VSIM, vsim, REGULATORMODE1, REGULATORSETTING0,
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mc13783_vsim_val),
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MC13783_DEFINE_REGU(VESIM, vesim, REGULATORMODE1, REGULATORSETTING0,
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mc13783_vesim_val),
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MC13783_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0,
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mc13783_vcam_val),
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MC13783_FIXED_DEFINE(REG, VRFBG, vrfbg, REGULATORMODE1, mc13783_vrfbg_val),
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MC13783_DEFINE_REGU(VVIB, vvib, REGULATORMODE1, REGULATORSETTING1,
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mc13783_vvib_val),
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MC13783_DEFINE_REGU(VRF1, vrf1, REGULATORMODE1, REGULATORSETTING1,
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mc13783_vrf_val),
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MC13783_DEFINE_REGU(VRF2, vrf2, REGULATORMODE1, REGULATORSETTING1,
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mc13783_vrf_val),
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MC13783_DEFINE_REGU(VMMC1, vmmc1, REGULATORMODE1, REGULATORSETTING1,
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mc13783_vmmc_val),
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MC13783_DEFINE_REGU(VMMC2, vmmc2, REGULATORMODE1, REGULATORSETTING1,
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mc13783_vmmc_val),
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MC13783_GPO_DEFINE(REG, GPO1, gpo1, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REG, GPO2, gpo1, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REG, GPO3, gpo1, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REG, GPO4, gpo1, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REG, PWGT1SPI, pwgt1spi, POWERMISC, mc13783_pwgtdrv_val),
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MC13783_GPO_DEFINE(REG, PWGT2SPI, pwgt2spi, POWERMISC, mc13783_pwgtdrv_val),
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};
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static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
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u32 val)
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{
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struct mc13xxx *mc13783 = priv->mc13xxx;
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int ret;
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u32 valread;
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BUG_ON(val & ~mask);
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mc13xxx_lock(priv->mc13xxx);
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ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
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if (ret)
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goto out;
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/* Update the stored state for Power Gates. */
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priv->powermisc_pwgt_state =
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(priv->powermisc_pwgt_state & ~mask) | val;
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priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
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/* Construct the new register value */
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valread = (valread & ~mask) | val;
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/* Overwrite the PWGTxEN with the stored version */
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valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
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priv->powermisc_pwgt_state;
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ret = mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
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out:
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mc13xxx_unlock(priv->mc13xxx);
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return ret;
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}
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static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
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{
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struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
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struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
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int id = rdev_get_id(rdev);
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u32 en_val = mc13xxx_regulators[id].enable_bit;
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dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
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/* Power Gate enable value is 0 */
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if (id == MC13783_REG_PWGT1SPI ||
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id == MC13783_REG_PWGT2SPI)
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en_val = 0;
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return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
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en_val);
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}
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static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
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{
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struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
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struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
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int id = rdev_get_id(rdev);
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u32 dis_val = 0;
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dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
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/* Power Gate disable value is 1 */
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if (id == MC13783_REG_PWGT1SPI ||
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id == MC13783_REG_PWGT2SPI)
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dis_val = mc13xxx_regulators[id].enable_bit;
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return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
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dis_val);
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}
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static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
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{
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struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
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struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
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int ret, id = rdev_get_id(rdev);
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unsigned int val;
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mc13xxx_lock(priv->mc13xxx);
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ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
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mc13xxx_unlock(priv->mc13xxx);
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if (ret)
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return ret;
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/* Power Gates state is stored in powermisc_pwgt_state
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* where the meaning of bits is negated */
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val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
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(priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
|
|
|
|
return (val & mc13xxx_regulators[id].enable_bit) != 0;
|
|
}
|
|
|
|
static const struct regulator_ops mc13783_gpo_regulator_ops = {
|
|
.enable = mc13783_gpo_regulator_enable,
|
|
.disable = mc13783_gpo_regulator_disable,
|
|
.is_enabled = mc13783_gpo_regulator_is_enabled,
|
|
.list_voltage = regulator_list_voltage_table,
|
|
.set_voltage = mc13xxx_fixed_regulator_set_voltage,
|
|
};
|
|
|
|
static int mc13783_regulator_probe(struct platform_device *pdev)
|
|
{
|
|
struct mc13xxx_regulator_priv *priv;
|
|
struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
|
|
struct mc13xxx_regulator_platform_data *pdata =
|
|
dev_get_platdata(&pdev->dev);
|
|
struct mc13xxx_regulator_init_data *mc13xxx_data;
|
|
struct regulator_config config = { };
|
|
int i, num_regulators;
|
|
|
|
num_regulators = mc13xxx_get_num_regulators_dt(pdev);
|
|
|
|
if (num_regulators <= 0 && pdata)
|
|
num_regulators = pdata->num_regulators;
|
|
if (num_regulators <= 0)
|
|
return -EINVAL;
|
|
|
|
priv = devm_kzalloc(&pdev->dev,
|
|
struct_size(priv, regulators, num_regulators),
|
|
GFP_KERNEL);
|
|
if (!priv)
|
|
return -ENOMEM;
|
|
|
|
priv->num_regulators = num_regulators;
|
|
priv->mc13xxx_regulators = mc13783_regulators;
|
|
priv->mc13xxx = mc13783;
|
|
platform_set_drvdata(pdev, priv);
|
|
|
|
mc13xxx_data = mc13xxx_parse_regulators_dt(pdev, mc13783_regulators,
|
|
ARRAY_SIZE(mc13783_regulators));
|
|
|
|
for (i = 0; i < priv->num_regulators; i++) {
|
|
struct regulator_init_data *init_data;
|
|
struct regulator_desc *desc;
|
|
struct device_node *node = NULL;
|
|
int id;
|
|
|
|
if (mc13xxx_data) {
|
|
id = mc13xxx_data[i].id;
|
|
init_data = mc13xxx_data[i].init_data;
|
|
node = mc13xxx_data[i].node;
|
|
} else {
|
|
id = pdata->regulators[i].id;
|
|
init_data = pdata->regulators[i].init_data;
|
|
}
|
|
desc = &mc13783_regulators[id].desc;
|
|
|
|
config.dev = &pdev->dev;
|
|
config.init_data = init_data;
|
|
config.driver_data = priv;
|
|
config.of_node = node;
|
|
|
|
priv->regulators[i] = devm_regulator_register(&pdev->dev, desc,
|
|
&config);
|
|
if (IS_ERR(priv->regulators[i])) {
|
|
dev_err(&pdev->dev, "failed to register regulator %s\n",
|
|
mc13783_regulators[i].desc.name);
|
|
return PTR_ERR(priv->regulators[i]);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver mc13783_regulator_driver = {
|
|
.driver = {
|
|
.name = "mc13783-regulator",
|
|
},
|
|
.probe = mc13783_regulator_probe,
|
|
};
|
|
|
|
static int __init mc13783_regulator_init(void)
|
|
{
|
|
return platform_driver_register(&mc13783_regulator_driver);
|
|
}
|
|
subsys_initcall(mc13783_regulator_init);
|
|
|
|
static void __exit mc13783_regulator_exit(void)
|
|
{
|
|
platform_driver_unregister(&mc13783_regulator_driver);
|
|
}
|
|
module_exit(mc13783_regulator_exit);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
|
|
MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
|
|
MODULE_ALIAS("platform:mc13783-regulator");
|