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153f1d84ab
The following devices/functionalities were added: * Main and secondary UARTs. * i2c and the pcf8563 device. * Ethernet. * NAND. * The BP1 button. * The LED. * Watchdog * SD. Cc: Eric Bénard <eric@eukrea.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
82 lines
2.1 KiB
Plaintext
82 lines
2.1 KiB
Plaintext
/*
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* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "imx35.dtsi"
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/ {
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model = "Eukrea CPUIMX35";
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compatible = "eukrea,cpuimx35", "fsl,imx35";
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memory {
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reg = <0x80000000 0x8000000>; /* 128M */
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pcf8563@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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&iomuxc {
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imx35-eukrea {
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000
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MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000
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MX35_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
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MX35_PAD_FEC_COL__FEC_COL 0x80000000
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MX35_PAD_FEC_RDATA0__FEC_RDATA_0 0x80000000
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MX35_PAD_FEC_TDATA0__FEC_TDATA_0 0x80000000
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MX35_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
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MX35_PAD_FEC_MDC__FEC_MDC 0x80000000
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MX35_PAD_FEC_MDIO__FEC_MDIO 0x80000000
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MX35_PAD_FEC_TX_ERR__FEC_TX_ERR 0x80000000
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MX35_PAD_FEC_RX_ERR__FEC_RX_ERR 0x80000000
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MX35_PAD_FEC_CRS__FEC_CRS 0x80000000
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MX35_PAD_FEC_RDATA1__FEC_RDATA_1 0x80000000
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MX35_PAD_FEC_TDATA1__FEC_TDATA_1 0x80000000
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MX35_PAD_FEC_RDATA2__FEC_RDATA_2 0x80000000
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MX35_PAD_FEC_TDATA2__FEC_TDATA_2 0x80000000
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MX35_PAD_FEC_RDATA3__FEC_RDATA_3 0x80000000
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MX35_PAD_FEC_TDATA3__FEC_TDATA_3 0x80000000
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX35_PAD_I2C1_CLK__I2C1_SCL 0x80000000
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MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000
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>;
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};
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};
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};
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&nfc {
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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status = "okay";
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};
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