Catalin Marinas 0e7f7bcc3f arm64: Ignore the 'write' ESR flag on cache maintenance faults ... ESR.WnR bit is always set on data cache maintenance faults even though the page is not required to have write permission. If a translation fault (page not yet mapped) happens for read-only user address range, Linux incorrectly assumes a permission fault. This patch adds the check of the ESR.CM bit during the page fault handling to ignore the 'write' flag. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Tim Northover <Tim.Northover@arm.com> Cc: stable@vger.kernel.org		2013-05-08 10:33:16 +01:00
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cache.S	arm64: Cache maintenance routines	2012-09-17 13:42:00 +01:00
context.c	arm64: Process management	2012-09-17 13:41:58 +01:00
copypage.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
dma-mapping.c	arm64: Call swiotlb_init() instead of swiotlb_init_with_default_size()	2012-10-08 16:02:09 +01:00
extable.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
fault.c	arm64: Ignore the 'write' ESR flag on cache maintenance faults	2013-05-08 10:33:16 +01:00
flush.c	arm64: Convert empty flush_cache_{mm,page} functions to static inline	2012-11-23 18:15:32 +00:00
init.c	arm64: mm: update max_dma32 before calculating size of NORMAL zone	2012-11-14 09:54:15 +00:00
ioremap.c	arm64: Device specific operations	2012-09-17 13:42:04 +01:00
Makefile	arm64: Build infrastructure	2012-09-17 13:42:21 +01:00
mm.h	arm64: Call swiotlb_init() instead of swiotlb_init_with_default_size()	2012-10-08 16:02:09 +01:00
mmap.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
mmu.c	memory-hotplug: remove memmap of sparse-vmemmap	2013-02-23 17:50:12 -08:00
pgd.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
proc-macros.S	arm64: Assembly macros and definitions	2012-09-17 10:24:44 +01:00
proc.S	arm64: Do not set the SMP/nAMP processor bit	2012-09-24 18:10:29 +01:00
tlb.S	arm64: TLB maintenance functionality	2012-09-17 13:42:01 +01:00