mirror of
https://github.com/edk2-porting/linux-next.git
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9baa3c34ac
We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines. This issue was reported by checkpatch. A simplified version of the semantic patch that makes this change is as follows (http://coccinelle.lip6.fr/): // <smpl> @@ identifier i; declarer name DEFINE_PCI_DEVICE_TABLE; initializer z; @@ - DEFINE_PCI_DEVICE_TABLE(i) + const struct pci_device_id i[] = z; // </smpl> [bhelgaas: add semantic patch] Signed-off-by: Benoit Taine <benoit.taine@lip6.fr> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
883 lines
23 KiB
C
883 lines
23 KiB
C
/*
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* C-Media CMI8788 driver for C-Media's reference design and similar models
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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*
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*
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* This driver is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* CMI8788:
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*
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* SPI 0 -> 1st AK4396 (front)
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* SPI 1 -> 2nd AK4396 (surround)
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* SPI 2 -> 3rd AK4396 (center/LFE)
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* SPI 3 -> WM8785
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* SPI 4 -> 4th AK4396 (back)
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*
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* GPIO 0 -> DFS0 of AK5385
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* GPIO 1 -> DFS1 of AK5385
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*
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* X-Meridian models:
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* GPIO 4 -> enable extension S/PDIF input
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* GPIO 6 -> enable on-board S/PDIF input
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*
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* Claro models:
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* GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
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* GPIO 8 -> enable headphone amplifier
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*
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* CM9780:
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*
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* LINE_OUT -> input of ADC
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*
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* AUX_IN <- aux
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* CD_IN <- CD
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* MIC_IN <- mic
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*
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* GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
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*/
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include <sound/ac97_codec.h>
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#include <sound/control.h>
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#include <sound/core.h>
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#include <sound/info.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include "oxygen.h"
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#include "xonar_dg.h"
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#include "ak4396.h"
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#include "wm8785.h"
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MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
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MODULE_DESCRIPTION("C-Media CMI8788 driver");
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MODULE_LICENSE("GPL v2");
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MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
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",{C-Media,CMI8787}"
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",{C-Media,CMI8788}}");
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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
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static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "card index");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string");
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module_param_array(enable, bool, NULL, 0444);
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MODULE_PARM_DESC(enable, "enable card");
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enum {
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MODEL_CMEDIA_REF,
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MODEL_MERIDIAN,
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MODEL_MERIDIAN_2G,
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MODEL_CLARO,
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MODEL_CLARO_HALO,
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MODEL_FANTASIA,
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MODEL_SERENADE,
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MODEL_2CH_OUTPUT,
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MODEL_HG2PCI,
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MODEL_XONAR_DG,
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MODEL_XONAR_DGX,
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};
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static const struct pci_device_id oxygen_ids[] = {
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/* C-Media's reference design */
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
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/* Asus Xonar DG */
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{ OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
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/* Asus Xonar DGX */
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{ OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
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/* PCI 2.0 HD Audio */
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{ OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
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/* Kuroutoshikou CMI8787-HG2PCI */
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{ OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
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/* TempoTec HiFier Fantasia */
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{ OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
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/* TempoTec HiFier Serenade */
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{ OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
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/* AuzenTech X-Meridian */
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{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
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/* AuzenTech X-Meridian 2G */
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{ OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
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/* HT-Omega Claro */
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{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
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/* HT-Omega Claro halo */
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{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, oxygen_ids);
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#define GPIO_AK5385_DFS_MASK 0x0003
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#define GPIO_AK5385_DFS_NORMAL 0x0000
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#define GPIO_AK5385_DFS_DOUBLE 0x0001
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#define GPIO_AK5385_DFS_QUAD 0x0002
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#define GPIO_MERIDIAN_DIG_MASK 0x0050
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#define GPIO_MERIDIAN_DIG_EXT 0x0010
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#define GPIO_MERIDIAN_DIG_BOARD 0x0040
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#define GPIO_CLARO_DIG_COAX 0x0040
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#define GPIO_CLARO_HP 0x0100
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struct generic_data {
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unsigned int dacs;
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u8 ak4396_regs[4][5];
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u16 wm8785_regs[3];
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};
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static void ak4396_write(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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{
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/* maps ALSA channel pair number to SPI output */
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static const u8 codec_spi_map[4] = {
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0, 1, 2, 4
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};
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struct generic_data *data = chip->model_data;
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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OXYGEN_SPI_DATA_LENGTH_2 |
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OXYGEN_SPI_CLOCK_160 |
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(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
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OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
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AK4396_WRITE | (reg << 8) | value);
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data->ak4396_regs[codec][reg] = value;
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}
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static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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{
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struct generic_data *data = chip->model_data;
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if (value != data->ak4396_regs[codec][reg])
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ak4396_write(chip, codec, reg, value);
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}
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static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
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{
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struct generic_data *data = chip->model_data;
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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OXYGEN_SPI_DATA_LENGTH_2 |
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OXYGEN_SPI_CLOCK_160 |
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(3 << OXYGEN_SPI_CODEC_SHIFT) |
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OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
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(reg << 9) | value);
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if (reg < ARRAY_SIZE(data->wm8785_regs))
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data->wm8785_regs[reg] = value;
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}
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static void ak4396_registers_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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for (i = 0; i < data->dacs; ++i) {
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ak4396_write(chip, i, AK4396_CONTROL_1,
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AK4396_DIF_24_MSB | AK4396_RSTN);
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ak4396_write(chip, i, AK4396_CONTROL_2,
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data->ak4396_regs[0][AK4396_CONTROL_2]);
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ak4396_write(chip, i, AK4396_CONTROL_3,
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AK4396_PCM);
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ak4396_write(chip, i, AK4396_LCH_ATT,
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chip->dac_volume[i * 2]);
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ak4396_write(chip, i, AK4396_RCH_ATT,
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chip->dac_volume[i * 2 + 1]);
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}
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}
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static void ak4396_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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data->dacs = chip->model.dac_channels_pcm / 2;
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data->ak4396_regs[0][AK4396_CONTROL_2] =
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AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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ak4396_registers_init(chip);
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snd_component_add(chip->card, "AK4396");
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}
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static void ak5385_init(struct oxygen *chip)
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{
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
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snd_component_add(chip->card, "AK5385");
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}
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static void wm8785_registers_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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wm8785_write(chip, WM8785_R7, 0);
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wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
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wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
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}
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static void wm8785_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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data->wm8785_regs[0] =
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WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
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data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
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wm8785_registers_init(chip);
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snd_component_add(chip->card, "WM8785");
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}
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static void generic_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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wm8785_init(chip);
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}
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static void meridian_init(struct oxygen *chip)
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{
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
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GPIO_MERIDIAN_DIG_MASK);
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oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
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GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
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ak4396_init(chip);
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ak5385_init(chip);
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}
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static void claro_enable_hp(struct oxygen *chip)
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{
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msleep(300);
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
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oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
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}
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static void claro_init(struct oxygen *chip)
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{
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
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ak4396_init(chip);
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wm8785_init(chip);
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claro_enable_hp(chip);
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}
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static void claro_halo_init(struct oxygen *chip)
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{
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
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ak4396_init(chip);
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ak5385_init(chip);
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claro_enable_hp(chip);
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}
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static void fantasia_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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snd_component_add(chip->card, "CS5340");
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}
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static void stereo_output_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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}
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static void generic_cleanup(struct oxygen *chip)
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{
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}
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static void claro_disable_hp(struct oxygen *chip)
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{
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
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}
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static void claro_cleanup(struct oxygen *chip)
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{
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claro_disable_hp(chip);
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}
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static void claro_suspend(struct oxygen *chip)
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{
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claro_disable_hp(chip);
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}
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static void generic_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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wm8785_registers_init(chip);
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}
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static void meridian_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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}
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static void claro_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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claro_enable_hp(chip);
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}
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static void stereo_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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}
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static void set_ak4396_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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u8 value;
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value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
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if (params_rate(params) <= 54000)
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value |= AK4396_DFS_NORMAL;
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else if (params_rate(params) <= 108000)
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value |= AK4396_DFS_DOUBLE;
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else
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value |= AK4396_DFS_QUAD;
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msleep(1); /* wait for the new MCLK to become stable */
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if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
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for (i = 0; i < data->dacs; ++i) {
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ak4396_write(chip, i, AK4396_CONTROL_1,
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AK4396_DIF_24_MSB);
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ak4396_write(chip, i, AK4396_CONTROL_2, value);
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ak4396_write(chip, i, AK4396_CONTROL_1,
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AK4396_DIF_24_MSB | AK4396_RSTN);
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}
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}
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}
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static void update_ak4396_volume(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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for (i = 0; i < data->dacs; ++i) {
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ak4396_write_cached(chip, i, AK4396_LCH_ATT,
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chip->dac_volume[i * 2]);
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ak4396_write_cached(chip, i, AK4396_RCH_ATT,
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chip->dac_volume[i * 2 + 1]);
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}
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}
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static void update_ak4396_mute(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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u8 value;
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value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
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if (chip->dac_mute)
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value |= AK4396_SMUTE;
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for (i = 0; i < data->dacs; ++i)
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ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
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}
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static void set_wm8785_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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struct generic_data *data = chip->model_data;
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unsigned int value;
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value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
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if (params_rate(params) <= 48000)
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value |= WM8785_OSR_SINGLE;
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else if (params_rate(params) <= 96000)
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value |= WM8785_OSR_DOUBLE;
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else
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value |= WM8785_OSR_QUAD;
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if (value != data->wm8785_regs[0]) {
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wm8785_write(chip, WM8785_R7, 0);
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wm8785_write(chip, WM8785_R0, value);
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wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
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}
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}
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static void set_ak5385_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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unsigned int value;
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if (params_rate(params) <= 54000)
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value = GPIO_AK5385_DFS_NORMAL;
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else if (params_rate(params) <= 108000)
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value = GPIO_AK5385_DFS_DOUBLE;
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else
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value = GPIO_AK5385_DFS_QUAD;
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oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
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value, GPIO_AK5385_DFS_MASK);
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}
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static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
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{
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}
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static int rolloff_info(struct snd_kcontrol *ctl,
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struct snd_ctl_elem_info *info)
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{
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static const char *const names[2] = {
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"Sharp Roll-off", "Slow Roll-off"
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};
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return snd_ctl_enum_info(info, 1, 2, names);
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}
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|
|
static int rolloff_get(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
struct generic_data *data = chip->model_data;
|
|
|
|
value->value.enumerated.item[0] =
|
|
(data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
|
|
return 0;
|
|
}
|
|
|
|
static int rolloff_put(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
struct generic_data *data = chip->model_data;
|
|
unsigned int i;
|
|
int changed;
|
|
u8 reg;
|
|
|
|
mutex_lock(&chip->mutex);
|
|
reg = data->ak4396_regs[0][AK4396_CONTROL_2];
|
|
if (value->value.enumerated.item[0])
|
|
reg |= AK4396_SLOW;
|
|
else
|
|
reg &= ~AK4396_SLOW;
|
|
changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
|
|
if (changed) {
|
|
for (i = 0; i < data->dacs; ++i)
|
|
ak4396_write(chip, i, AK4396_CONTROL_2, reg);
|
|
}
|
|
mutex_unlock(&chip->mutex);
|
|
return changed;
|
|
}
|
|
|
|
static const struct snd_kcontrol_new rolloff_control = {
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "DAC Filter Playback Enum",
|
|
.info = rolloff_info,
|
|
.get = rolloff_get,
|
|
.put = rolloff_put,
|
|
};
|
|
|
|
static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
|
|
{
|
|
static const char *const names[2] = {
|
|
"None", "High-pass Filter"
|
|
};
|
|
|
|
return snd_ctl_enum_info(info, 1, 2, names);
|
|
}
|
|
|
|
static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
struct generic_data *data = chip->model_data;
|
|
|
|
value->value.enumerated.item[0] =
|
|
(data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
|
|
return 0;
|
|
}
|
|
|
|
static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
struct generic_data *data = chip->model_data;
|
|
unsigned int reg;
|
|
int changed;
|
|
|
|
mutex_lock(&chip->mutex);
|
|
reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
|
|
if (value->value.enumerated.item[0])
|
|
reg |= WM8785_HPFR | WM8785_HPFL;
|
|
changed = reg != data->wm8785_regs[WM8785_R2];
|
|
if (changed)
|
|
wm8785_write(chip, WM8785_R2, reg);
|
|
mutex_unlock(&chip->mutex);
|
|
return changed;
|
|
}
|
|
|
|
static const struct snd_kcontrol_new hpf_control = {
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "ADC Filter Capture Enum",
|
|
.info = hpf_info,
|
|
.get = hpf_get,
|
|
.put = hpf_put,
|
|
};
|
|
|
|
static int meridian_dig_source_info(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_info *info)
|
|
{
|
|
static const char *const names[2] = { "On-board", "Extension" };
|
|
|
|
return snd_ctl_enum_info(info, 1, 2, names);
|
|
}
|
|
|
|
static int claro_dig_source_info(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_info *info)
|
|
{
|
|
static const char *const names[2] = { "Optical", "Coaxial" };
|
|
|
|
return snd_ctl_enum_info(info, 1, 2, names);
|
|
}
|
|
|
|
static int meridian_dig_source_get(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
|
|
value->value.enumerated.item[0] =
|
|
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
|
|
GPIO_MERIDIAN_DIG_EXT);
|
|
return 0;
|
|
}
|
|
|
|
static int claro_dig_source_get(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
|
|
value->value.enumerated.item[0] =
|
|
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
|
|
GPIO_CLARO_DIG_COAX);
|
|
return 0;
|
|
}
|
|
|
|
static int meridian_dig_source_put(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
u16 old_reg, new_reg;
|
|
int changed;
|
|
|
|
mutex_lock(&chip->mutex);
|
|
old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
|
|
new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
|
|
if (value->value.enumerated.item[0] == 0)
|
|
new_reg |= GPIO_MERIDIAN_DIG_BOARD;
|
|
else
|
|
new_reg |= GPIO_MERIDIAN_DIG_EXT;
|
|
changed = new_reg != old_reg;
|
|
if (changed)
|
|
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
|
|
mutex_unlock(&chip->mutex);
|
|
return changed;
|
|
}
|
|
|
|
static int claro_dig_source_put(struct snd_kcontrol *ctl,
|
|
struct snd_ctl_elem_value *value)
|
|
{
|
|
struct oxygen *chip = ctl->private_data;
|
|
u16 old_reg, new_reg;
|
|
int changed;
|
|
|
|
mutex_lock(&chip->mutex);
|
|
old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
|
|
new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
|
|
if (value->value.enumerated.item[0])
|
|
new_reg |= GPIO_CLARO_DIG_COAX;
|
|
changed = new_reg != old_reg;
|
|
if (changed)
|
|
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
|
|
mutex_unlock(&chip->mutex);
|
|
return changed;
|
|
}
|
|
|
|
static const struct snd_kcontrol_new meridian_dig_source_control = {
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "IEC958 Source Capture Enum",
|
|
.info = meridian_dig_source_info,
|
|
.get = meridian_dig_source_get,
|
|
.put = meridian_dig_source_put,
|
|
};
|
|
|
|
static const struct snd_kcontrol_new claro_dig_source_control = {
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "IEC958 Source Capture Enum",
|
|
.info = claro_dig_source_info,
|
|
.get = claro_dig_source_get,
|
|
.put = claro_dig_source_put,
|
|
};
|
|
|
|
static int generic_mixer_init(struct oxygen *chip)
|
|
{
|
|
return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
|
|
}
|
|
|
|
static int generic_wm8785_mixer_init(struct oxygen *chip)
|
|
{
|
|
int err;
|
|
|
|
err = generic_mixer_init(chip);
|
|
if (err < 0)
|
|
return err;
|
|
err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
|
|
if (err < 0)
|
|
return err;
|
|
return 0;
|
|
}
|
|
|
|
static int meridian_mixer_init(struct oxygen *chip)
|
|
{
|
|
int err;
|
|
|
|
err = generic_mixer_init(chip);
|
|
if (err < 0)
|
|
return err;
|
|
err = snd_ctl_add(chip->card,
|
|
snd_ctl_new1(&meridian_dig_source_control, chip));
|
|
if (err < 0)
|
|
return err;
|
|
return 0;
|
|
}
|
|
|
|
static int claro_mixer_init(struct oxygen *chip)
|
|
{
|
|
int err;
|
|
|
|
err = generic_wm8785_mixer_init(chip);
|
|
if (err < 0)
|
|
return err;
|
|
err = snd_ctl_add(chip->card,
|
|
snd_ctl_new1(&claro_dig_source_control, chip));
|
|
if (err < 0)
|
|
return err;
|
|
return 0;
|
|
}
|
|
|
|
static int claro_halo_mixer_init(struct oxygen *chip)
|
|
{
|
|
int err;
|
|
|
|
err = generic_mixer_init(chip);
|
|
if (err < 0)
|
|
return err;
|
|
err = snd_ctl_add(chip->card,
|
|
snd_ctl_new1(&claro_dig_source_control, chip));
|
|
if (err < 0)
|
|
return err;
|
|
return 0;
|
|
}
|
|
|
|
static void dump_ak4396_registers(struct oxygen *chip,
|
|
struct snd_info_buffer *buffer)
|
|
{
|
|
struct generic_data *data = chip->model_data;
|
|
unsigned int dac, i;
|
|
|
|
for (dac = 0; dac < data->dacs; ++dac) {
|
|
snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
|
|
for (i = 0; i < 5; ++i)
|
|
snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
|
|
}
|
|
snd_iprintf(buffer, "\n");
|
|
}
|
|
|
|
static void dump_wm8785_registers(struct oxygen *chip,
|
|
struct snd_info_buffer *buffer)
|
|
{
|
|
struct generic_data *data = chip->model_data;
|
|
unsigned int i;
|
|
|
|
snd_iprintf(buffer, "\nWM8785:");
|
|
for (i = 0; i < 3; ++i)
|
|
snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
|
|
snd_iprintf(buffer, "\n");
|
|
}
|
|
|
|
static void dump_oxygen_registers(struct oxygen *chip,
|
|
struct snd_info_buffer *buffer)
|
|
{
|
|
dump_ak4396_registers(chip, buffer);
|
|
dump_wm8785_registers(chip, buffer);
|
|
}
|
|
|
|
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
|
|
|
|
static const struct oxygen_model model_generic = {
|
|
.shortname = "C-Media CMI8788",
|
|
.longname = "C-Media Oxygen HD Audio",
|
|
.chip = "CMI8788",
|
|
.init = generic_init,
|
|
.mixer_init = generic_wm8785_mixer_init,
|
|
.cleanup = generic_cleanup,
|
|
.resume = generic_resume,
|
|
.set_dac_params = set_ak4396_params,
|
|
.set_adc_params = set_wm8785_params,
|
|
.update_dac_volume = update_ak4396_volume,
|
|
.update_dac_mute = update_ak4396_mute,
|
|
.dump_registers = dump_oxygen_registers,
|
|
.dac_tlv = ak4396_db_scale,
|
|
.model_data_size = sizeof(struct generic_data),
|
|
.device_config = PLAYBACK_0_TO_I2S |
|
|
PLAYBACK_1_TO_SPDIF |
|
|
PLAYBACK_2_TO_AC97_1 |
|
|
CAPTURE_0_FROM_I2S_1 |
|
|
CAPTURE_1_FROM_SPDIF |
|
|
CAPTURE_2_FROM_AC97_1 |
|
|
AC97_CD_INPUT,
|
|
.dac_channels_pcm = 8,
|
|
.dac_channels_mixer = 8,
|
|
.dac_volume_min = 0,
|
|
.dac_volume_max = 255,
|
|
.function_flags = OXYGEN_FUNCTION_SPI |
|
|
OXYGEN_FUNCTION_ENABLE_SPI_4_5,
|
|
.dac_mclks = OXYGEN_MCLKS(256, 128, 128),
|
|
.adc_mclks = OXYGEN_MCLKS(256, 256, 128),
|
|
.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
|
|
.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
|
|
};
|
|
|
|
static int get_oxygen_model(struct oxygen *chip,
|
|
const struct pci_device_id *id)
|
|
{
|
|
static const char *const names[] = {
|
|
[MODEL_MERIDIAN] = "AuzenTech X-Meridian",
|
|
[MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
|
|
[MODEL_CLARO] = "HT-Omega Claro",
|
|
[MODEL_CLARO_HALO] = "HT-Omega Claro halo",
|
|
[MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
|
|
[MODEL_SERENADE] = "TempoTec HiFier Serenade",
|
|
[MODEL_HG2PCI] = "CMI8787-HG2PCI",
|
|
};
|
|
|
|
chip->model = model_generic;
|
|
switch (id->driver_data) {
|
|
case MODEL_MERIDIAN:
|
|
case MODEL_MERIDIAN_2G:
|
|
chip->model.init = meridian_init;
|
|
chip->model.mixer_init = meridian_mixer_init;
|
|
chip->model.resume = meridian_resume;
|
|
chip->model.set_adc_params = set_ak5385_params;
|
|
chip->model.dump_registers = dump_ak4396_registers;
|
|
chip->model.device_config = PLAYBACK_0_TO_I2S |
|
|
PLAYBACK_1_TO_SPDIF |
|
|
CAPTURE_0_FROM_I2S_2 |
|
|
CAPTURE_1_FROM_SPDIF;
|
|
if (id->driver_data == MODEL_MERIDIAN)
|
|
chip->model.device_config |= AC97_CD_INPUT;
|
|
break;
|
|
case MODEL_CLARO:
|
|
chip->model.init = claro_init;
|
|
chip->model.mixer_init = claro_mixer_init;
|
|
chip->model.cleanup = claro_cleanup;
|
|
chip->model.suspend = claro_suspend;
|
|
chip->model.resume = claro_resume;
|
|
break;
|
|
case MODEL_CLARO_HALO:
|
|
chip->model.init = claro_halo_init;
|
|
chip->model.mixer_init = claro_halo_mixer_init;
|
|
chip->model.cleanup = claro_cleanup;
|
|
chip->model.suspend = claro_suspend;
|
|
chip->model.resume = claro_resume;
|
|
chip->model.set_adc_params = set_ak5385_params;
|
|
chip->model.dump_registers = dump_ak4396_registers;
|
|
chip->model.device_config = PLAYBACK_0_TO_I2S |
|
|
PLAYBACK_1_TO_SPDIF |
|
|
CAPTURE_0_FROM_I2S_2 |
|
|
CAPTURE_1_FROM_SPDIF;
|
|
break;
|
|
case MODEL_FANTASIA:
|
|
case MODEL_SERENADE:
|
|
case MODEL_2CH_OUTPUT:
|
|
case MODEL_HG2PCI:
|
|
chip->model.shortname = "C-Media CMI8787";
|
|
chip->model.chip = "CMI8787";
|
|
if (id->driver_data == MODEL_FANTASIA)
|
|
chip->model.init = fantasia_init;
|
|
else
|
|
chip->model.init = stereo_output_init;
|
|
chip->model.resume = stereo_resume;
|
|
chip->model.mixer_init = generic_mixer_init;
|
|
chip->model.set_adc_params = set_no_params;
|
|
chip->model.dump_registers = dump_ak4396_registers;
|
|
chip->model.device_config = PLAYBACK_0_TO_I2S |
|
|
PLAYBACK_1_TO_SPDIF;
|
|
if (id->driver_data == MODEL_FANTASIA) {
|
|
chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
|
|
chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
|
|
}
|
|
chip->model.dac_channels_pcm = 2;
|
|
chip->model.dac_channels_mixer = 2;
|
|
break;
|
|
case MODEL_XONAR_DG:
|
|
chip->model = model_xonar_dg;
|
|
chip->model.shortname = "Xonar DG";
|
|
break;
|
|
case MODEL_XONAR_DGX:
|
|
chip->model = model_xonar_dg;
|
|
chip->model.shortname = "Xonar DGX";
|
|
break;
|
|
}
|
|
if (id->driver_data == MODEL_MERIDIAN ||
|
|
id->driver_data == MODEL_MERIDIAN_2G ||
|
|
id->driver_data == MODEL_CLARO_HALO) {
|
|
chip->model.misc_flags = OXYGEN_MISC_MIDI;
|
|
chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
|
|
}
|
|
if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
|
|
chip->model.shortname = names[id->driver_data];
|
|
return 0;
|
|
}
|
|
|
|
static int generic_oxygen_probe(struct pci_dev *pci,
|
|
const struct pci_device_id *pci_id)
|
|
{
|
|
static int dev;
|
|
int err;
|
|
|
|
if (dev >= SNDRV_CARDS)
|
|
return -ENODEV;
|
|
if (!enable[dev]) {
|
|
++dev;
|
|
return -ENOENT;
|
|
}
|
|
err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
|
|
oxygen_ids, get_oxygen_model);
|
|
if (err >= 0)
|
|
++dev;
|
|
return err;
|
|
}
|
|
|
|
static struct pci_driver oxygen_driver = {
|
|
.name = KBUILD_MODNAME,
|
|
.id_table = oxygen_ids,
|
|
.probe = generic_oxygen_probe,
|
|
.remove = oxygen_pci_remove,
|
|
#ifdef CONFIG_PM_SLEEP
|
|
.driver = {
|
|
.pm = &oxygen_pci_pm,
|
|
},
|
|
#endif
|
|
};
|
|
|
|
module_pci_driver(oxygen_driver);
|