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c5b736d093
This is a significant rework of the low-level clock, PLL and Power Sleep Controller (PSC) implementation for the DaVinci family. The primary goal is to have better modeling if the hardware clocks and features with the aim of DVFS functionality. Highlights: - model PLLs and all PLL-derived clocks - model parent/child relationships of PLLs and clocks - convert to new clkdev layer - view clock frequency and refcount via /proc/davinci_clocks Special thanks to significant contributions and testing by David Brownell. Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
22 lines
565 B
C
22 lines
565 B
C
/*
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* arch/arm/mach-davinci/include/mach/clock.h
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*
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* Clock control driver for DaVinci - header file
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*
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* Authors: Vladimir Barinov <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ASM_ARCH_DAVINCI_CLOCK_H
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#define __ASM_ARCH_DAVINCI_CLOCK_H
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struct clk;
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extern int clk_register(struct clk *clk);
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extern void clk_unregister(struct clk *clk);
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#endif
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