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841e3604d3
use kernel_fpu_begin/end() instead of unconditionally accessing cr0 and saving/restoring just the few used xmm/ymm registers. This has some advantages like: * If the task's FPU state is already active, then kernel_fpu_begin() will just save the user-state and avoiding the read/write of cr0. In general, cr0 accesses are much slower. * Manual save/restore of xmm/ymm registers will affect the 'modified' and the 'init' optimizations brought in the by xsaveopt/xrstor infrastructure. * Foward compatibility with future vector register extensions will be a problem if the xmm/ymm registers are manually saved and restored (corrupting the extended state of those vector registers). With this patch, there was no significant difference in the xor throughput using AVX, measured during boot. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/1345842782-24175-5-git-send-email-suresh.b.siddha@intel.com Cc: Jim Kukunas <james.t.kukunas@linux.intel.com> Cc: NeilBrown <neilb@suse.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
185 lines
4.4 KiB
C
185 lines
4.4 KiB
C
#ifndef _ASM_X86_XOR_AVX_H
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#define _ASM_X86_XOR_AVX_H
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/*
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* Optimized RAID-5 checksumming functions for AVX
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*
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* Copyright (C) 2012 Intel Corporation
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* Author: Jim Kukunas <james.t.kukunas@linux.intel.com>
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*
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* Based on Ingo Molnar and Zach Brown's respective MMX and SSE routines
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#ifdef CONFIG_AS_AVX
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#include <linux/compiler.h>
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#include <asm/i387.h>
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#define BLOCK4(i) \
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BLOCK(32 * i, 0) \
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BLOCK(32 * (i + 1), 1) \
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BLOCK(32 * (i + 2), 2) \
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BLOCK(32 * (i + 3), 3)
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#define BLOCK16() \
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BLOCK4(0) \
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BLOCK4(4) \
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BLOCK4(8) \
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BLOCK4(12)
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static void xor_avx_2(unsigned long bytes, unsigned long *p0, unsigned long *p1)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16()
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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}
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kernel_fpu_end();
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}
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static void xor_avx_3(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p2[i / sizeof(*p2)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16()
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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}
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kernel_fpu_end();
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}
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static void xor_avx_4(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2, unsigned long *p3)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p3[i / sizeof(*p3)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p2[i / sizeof(*p2)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16();
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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p3 = (unsigned long *)((uintptr_t)p3 + 512);
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}
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kernel_fpu_end();
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}
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static void xor_avx_5(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2, unsigned long *p3, unsigned long *p4)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p4[i / sizeof(*p4)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p3[i / sizeof(*p3)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p2[i / sizeof(*p2)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16()
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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p3 = (unsigned long *)((uintptr_t)p3 + 512);
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p4 = (unsigned long *)((uintptr_t)p4 + 512);
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}
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kernel_fpu_end();
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}
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static struct xor_block_template xor_block_avx = {
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.name = "avx",
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.do_2 = xor_avx_2,
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.do_3 = xor_avx_3,
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.do_4 = xor_avx_4,
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.do_5 = xor_avx_5,
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};
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#define AVX_XOR_SPEED \
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do { \
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if (cpu_has_avx) \
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xor_speed(&xor_block_avx); \
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} while (0)
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#define AVX_SELECT(FASTEST) \
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(cpu_has_avx ? &xor_block_avx : FASTEST)
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#else
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#define AVX_XOR_SPEED {}
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#define AVX_SELECT(FASTEST) (FASTEST)
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#endif
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#endif
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