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8f3c4537bb
Rather than marking the mach/gpio.h header files which want to use the trivial GPIOLIB implementation, mark those which do not want to use it instead. This means that by default, you get the trivial implementation and only have to do something extra if you need to. This should encourage the use of the trivial default implementation. As an additional bonus, several gpio.h header files become empty. Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
94 lines
3.5 KiB
C
94 lines
3.5 KiB
C
/* arch/arm/mach-s3c6400/include/mach/gpio.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C6400 - GPIO lib support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* GPIO bank sizes */
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#define S3C64XX_GPIO_A_NR (8)
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#define S3C64XX_GPIO_B_NR (7)
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#define S3C64XX_GPIO_C_NR (8)
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#define S3C64XX_GPIO_D_NR (5)
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#define S3C64XX_GPIO_E_NR (5)
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#define S3C64XX_GPIO_F_NR (16)
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#define S3C64XX_GPIO_G_NR (7)
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#define S3C64XX_GPIO_H_NR (10)
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#define S3C64XX_GPIO_I_NR (16)
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#define S3C64XX_GPIO_J_NR (12)
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#define S3C64XX_GPIO_K_NR (16)
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#define S3C64XX_GPIO_L_NR (15)
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#define S3C64XX_GPIO_M_NR (6)
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#define S3C64XX_GPIO_N_NR (16)
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#define S3C64XX_GPIO_O_NR (16)
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#define S3C64XX_GPIO_P_NR (15)
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#define S3C64XX_GPIO_Q_NR (9)
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/* GPIO bank numbes */
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/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
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* space for debugging purposes so that any accidental
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* change from one gpio bank to another can be caught.
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*/
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#define S3C64XX_GPIO_NEXT(__gpio) \
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((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
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enum s3c_gpio_number {
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S3C64XX_GPIO_A_START = 0,
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S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A),
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S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B),
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S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C),
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S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D),
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S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E),
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S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F),
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S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G),
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S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H),
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S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I),
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S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J),
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S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K),
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S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L),
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S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M),
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S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N),
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S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O),
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S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P),
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};
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/* S3C64XX GPIO number definitions. */
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#define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr))
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#define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr))
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#define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr))
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#define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr))
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#define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr))
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#define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr))
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#define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr))
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#define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr))
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#define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr))
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#define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr))
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#define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr))
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#define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr))
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#define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr))
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#define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr))
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#define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr))
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#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr))
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#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr))
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/* the end of the S3C64XX specific gpios */
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#define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
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#define S3C_GPIO_END S3C64XX_GPIO_END
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/* define the number of gpios we need to the one after the GPQ() range */
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#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
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#define BOARD_NR_GPIOS 16
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#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
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