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ed520c90b3
Update all the Tegra DT bindings to require the standard dmas/dma-names properties rather than non-standard nvidia,dma-request-selector property. This is a DT-ABI-incompatible change. It is the second of two changes required for me to consider the Tegra DT bindings as stable, the other being the previous conversion to the common reset bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com>
37 lines
1.2 KiB
Plaintext
37 lines
1.2 KiB
Plaintext
NVIDIA Tegra 20 AC97 controller
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Required properties:
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- compatible : "nvidia,tegra20-ac97"
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- reg : Should contain AC97 controller registers location and length
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- interrupts : Should contain AC97 interrupt
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- ac97
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- dmas : Must contain an entry for each entry in clock-names.
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See ../dma/dma.txt for details.
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- dma-names : Must include the following entries:
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- rx
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- tx
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- clocks : Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
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of the GPIO used to reset the external AC97 codec
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- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
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of the GPIO corresponding with the AC97 DAP _FS line
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Example:
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ac97@70002000 {
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compatible = "nvidia,tegra20-ac97";
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reg = <0x70002000 0x200>;
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interrupts = <0 81 0x04>;
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nvidia,codec-reset-gpio = <&gpio 170 0>;
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nvidia,codec-sync-gpio = <&gpio 120 0>;
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clocks = <&tegra_car 3>;
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resets = <&tegra_car 3>;
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reset-names = "ac97";
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dmas = <&apbdma 12>, <&apbdma 12>;
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dma-names = "rx", "tx";
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};
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