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0aad818b2d
The sparse code, when asking the architecture to populate the vmemmap, specifies the section range as a starting page and a number of pages. This is an awkward interface, because none of the arch-specific code actually thinks of the range in terms of 'struct page' units and always translates it to bytes first. In addition, later patches mix huge page and regular page backing for the vmemmap. For this, they need to call vmemmap_populate_basepages() on sub-section ranges with PAGE_SIZE and PMD_SIZE in mind. But these are not necessarily multiples of the 'struct page' size and so this unit is too coarse. Just translate the section range into bytes once in the generic sparse code, then pass byte ranges down the stack. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Cc: Ben Hutchings <ben@decadent.org.uk> Cc: Bernhard Schmidt <Bernhard.Schmidt@lrz.de> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Acked-by: David S. Miller <davem@davemloft.net> Tested-by: David S. Miller <davem@davemloft.net> Cc: Wu Fengguang <fengguang.wu@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
438 lines
9.9 KiB
C
438 lines
9.9 KiB
C
/*
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* Based on arch/arm/mm/mmu.c
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*
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* Copyright (C) 1995-2005 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/mman.h>
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#include <linux/nodemask.h>
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#include <linux/memblock.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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#include <asm/cputype.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/sizes.h>
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#include <asm/tlb.h>
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#include <asm/mmu_context.h>
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#include "mm.h"
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/*
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* Empty_zero_page is a special page that is used for zero-initialized data
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* and COW.
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*/
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struct page *empty_zero_page;
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EXPORT_SYMBOL(empty_zero_page);
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pgprot_t pgprot_default;
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EXPORT_SYMBOL(pgprot_default);
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static pmdval_t prot_sect_kernel;
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struct cachepolicy {
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const char policy[16];
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u64 mair;
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u64 tcr;
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};
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static struct cachepolicy cache_policies[] __initdata = {
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{
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.policy = "uncached",
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.mair = 0x44, /* inner, outer non-cacheable */
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.tcr = TCR_IRGN_NC | TCR_ORGN_NC,
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}, {
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.policy = "writethrough",
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.mair = 0xaa, /* inner, outer write-through, read-allocate */
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.tcr = TCR_IRGN_WT | TCR_ORGN_WT,
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}, {
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.policy = "writeback",
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.mair = 0xee, /* inner, outer write-back, read-allocate */
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.tcr = TCR_IRGN_WBnWA | TCR_ORGN_WBnWA,
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}
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};
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/*
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* These are useful for identifying cache coherency problems by allowing the
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* cache or the cache and writebuffer to be turned off. It changes the Normal
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* memory caching attributes in the MAIR_EL1 register.
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*/
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static int __init early_cachepolicy(char *p)
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{
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int i;
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u64 tmp;
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for (i = 0; i < ARRAY_SIZE(cache_policies); i++) {
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int len = strlen(cache_policies[i].policy);
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if (memcmp(p, cache_policies[i].policy, len) == 0)
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break;
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}
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if (i == ARRAY_SIZE(cache_policies)) {
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pr_err("ERROR: unknown or unsupported cache policy: %s\n", p);
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return 0;
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}
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flush_cache_all();
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/*
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* Modify MT_NORMAL attributes in MAIR_EL1.
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*/
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asm volatile(
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" mrs %0, mair_el1\n"
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" bfi %0, %1, #%2, #8\n"
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" msr mair_el1, %0\n"
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" isb\n"
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: "=&r" (tmp)
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: "r" (cache_policies[i].mair), "i" (MT_NORMAL * 8));
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/*
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* Modify TCR PTW cacheability attributes.
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*/
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asm volatile(
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" mrs %0, tcr_el1\n"
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" bic %0, %0, %2\n"
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" orr %0, %0, %1\n"
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" msr tcr_el1, %0\n"
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" isb\n"
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: "=&r" (tmp)
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: "r" (cache_policies[i].tcr), "r" (TCR_IRGN_MASK | TCR_ORGN_MASK));
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flush_cache_all();
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return 0;
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}
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early_param("cachepolicy", early_cachepolicy);
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/*
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* Adjust the PMD section entries according to the CPU in use.
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*/
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static void __init init_mem_pgprot(void)
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{
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pteval_t default_pgprot;
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int i;
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default_pgprot = PTE_ATTRINDX(MT_NORMAL);
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prot_sect_kernel = PMD_TYPE_SECT | PMD_SECT_AF | PMD_ATTRINDX(MT_NORMAL);
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#ifdef CONFIG_SMP
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/*
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* Mark memory with the "shared" attribute for SMP systems
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*/
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default_pgprot |= PTE_SHARED;
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prot_sect_kernel |= PMD_SECT_S;
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#endif
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for (i = 0; i < 16; i++) {
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unsigned long v = pgprot_val(protection_map[i]);
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protection_map[i] = __pgprot(v | default_pgprot);
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}
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pgprot_default = __pgprot(PTE_TYPE_PAGE | PTE_AF | default_pgprot);
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}
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pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t vma_prot)
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{
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if (!pfn_valid(pfn))
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return pgprot_noncached(vma_prot);
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else if (file->f_flags & O_SYNC)
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return pgprot_writecombine(vma_prot);
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return vma_prot;
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}
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EXPORT_SYMBOL(phys_mem_access_prot);
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static void __init *early_alloc(unsigned long sz)
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{
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void *ptr = __va(memblock_alloc(sz, sz));
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memset(ptr, 0, sz);
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return ptr;
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}
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static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
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unsigned long end, unsigned long pfn)
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{
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pte_t *pte;
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if (pmd_none(*pmd)) {
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pte = early_alloc(PTRS_PER_PTE * sizeof(pte_t));
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__pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE);
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}
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BUG_ON(pmd_bad(*pmd));
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pte = pte_offset_kernel(pmd, addr);
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do {
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set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC));
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pfn++;
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} while (pte++, addr += PAGE_SIZE, addr != end);
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}
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static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
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unsigned long end, phys_addr_t phys)
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{
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pmd_t *pmd;
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unsigned long next;
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/*
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* Check for initial section mappings in the pgd/pud and remove them.
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*/
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if (pud_none(*pud) || pud_bad(*pud)) {
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pmd = early_alloc(PTRS_PER_PMD * sizeof(pmd_t));
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pud_populate(&init_mm, pud, pmd);
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}
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pmd = pmd_offset(pud, addr);
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do {
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next = pmd_addr_end(addr, end);
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/* try section mapping first */
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if (((addr | next | phys) & ~SECTION_MASK) == 0)
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set_pmd(pmd, __pmd(phys | prot_sect_kernel));
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else
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alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys));
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phys += next - addr;
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} while (pmd++, addr = next, addr != end);
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}
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static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
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unsigned long end, unsigned long phys)
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{
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pud_t *pud = pud_offset(pgd, addr);
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unsigned long next;
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do {
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next = pud_addr_end(addr, end);
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alloc_init_pmd(pud, addr, next, phys);
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phys += next - addr;
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} while (pud++, addr = next, addr != end);
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}
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/*
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* Create the page directory entries and any necessary page tables for the
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* mapping specified by 'md'.
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*/
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static void __init create_mapping(phys_addr_t phys, unsigned long virt,
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phys_addr_t size)
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{
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unsigned long addr, length, end, next;
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pgd_t *pgd;
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if (virt < VMALLOC_START) {
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pr_warning("BUG: not creating mapping for 0x%016llx at 0x%016lx - outside kernel range\n",
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phys, virt);
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return;
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}
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addr = virt & PAGE_MASK;
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length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
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pgd = pgd_offset_k(addr);
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end = addr + length;
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do {
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next = pgd_addr_end(addr, end);
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alloc_init_pud(pgd, addr, next, phys);
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phys += next - addr;
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} while (pgd++, addr = next, addr != end);
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}
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#ifdef CONFIG_EARLY_PRINTK
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/*
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* Create an early I/O mapping using the pgd/pmd entries already populated
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* in head.S as this function is called too early to allocated any memory. The
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* mapping size is 2MB with 4KB pages or 64KB or 64KB pages.
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*/
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void __iomem * __init early_io_map(phys_addr_t phys, unsigned long virt)
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{
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unsigned long size, mask;
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bool page64k = IS_ENABLED(CONFIG_ARM64_64K_PAGES);
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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/*
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* No early pte entries with !ARM64_64K_PAGES configuration, so using
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* sections (pmd).
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*/
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size = page64k ? PAGE_SIZE : SECTION_SIZE;
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mask = ~(size - 1);
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pgd = pgd_offset_k(virt);
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pud = pud_offset(pgd, virt);
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if (pud_none(*pud))
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return NULL;
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pmd = pmd_offset(pud, virt);
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if (page64k) {
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if (pmd_none(*pmd))
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return NULL;
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pte = pte_offset_kernel(pmd, virt);
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set_pte(pte, __pte((phys & mask) | PROT_DEVICE_nGnRE));
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} else {
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set_pmd(pmd, __pmd((phys & mask) | PROT_SECT_DEVICE_nGnRE));
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}
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return (void __iomem *)((virt & mask) + (phys & ~mask));
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}
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#endif
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static void __init map_mem(void)
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{
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struct memblock_region *reg;
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/* map all the memory banks */
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for_each_memblock(memory, reg) {
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phys_addr_t start = reg->base;
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phys_addr_t end = start + reg->size;
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if (start >= end)
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break;
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create_mapping(start, __phys_to_virt(start), end - start);
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}
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}
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/*
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* paging_init() sets up the page tables, initialises the zone memory
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* maps and sets up the zero page.
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*/
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void __init paging_init(void)
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{
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void *zero_page;
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/*
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* Maximum PGDIR_SIZE addressable via the initial direct kernel
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* mapping in swapper_pg_dir.
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*/
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memblock_set_current_limit((PHYS_OFFSET & PGDIR_MASK) + PGDIR_SIZE);
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init_mem_pgprot();
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map_mem();
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/*
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* Finally flush the caches and tlb to ensure that we're in a
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* consistent state.
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*/
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flush_cache_all();
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flush_tlb_all();
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/* allocate the zero page. */
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zero_page = early_alloc(PAGE_SIZE);
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bootmem_init();
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empty_zero_page = virt_to_page(zero_page);
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__flush_dcache_page(empty_zero_page);
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/*
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* TTBR0 is only used for the identity mapping at this stage. Make it
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* point to zero page to avoid speculatively fetching new entries.
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*/
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cpu_set_reserved_ttbr0();
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flush_tlb_all();
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}
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/*
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* Enable the identity mapping to allow the MMU disabling.
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*/
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void setup_mm_for_reboot(void)
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{
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cpu_switch_mm(idmap_pg_dir, &init_mm);
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flush_tlb_all();
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}
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/*
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* Check whether a kernel address is valid (derived from arch/x86/).
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*/
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int kern_addr_valid(unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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if ((((long)addr) >> VA_BITS) != -1UL)
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return 0;
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pgd = pgd_offset_k(addr);
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if (pgd_none(*pgd))
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return 0;
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pud = pud_offset(pgd, addr);
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if (pud_none(*pud))
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return 0;
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pmd = pmd_offset(pud, addr);
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if (pmd_none(*pmd))
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return 0;
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pte = pte_offset_kernel(pmd, addr);
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if (pte_none(*pte))
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return 0;
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return pfn_valid(pte_pfn(*pte));
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}
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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#ifdef CONFIG_ARM64_64K_PAGES
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int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
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{
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return vmemmap_populate_basepages(start, end, node);
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}
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#else /* !CONFIG_ARM64_64K_PAGES */
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int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
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{
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unsigned long addr = start;
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unsigned long next;
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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do {
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next = pmd_addr_end(addr, end);
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pgd = vmemmap_pgd_populate(addr, node);
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if (!pgd)
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return -ENOMEM;
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pud = vmemmap_pud_populate(pgd, addr, node);
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if (!pud)
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return -ENOMEM;
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pmd = pmd_offset(pud, addr);
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if (pmd_none(*pmd)) {
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void *p = NULL;
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p = vmemmap_alloc_block_buf(PMD_SIZE, node);
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if (!p)
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return -ENOMEM;
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set_pmd(pmd, __pmd(__pa(p) | prot_sect_kernel));
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} else
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vmemmap_verify((pte_t *)pmd, node, addr, next);
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} while (addr = next, addr != end);
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return 0;
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}
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#endif /* CONFIG_ARM64_64K_PAGES */
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void vmemmap_free(unsigned long start, unsigned long end)
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{
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}
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#endif /* CONFIG_SPARSEMEM_VMEMMAP */
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