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ddd02e1456
Avoid return NULL if rockchip_clk_register_inverter fails, otherwise rockchip_clk_register_branches print "unknown clock type". The acutal case is that it's a known clock type but we fail to regiser it, which may makes user confuse the reason of failure. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
113 lines
2.7 KiB
C
113 lines
2.7 KiB
C
/*
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* Copyright 2015 Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/slab.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include "clk.h"
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struct rockchip_inv_clock {
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struct clk_hw hw;
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void __iomem *reg;
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int shift;
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int flags;
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spinlock_t *lock;
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};
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#define to_inv_clock(_hw) container_of(_hw, struct rockchip_inv_clock, hw)
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#define INVERTER_MASK 0x1
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static int rockchip_inv_get_phase(struct clk_hw *hw)
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{
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struct rockchip_inv_clock *inv_clock = to_inv_clock(hw);
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u32 val;
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val = readl(inv_clock->reg) >> inv_clock->shift;
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val &= INVERTER_MASK;
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return val ? 180 : 0;
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}
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static int rockchip_inv_set_phase(struct clk_hw *hw, int degrees)
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{
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struct rockchip_inv_clock *inv_clock = to_inv_clock(hw);
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u32 val;
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if (degrees % 180 == 0) {
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val = !!degrees;
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} else {
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pr_err("%s: unsupported phase %d for %s\n",
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__func__, degrees, clk_hw_get_name(hw));
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return -EINVAL;
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}
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if (inv_clock->flags & ROCKCHIP_INVERTER_HIWORD_MASK) {
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writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift),
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inv_clock->reg);
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} else {
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(inv_clock->lock, flags);
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reg = readl(inv_clock->reg);
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reg &= ~BIT(inv_clock->shift);
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reg |= val;
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writel(reg, inv_clock->reg);
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spin_unlock_irqrestore(inv_clock->lock, flags);
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}
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return 0;
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}
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static const struct clk_ops rockchip_inv_clk_ops = {
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.get_phase = rockchip_inv_get_phase,
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.set_phase = rockchip_inv_set_phase,
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};
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struct clk *rockchip_clk_register_inverter(const char *name,
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const char *const *parent_names, u8 num_parents,
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void __iomem *reg, int shift, int flags,
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spinlock_t *lock)
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{
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struct clk_init_data init;
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struct rockchip_inv_clock *inv_clock;
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struct clk *clk;
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inv_clock = kmalloc(sizeof(*inv_clock), GFP_KERNEL);
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if (!inv_clock)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.num_parents = num_parents;
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init.flags = CLK_SET_RATE_PARENT;
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init.parent_names = parent_names;
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init.ops = &rockchip_inv_clk_ops;
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inv_clock->hw.init = &init;
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inv_clock->reg = reg;
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inv_clock->shift = shift;
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inv_clock->flags = flags;
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inv_clock->lock = lock;
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clk = clk_register(NULL, &inv_clock->hw);
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if (IS_ERR(clk))
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kfree(inv_clock);
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return clk;
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}
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