mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-19 10:44:14 +08:00
d82924c3b8
Pull x86 pti updates from Ingo Molnar:
"The main changes:
- Make the IBPB barrier more strict and add STIBP support (Jiri
Kosina)
- Micro-optimize and clean up the entry code (Andy Lutomirski)
- ... plus misc other fixes"
* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/speculation: Propagate information about RSB filling mitigation to sysfs
x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation
x86/speculation: Apply IBPB more strictly to avoid cross-process data leak
x86/speculation: Add RETPOLINE_AMD support to the inline asm CALL_NOSPEC variant
x86/CPU: Fix unused variable warning when !CONFIG_IA32_EMULATION
x86/pti/64: Remove the SYSCALL64 entry trampoline
x86/entry/64: Use the TSS sp2 slot for SYSCALL/SYSRET scratch space
x86/entry/64: Document idtentry
108 lines
3.2 KiB
C
108 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Generate definitions needed by assembly language modules.
|
|
* This code generates raw asm output which is post-processed to extract
|
|
* and format the required data.
|
|
*/
|
|
#define COMPILE_OFFSETS
|
|
|
|
#include <linux/crypto.h>
|
|
#include <linux/sched.h>
|
|
#include <linux/stddef.h>
|
|
#include <linux/hardirq.h>
|
|
#include <linux/suspend.h>
|
|
#include <linux/kbuild.h>
|
|
#include <asm/processor.h>
|
|
#include <asm/thread_info.h>
|
|
#include <asm/sigframe.h>
|
|
#include <asm/bootparam.h>
|
|
#include <asm/suspend.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
#ifdef CONFIG_XEN
|
|
#include <xen/interface/xen.h>
|
|
#endif
|
|
|
|
#ifdef CONFIG_X86_32
|
|
# include "asm-offsets_32.c"
|
|
#else
|
|
# include "asm-offsets_64.c"
|
|
#endif
|
|
|
|
void common(void) {
|
|
BLANK();
|
|
OFFSET(TASK_threadsp, task_struct, thread.sp);
|
|
#ifdef CONFIG_STACKPROTECTOR
|
|
OFFSET(TASK_stack_canary, task_struct, stack_canary);
|
|
#endif
|
|
|
|
BLANK();
|
|
OFFSET(TASK_TI_flags, task_struct, thread_info.flags);
|
|
OFFSET(TASK_addr_limit, task_struct, thread.addr_limit);
|
|
|
|
BLANK();
|
|
OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
|
|
|
|
BLANK();
|
|
OFFSET(pbe_address, pbe, address);
|
|
OFFSET(pbe_orig_address, pbe, orig_address);
|
|
OFFSET(pbe_next, pbe, next);
|
|
|
|
#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
|
|
BLANK();
|
|
OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax);
|
|
OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx);
|
|
OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx);
|
|
OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx);
|
|
OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si);
|
|
OFFSET(IA32_SIGCONTEXT_di, sigcontext_32, di);
|
|
OFFSET(IA32_SIGCONTEXT_bp, sigcontext_32, bp);
|
|
OFFSET(IA32_SIGCONTEXT_sp, sigcontext_32, sp);
|
|
OFFSET(IA32_SIGCONTEXT_ip, sigcontext_32, ip);
|
|
|
|
BLANK();
|
|
OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext);
|
|
#endif
|
|
|
|
#ifdef CONFIG_PARAVIRT_XXL
|
|
BLANK();
|
|
OFFSET(PV_IRQ_irq_disable, paravirt_patch_template, irq.irq_disable);
|
|
OFFSET(PV_IRQ_irq_enable, paravirt_patch_template, irq.irq_enable);
|
|
OFFSET(PV_CPU_iret, paravirt_patch_template, cpu.iret);
|
|
OFFSET(PV_MMU_read_cr2, paravirt_patch_template, mmu.read_cr2);
|
|
#endif
|
|
|
|
#ifdef CONFIG_XEN
|
|
BLANK();
|
|
OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
|
|
OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
|
|
#endif
|
|
|
|
BLANK();
|
|
OFFSET(BP_scratch, boot_params, scratch);
|
|
OFFSET(BP_secure_boot, boot_params, secure_boot);
|
|
OFFSET(BP_loadflags, boot_params, hdr.loadflags);
|
|
OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
|
|
OFFSET(BP_version, boot_params, hdr.version);
|
|
OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
|
|
OFFSET(BP_init_size, boot_params, hdr.init_size);
|
|
OFFSET(BP_pref_address, boot_params, hdr.pref_address);
|
|
OFFSET(BP_code32_start, boot_params, hdr.code32_start);
|
|
|
|
BLANK();
|
|
DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
|
|
|
|
/* TLB state for the entry code */
|
|
OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask);
|
|
|
|
/* Layout info for cpu_entry_area */
|
|
OFFSET(CPU_ENTRY_AREA_entry_stack, cpu_entry_area, entry_stack_page);
|
|
DEFINE(SIZEOF_entry_stack, sizeof(struct entry_stack));
|
|
DEFINE(MASK_entry_stack, (~(sizeof(struct entry_stack) - 1)));
|
|
|
|
/* Offset for fields in tss_struct */
|
|
OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
|
|
OFFSET(TSS_sp1, tss_struct, x86_tss.sp1);
|
|
OFFSET(TSS_sp2, tss_struct, x86_tss.sp2);
|
|
}
|