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https://github.com/edk2-porting/linux-next.git
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f314f33be7
In preparation to convert SA1100 to sparse irq, set .nr_irqs for each machine and explicitly include mach/irqs.h as needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
153 lines
3.4 KiB
C
153 lines
3.4 KiB
C
/*
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* linux/arch/arm/mach-sa1100/lart.c
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/tty.h>
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#include <video/sa1100fb.h>
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#include <mach/hardware.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/page.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/serial_sa1100.h>
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#include <mach/mcp.h>
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#include <mach/irqs.h>
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#include "generic.h"
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#warning "include/asm/arch-sa1100/ide.h needs fixing for lart"
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static struct mcp_plat_data lart_mcp_data = {
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.mccr0 = MCCR0_ADM,
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.sclk_rate = 11981000,
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};
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#ifdef LART_GREY_LCD
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static struct sa1100fb_mach_info lart_grey_info = {
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.pixclock = 150000, .bpp = 4,
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.xres = 320, .yres = 240,
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.hsync_len = 1, .vsync_len = 1,
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.left_margin = 4, .upper_margin = 0,
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.right_margin = 2, .lower_margin = 0,
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.cmap_greyscale = 1,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
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.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
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};
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#endif
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#ifdef LART_COLOR_LCD
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static struct sa1100fb_mach_info lart_color_info = {
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.pixclock = 150000, .bpp = 16,
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.xres = 320, .yres = 240,
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.hsync_len = 2, .vsync_len = 3,
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.left_margin = 69, .upper_margin = 14,
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.right_margin = 8, .lower_margin = 4,
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.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
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.lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
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};
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#endif
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#ifdef LART_VIDEO_OUT
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static struct sa1100fb_mach_info lart_video_info = {
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.pixclock = 39721, .bpp = 16,
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.xres = 640, .yres = 480,
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.hsync_len = 95, .vsync_len = 2,
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.left_margin = 40, .upper_margin = 32,
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.right_margin = 24, .lower_margin = 11,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
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.lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
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};
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#endif
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#ifdef LART_KIT01_LCD
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static struct sa1100fb_mach_info lart_kit01_info = {
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.pixclock = 63291, .bpp = 16,
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.xres = 640, .yres = 480,
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.hsync_len = 64, .vsync_len = 3,
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.left_margin = 122, .upper_margin = 45,
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.right_margin = 10, .lower_margin = 10,
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.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
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.lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg
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};
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#endif
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static void __init lart_init(void)
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{
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struct sa1100fb_mach_info *inf = NULL;
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#ifdef LART_GREY_LCD
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inf = &lart_grey_info;
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#endif
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#ifdef LART_COLOR_LCD
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inf = &lart_color_info;
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#endif
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#ifdef LART_VIDEO_OUT
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inf = &lart_video_info;
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#endif
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#ifdef LART_KIT01_LCD
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inf = &lart_kit01_info;
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#endif
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if (inf)
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sa11x0_register_lcd(inf);
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sa11x0_ppc_configure_mcp();
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sa11x0_register_mcp(&lart_mcp_data);
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}
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static struct map_desc lart_io_desc[] __initdata = {
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{ /* main flash memory */
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.virtual = 0xe8000000,
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.pfn = __phys_to_pfn(0x00000000),
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.length = 0x00400000,
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.type = MT_DEVICE
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}, { /* main flash, alternative location */
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.virtual = 0xec000000,
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.pfn = __phys_to_pfn(0x08000000),
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.length = 0x00400000,
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.type = MT_DEVICE
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}
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};
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static void __init lart_map_io(void)
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{
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sa1100_map_io();
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iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc));
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sa1100_register_uart(0, 3);
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sa1100_register_uart(1, 1);
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sa1100_register_uart(2, 2);
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GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
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GPDR |= GPIO_UART_TXD;
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GPDR &= ~GPIO_UART_RXD;
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PPAR |= PPAR_UPR;
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}
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MACHINE_START(LART, "LART")
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.atag_offset = 0x100,
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.map_io = lart_map_io,
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.nr_irqs = SA1100_NR_IRQS,
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.init_irq = sa1100_init_irq,
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.init_machine = lart_init,
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.timer = &sa1100_timer,
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.restart = sa11x0_restart,
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MACHINE_END
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