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a9372a5fb2
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are: * Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes Hard to tell what else is different, because documentation is not available. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> |
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| .. | ||
| clk-apbc.c | ||
| clk-apmu.c | ||
| clk-frac.c | ||
| clk-gate.c | ||
| clk-mix.c | ||
| clk-mmp2.c | ||
| clk-of-mmp2.c | ||
| clk-of-pxa168.c | ||
| clk-of-pxa910.c | ||
| clk-of-pxa1928.c | ||
| clk-pxa168.c | ||
| clk-pxa910.c | ||
| clk.c | ||
| clk.h | ||
| Makefile | ||
| reset.c | ||
| reset.h | ||