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linux-next/drivers/gpu
Chris Wilson 06fbca713e drm/i915: Split the batch pool by engine
I woke up one morning and found 50k objects sitting in the batch pool
and every search seemed to iterate the entire list... Painting the
screen in oils would provide a more fluid display.

One issue with the current design is that we only check for retirements
on the current ring when preparing to submit a new batch. This means
that we can have thousands of "active" batches on another ring that we
have to walk over. The simplest way to avoid that is to split the pools
per ring and then our LRU execution ordering will also ensure that the
inactive buffers remain at the front.

v2: execlists still requires duplicate code.
v3: execlists requires more duplicate code

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by:  Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-04-10 08:56:04 +02:00
..
drm drm/i915: Split the batch pool by engine 2015-04-10 08:56:04 +02:00
host1x gpu: host1x: Provide a proper struct bus_type 2015-01-27 10:09:14 +01:00
ipu-v3 gpu: ipu-v3: do not divide by zero if the pixel clock is too large 2015-02-23 17:18:59 +01:00
vga Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-10-13 16:23:15 +02:00
Makefile gpu: host1x: Provide a proper struct bus_type 2015-01-27 10:09:14 +01:00