mirror of
https://github.com/edk2-porting/linux-next.git
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b9652c2d12
For I2S, DAS, PCM devices Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
576 lines
12 KiB
C
576 lines
12 KiB
C
/*
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* Copyright (C) 2010,2011 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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* Erik Gilling <ccross@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/resource.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/fsl_devices.h>
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#include <linux/serial_8250.h>
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#include <asm/pmu.h>
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#include <mach/irqs.h>
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#include <mach/iomap.h>
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#include <mach/dma.h>
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static struct resource i2c_resource1[] = {
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[0] = {
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.start = INT_I2C,
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.end = INT_I2C,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_I2C_BASE,
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.end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource i2c_resource2[] = {
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[0] = {
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.start = INT_I2C2,
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.end = INT_I2C2,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_I2C2_BASE,
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.end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource i2c_resource3[] = {
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[0] = {
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.start = INT_I2C3,
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.end = INT_I2C3,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_I2C3_BASE,
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.end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource i2c_resource4[] = {
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[0] = {
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.start = INT_DVC,
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.end = INT_DVC,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_DVC_BASE,
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.end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device tegra_i2c_device1 = {
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.name = "tegra-i2c",
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.id = 0,
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.resource = i2c_resource1,
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.num_resources = ARRAY_SIZE(i2c_resource1),
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.dev = {
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.platform_data = 0,
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},
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};
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struct platform_device tegra_i2c_device2 = {
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.name = "tegra-i2c",
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.id = 1,
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.resource = i2c_resource2,
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.num_resources = ARRAY_SIZE(i2c_resource2),
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.dev = {
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.platform_data = 0,
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},
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};
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struct platform_device tegra_i2c_device3 = {
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.name = "tegra-i2c",
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.id = 2,
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.resource = i2c_resource3,
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.num_resources = ARRAY_SIZE(i2c_resource3),
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.dev = {
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.platform_data = 0,
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},
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};
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struct platform_device tegra_i2c_device4 = {
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.name = "tegra-i2c",
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.id = 3,
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.resource = i2c_resource4,
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.num_resources = ARRAY_SIZE(i2c_resource4),
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.dev = {
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.platform_data = 0,
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},
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};
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static struct resource spi_resource1[] = {
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[0] = {
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.start = INT_S_LINK1,
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.end = INT_S_LINK1,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SPI1_BASE,
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.end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource spi_resource2[] = {
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[0] = {
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.start = INT_SPI_2,
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.end = INT_SPI_2,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SPI2_BASE,
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.end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource spi_resource3[] = {
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[0] = {
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.start = INT_SPI_3,
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.end = INT_SPI_3,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SPI3_BASE,
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.end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource spi_resource4[] = {
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[0] = {
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.start = INT_SPI_4,
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.end = INT_SPI_4,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SPI4_BASE,
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.end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device tegra_spi_device1 = {
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.name = "spi_tegra",
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.id = 0,
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.resource = spi_resource1,
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.num_resources = ARRAY_SIZE(spi_resource1),
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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struct platform_device tegra_spi_device2 = {
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.name = "spi_tegra",
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.id = 1,
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.resource = spi_resource2,
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.num_resources = ARRAY_SIZE(spi_resource2),
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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struct platform_device tegra_spi_device3 = {
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.name = "spi_tegra",
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.id = 2,
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.resource = spi_resource3,
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.num_resources = ARRAY_SIZE(spi_resource3),
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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struct platform_device tegra_spi_device4 = {
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.name = "spi_tegra",
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.id = 3,
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.resource = spi_resource4,
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.num_resources = ARRAY_SIZE(spi_resource4),
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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static struct resource sdhci_resource1[] = {
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[0] = {
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.start = INT_SDMMC1,
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.end = INT_SDMMC1,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SDMMC1_BASE,
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.end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource sdhci_resource2[] = {
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[0] = {
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.start = INT_SDMMC2,
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.end = INT_SDMMC2,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SDMMC2_BASE,
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.end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource sdhci_resource3[] = {
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[0] = {
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.start = INT_SDMMC3,
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.end = INT_SDMMC3,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SDMMC3_BASE,
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.end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource sdhci_resource4[] = {
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[0] = {
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.start = INT_SDMMC4,
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.end = INT_SDMMC4,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = TEGRA_SDMMC4_BASE,
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.end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
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.flags = IORESOURCE_MEM,
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},
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};
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/* board files should fill in platform_data register the devices themselvs.
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* See board-harmony.c for an example
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*/
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struct platform_device tegra_sdhci_device1 = {
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.name = "sdhci-tegra",
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.id = 0,
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.resource = sdhci_resource1,
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.num_resources = ARRAY_SIZE(sdhci_resource1),
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};
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struct platform_device tegra_sdhci_device2 = {
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.name = "sdhci-tegra",
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.id = 1,
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.resource = sdhci_resource2,
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.num_resources = ARRAY_SIZE(sdhci_resource2),
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};
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struct platform_device tegra_sdhci_device3 = {
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.name = "sdhci-tegra",
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.id = 2,
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.resource = sdhci_resource3,
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.num_resources = ARRAY_SIZE(sdhci_resource3),
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};
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struct platform_device tegra_sdhci_device4 = {
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.name = "sdhci-tegra",
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.id = 3,
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.resource = sdhci_resource4,
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.num_resources = ARRAY_SIZE(sdhci_resource4),
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};
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static struct resource tegra_usb1_resources[] = {
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[0] = {
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.start = TEGRA_USB_BASE,
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.end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_USB,
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.end = INT_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource tegra_usb2_resources[] = {
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[0] = {
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.start = TEGRA_USB2_BASE,
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.end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_USB2,
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.end = INT_USB2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource tegra_usb3_resources[] = {
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[0] = {
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.start = TEGRA_USB3_BASE,
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.end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_USB3,
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.end = INT_USB3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
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struct platform_device tegra_ehci1_device = {
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.name = "tegra-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &tegra_ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = tegra_usb1_resources,
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.num_resources = ARRAY_SIZE(tegra_usb1_resources),
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};
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struct platform_device tegra_ehci2_device = {
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.name = "tegra-ehci",
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.id = 1,
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.dev = {
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.dma_mask = &tegra_ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = tegra_usb2_resources,
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.num_resources = ARRAY_SIZE(tegra_usb2_resources),
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};
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struct platform_device tegra_ehci3_device = {
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.name = "tegra-ehci",
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.id = 2,
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.dev = {
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.dma_mask = &tegra_ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = tegra_usb3_resources,
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.num_resources = ARRAY_SIZE(tegra_usb3_resources),
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};
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static struct resource tegra_pmu_resources[] = {
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[0] = {
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.start = INT_CPU0_PMU_INTR,
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.end = INT_CPU0_PMU_INTR,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = INT_CPU1_PMU_INTR,
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.end = INT_CPU1_PMU_INTR,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device tegra_pmu_device = {
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.name = "arm-pmu",
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.id = ARM_PMU_DEVICE_CPU,
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.num_resources = ARRAY_SIZE(tegra_pmu_resources),
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.resource = tegra_pmu_resources,
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};
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static struct resource tegra_uarta_resources[] = {
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[0] = {
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.start = TEGRA_UARTA_BASE,
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.end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_UARTA,
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.end = INT_UARTA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource tegra_uartb_resources[] = {
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[0] = {
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.start = TEGRA_UARTB_BASE,
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.end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_UARTB,
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.end = INT_UARTB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource tegra_uartc_resources[] = {
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[0] = {
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.start = TEGRA_UARTC_BASE,
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.end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_UARTC,
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.end = INT_UARTC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource tegra_uartd_resources[] = {
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[0] = {
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.start = TEGRA_UARTD_BASE,
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.end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_UARTD,
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.end = INT_UARTD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource tegra_uarte_resources[] = {
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[0] = {
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.start = TEGRA_UARTE_BASE,
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.end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_UARTE,
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.end = INT_UARTE,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device tegra_uarta_device = {
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.name = "tegra_uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(tegra_uarta_resources),
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.resource = tegra_uarta_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uartb_device = {
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.name = "tegra_uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(tegra_uartb_resources),
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.resource = tegra_uartb_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uartc_device = {
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.name = "tegra_uart",
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.id = 2,
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.num_resources = ARRAY_SIZE(tegra_uartc_resources),
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.resource = tegra_uartc_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uartd_device = {
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.name = "tegra_uart",
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.id = 3,
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.num_resources = ARRAY_SIZE(tegra_uartd_resources),
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.resource = tegra_uartd_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uarte_device = {
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.name = "tegra_uart",
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.id = 4,
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.num_resources = ARRAY_SIZE(tegra_uarte_resources),
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.resource = tegra_uarte_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static struct resource i2s_resource1[] = {
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[0] = {
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.start = INT_I2S1,
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.end = INT_I2S1,
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.flags = IORESOURCE_IRQ
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},
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[1] = {
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.start = TEGRA_DMA_REQ_SEL_I2S_1,
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.end = TEGRA_DMA_REQ_SEL_I2S_1,
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.flags = IORESOURCE_DMA
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},
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[2] = {
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|
.start = TEGRA_I2S1_BASE,
|
|
.end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
|
|
.flags = IORESOURCE_MEM
|
|
}
|
|
};
|
|
|
|
static struct resource i2s_resource2[] = {
|
|
[0] = {
|
|
.start = INT_I2S2,
|
|
.end = INT_I2S2,
|
|
.flags = IORESOURCE_IRQ
|
|
},
|
|
[1] = {
|
|
.start = TEGRA_DMA_REQ_SEL_I2S2_1,
|
|
.end = TEGRA_DMA_REQ_SEL_I2S2_1,
|
|
.flags = IORESOURCE_DMA
|
|
},
|
|
[2] = {
|
|
.start = TEGRA_I2S2_BASE,
|
|
.end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
|
|
.flags = IORESOURCE_MEM
|
|
}
|
|
};
|
|
|
|
struct platform_device tegra_i2s_device1 = {
|
|
.name = "tegra-i2s",
|
|
.id = 0,
|
|
.resource = i2s_resource1,
|
|
.num_resources = ARRAY_SIZE(i2s_resource1),
|
|
};
|
|
|
|
struct platform_device tegra_i2s_device2 = {
|
|
.name = "tegra-i2s",
|
|
.id = 1,
|
|
.resource = i2s_resource2,
|
|
.num_resources = ARRAY_SIZE(i2s_resource2),
|
|
};
|
|
|
|
static struct resource tegra_das_resources[] = {
|
|
[0] = {
|
|
.start = TEGRA_APB_MISC_DAS_BASE,
|
|
.end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
struct platform_device tegra_das_device = {
|
|
.name = "tegra-das",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(tegra_das_resources),
|
|
.resource = tegra_das_resources,
|
|
};
|
|
|
|
struct platform_device tegra_pcm_device = {
|
|
.name = "tegra-pcm-audio",
|
|
.id = -1,
|
|
};
|