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97594b0f35
Commit
06824ba (ARM: tlb: delay page freeing for SMP and ARMv7 CPUs)
introduced a build failure for builds with CONFIG_SWAP=n:
In file included from arch/arm/mm/init.c:27:
arch/arm/include/asm/tlb.h: In function 'tlb_flush_mmu':
arch/arm/include/asm/tlb.h:101: error: implicit declaration of function 'release_pages'
arch/arm/include/asm/tlb.h: In function 'tlb_remove_page':
arch/arm/include/asm/tlb.h:165: error: implicit declaration of function 'page_cache_release'
as linux/swap.h doesn't include linux/pagemap.h but actually needs it
(see comments in linux/swap.h as to why this is.)
Fix that by #including <linux/pagemap.h> in <asm/pgalloc.h> as it's done
by x86.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
141 lines
3.1 KiB
C
141 lines
3.1 KiB
C
/*
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* arch/arm/include/asm/pgalloc.h
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*
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* Copyright (C) 2000-2001 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _ASMARM_PGALLOC_H
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#define _ASMARM_PGALLOC_H
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#include <linux/pagemap.h>
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#include <asm/domain.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#define check_pgt_cache() do { } while (0)
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#ifdef CONFIG_MMU
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#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
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#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
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/*
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* Since we have only two-level page tables, these are trivial
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*/
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#define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); })
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#define pmd_free(mm, pmd) do { } while (0)
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#define pgd_populate(mm,pmd,pte) BUG()
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
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#define PGALLOC_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO)
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static inline void clean_pte_table(pte_t *pte)
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{
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clean_dcache_area(pte + PTE_HWTABLE_PTRS, PTE_HWTABLE_SIZE);
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}
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/*
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* Allocate one PTE table.
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*
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* This actually allocates two hardware PTE tables, but we wrap this up
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* into one table thus:
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*
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* +------------+
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* | Linux pt 0 |
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* +------------+
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* | Linux pt 1 |
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* +------------+
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* | h/w pt 0 |
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* +------------+
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* | h/w pt 1 |
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* +------------+
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*/
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static inline pte_t *
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pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
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{
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pte_t *pte;
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pte = (pte_t *)__get_free_page(PGALLOC_GFP);
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if (pte)
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clean_pte_table(pte);
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return pte;
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}
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static inline pgtable_t
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pte_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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struct page *pte;
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#ifdef CONFIG_HIGHPTE
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pte = alloc_pages(PGALLOC_GFP | __GFP_HIGHMEM, 0);
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#else
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pte = alloc_pages(PGALLOC_GFP, 0);
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#endif
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if (pte) {
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if (!PageHighMem(pte))
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clean_pte_table(page_address(pte));
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pgtable_page_ctor(pte);
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}
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return pte;
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}
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/*
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* Free one PTE table.
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*/
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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if (pte)
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free_page((unsigned long)pte);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
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{
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pgtable_page_dtor(pte);
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__free_page(pte);
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}
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static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
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unsigned long prot)
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{
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unsigned long pmdval = (pte + PTE_HWTABLE_OFF) | prot;
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pmdp[0] = __pmd(pmdval);
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pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
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flush_pmd_entry(pmdp);
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}
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/*
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* Populate the pmdp entry with a pointer to the pte. This pmd is part
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* of the mm address space.
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*
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* Ensure that we always set both PMD entries.
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*/
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static inline void
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pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
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{
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/*
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* The pmd must be loaded with the physical address of the PTE table
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*/
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__pmd_populate(pmdp, __pa(ptep), _PAGE_KERNEL_TABLE);
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}
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static inline void
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pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
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{
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__pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE);
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}
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#define pmd_pgtable(pmd) pmd_page(pmd)
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#endif /* CONFIG_MMU */
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#endif
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