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06b7a7a5ec
Quoting the comment: * SDM documents that on family 6 bank 0 should not be written * because it aliases to another special BIOS controlled * register. * But it's not aliased anymore on model 0x1a+ * Don't ignore bank 0 completely because there could be a valid * event later, merely don't write CTL0. This is mostly a port on the 32bit code, except that 32bit always didn't write it and didn't have the 0x1a heuristic. I checked with the CPU designers that the quirk is not required starting with this model. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> |
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.. | ||
cpufreq | ||
mcheck | ||
mtrr | ||
.gitignore | ||
addon_cpuid_features.c | ||
amd.c | ||
bugs_64.c | ||
bugs.c | ||
centaur.c | ||
cmpxchg.c | ||
common.c | ||
cpu_debug.c | ||
cpu.h | ||
cyrix.c | ||
hypervisor.c | ||
intel_cacheinfo.c | ||
intel.c | ||
Makefile | ||
mkcapflags.pl | ||
perfctr-watchdog.c | ||
powerflags.c | ||
proc.c | ||
transmeta.c | ||
umc.c | ||
vmware.c |