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9ffc93f203
Remove all #inclusions of asm/system.h preparatory to splitting and killing it. Performed with the following command: perl -p -i -e 's!^#\s*include\s*<asm/system[.]h>.*\n!!' `grep -Irl '^#\s*include\s*<asm/system[.]h>' *` Signed-off-by: David Howells <dhowells@redhat.com>
108 lines
3.6 KiB
C
108 lines
3.6 KiB
C
/*
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* Extend a 32-bit counter to 63 bits
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*
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* Author: Nicolas Pitre
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* Created: December 3, 2006
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* Copyright: MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*/
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#ifndef __LINUX_CNT32_TO_63_H__
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#define __LINUX_CNT32_TO_63_H__
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/byteorder.h>
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/* this is used only to give gcc a clue about good code generation */
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union cnt32_to_63 {
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struct {
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#if defined(__LITTLE_ENDIAN)
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u32 lo, hi;
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#elif defined(__BIG_ENDIAN)
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u32 hi, lo;
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#endif
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};
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u64 val;
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};
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/**
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* cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
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* @cnt_lo: The low part of the counter
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*
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* Many hardware clock counters are only 32 bits wide and therefore have
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* a relatively short period making wrap-arounds rather frequent. This
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* is a problem when implementing sched_clock() for example, where a 64-bit
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* non-wrapping monotonic value is expected to be returned.
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*
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* To overcome that limitation, let's extend a 32-bit counter to 63 bits
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* in a completely lock free fashion. Bits 0 to 31 of the clock are provided
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* by the hardware while bits 32 to 62 are stored in memory. The top bit in
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* memory is used to synchronize with the hardware clock half-period. When
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* the top bit of both counters (hardware and in memory) differ then the
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* memory is updated with a new value, incrementing it when the hardware
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* counter wraps around.
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*
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* Because a word store in memory is atomic then the incremented value will
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* always be in synch with the top bit indicating to any potential concurrent
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* reader if the value in memory is up to date or not with regards to the
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* needed increment. And any race in updating the value in memory is harmless
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* as the same value would simply be stored more than once.
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*
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* The restrictions for the algorithm to work properly are:
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*
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* 1) this code must be called at least once per each half period of the
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* 32-bit counter;
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*
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* 2) this code must not be preempted for a duration longer than the
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* 32-bit counter half period minus the longest period between two
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* calls to this code;
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*
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* Those requirements ensure proper update to the state bit in memory.
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* This is usually not a problem in practice, but if it is then a kernel
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* timer should be scheduled to manage for this code to be executed often
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* enough.
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*
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* And finally:
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*
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* 3) the cnt_lo argument must be seen as a globally incrementing value,
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* meaning that it should be a direct reference to the counter data which
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* can be evaluated according to a specific ordering within the macro,
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* and not the result of a previous evaluation stored in a variable.
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*
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* For example, this is wrong:
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*
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* u32 partial = get_hw_count();
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* u64 full = cnt32_to_63(partial);
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* return full;
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*
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* This is fine:
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*
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* u64 full = cnt32_to_63(get_hw_count());
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* return full;
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*
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* Note that the top bit (bit 63) in the returned value should be considered
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* as garbage. It is not cleared here because callers are likely to use a
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* multiplier on the returned value which can get rid of the top bit
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* implicitly by making the multiplier even, therefore saving on a runtime
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* clear-bit instruction. Otherwise caller must remember to clear the top
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* bit explicitly.
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*/
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#define cnt32_to_63(cnt_lo) \
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({ \
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static u32 __m_cnt_hi; \
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union cnt32_to_63 __x; \
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__x.hi = __m_cnt_hi; \
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smp_rmb(); \
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__x.lo = (cnt_lo); \
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if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
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__m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
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__x.val; \
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})
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#endif
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