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aa8a5e0062
On some CPUs we can prevent the Meltdown vulnerability by flushing the L1-D cache on exit from kernel to user mode, and from hypervisor to guest. This is known to be the case on at least Power7, Power8 and Power9. At this time we do not know the status of the vulnerability on other CPUs such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale CPUs. As more information comes to light we can enable this, or other mechanisms on those CPUs. The vulnerability occurs when the load of an architecturally inaccessible memory region (eg. userspace load of kernel memory) is speculatively executed to the point where its result can influence the address of a subsequent speculatively executed load. In order for that to happen, the first load must hit in the L1, because before the load is sent to the L2 the permission check is performed. Therefore if no kernel addresses hit in the L1 the vulnerability can not occur. We can ensure that is the case by flushing the L1 whenever we return to userspace. Similarly for hypervisor vs guest. In order to flush the L1-D cache on exit, we add a section of nops at each (h)rfi location that returns to a lower privileged context, and patch that with some sequence. Newer firmwares are able to advertise to us that there is a special nop instruction that flushes the L1-D. If we do not see that advertised, we fall back to doing a displacement flush in software. For guest kernels we support migration between some CPU versions, and different CPUs may use different flush instructions. So that we are prepared to migrate to a machine with a different flush instruction activated, we may have to patch more than one flush instruction at boot if the hypervisor tells us to. In the end this patch is mostly the work of Nicholas Piggin and Michael Ellerman. However a cast of thousands contributed to analysis of the issue, earlier versions of the patch, back ports testing etc. Many thanks to all of them. Tested-by: Jon Masters <jcm@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
209 lines
7.2 KiB
C
209 lines
7.2 KiB
C
#ifndef __ASM_POWERPC_FEATURE_FIXUPS_H
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#define __ASM_POWERPC_FEATURE_FIXUPS_H
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* Feature section common macros
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*
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* Note that the entries now contain offsets between the table entry
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* and the code rather than absolute code pointers in order to be
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* useable with the vdso shared library. There is also an assumption
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* that values will be negative, that is, the fixup table has to be
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* located after the code it fixes up.
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*/
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#if defined(CONFIG_PPC64) && !defined(__powerpc64__)
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/* 64 bits kernel, 32 bits code (ie. vdso32) */
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#define FTR_ENTRY_LONG .8byte
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#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
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#elif defined(CONFIG_PPC64)
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#define FTR_ENTRY_LONG .8byte
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#define FTR_ENTRY_OFFSET .8byte
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#else
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#define FTR_ENTRY_LONG .long
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#define FTR_ENTRY_OFFSET .long
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#endif
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#define START_FTR_SECTION(label) label##1:
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#define FTR_SECTION_ELSE_NESTED(label) \
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label##2: \
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.pushsection __ftr_alt_##label,"a"; \
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.align 2; \
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label##3:
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#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
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label##4: \
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.popsection; \
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.pushsection sect,"a"; \
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.align 3; \
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label##5: \
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FTR_ENTRY_LONG msk; \
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FTR_ENTRY_LONG val; \
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FTR_ENTRY_OFFSET label##1b-label##5b; \
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FTR_ENTRY_OFFSET label##2b-label##5b; \
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FTR_ENTRY_OFFSET label##3b-label##5b; \
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FTR_ENTRY_OFFSET label##4b-label##5b; \
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.ifgt (label##4b- label##3b)-(label##2b- label##1b); \
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.error "Feature section else case larger than body"; \
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.endif; \
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.popsection;
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/* CPU feature dependent sections */
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#define BEGIN_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
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#define BEGIN_FTR_SECTION START_FTR_SECTION(97)
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#define END_FTR_SECTION_NESTED(msk, val, label) \
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FTR_SECTION_ELSE_NESTED(label) \
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MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
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#define END_FTR_SECTION(msk, val) \
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END_FTR_SECTION_NESTED(msk, val, 97)
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#define END_FTR_SECTION_NESTED_IFSET(msk, label) \
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END_FTR_SECTION_NESTED((msk), (msk), label)
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#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
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#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
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/* CPU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
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#define FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97)
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#define ALT_FTR_SECTION_END_NESTED(msk, val, label) \
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MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
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#define ALT_FTR_SECTION_END_NESTED_IFSET(msk, label) \
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ALT_FTR_SECTION_END_NESTED(msk, msk, label)
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#define ALT_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
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ALT_FTR_SECTION_END_NESTED(msk, 0, label)
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#define ALT_FTR_SECTION_END(msk, val) \
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ALT_FTR_SECTION_END_NESTED(msk, val, 97)
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#define ALT_FTR_SECTION_END_IFSET(msk) \
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ALT_FTR_SECTION_END_NESTED_IFSET(msk, 97)
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#define ALT_FTR_SECTION_END_IFCLR(msk) \
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ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
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/* MMU feature dependent sections */
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#define BEGIN_MMU_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
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#define BEGIN_MMU_FTR_SECTION START_FTR_SECTION(97)
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#define END_MMU_FTR_SECTION_NESTED(msk, val, label) \
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FTR_SECTION_ELSE_NESTED(label) \
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MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
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#define END_MMU_FTR_SECTION(msk, val) \
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END_MMU_FTR_SECTION_NESTED(msk, val, 97)
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#define END_MMU_FTR_SECTION_IFSET(msk) END_MMU_FTR_SECTION((msk), (msk))
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#define END_MMU_FTR_SECTION_IFCLR(msk) END_MMU_FTR_SECTION((msk), 0)
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/* MMU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
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#define MMU_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label)
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#define MMU_FTR_SECTION_ELSE MMU_FTR_SECTION_ELSE_NESTED(97)
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#define ALT_MMU_FTR_SECTION_END_NESTED(msk, val, label) \
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MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
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#define ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, label) \
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ALT_MMU_FTR_SECTION_END_NESTED(msk, msk, label)
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#define ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
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ALT_MMU_FTR_SECTION_END_NESTED(msk, 0, label)
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#define ALT_MMU_FTR_SECTION_END(msk, val) \
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ALT_MMU_FTR_SECTION_END_NESTED(msk, val, 97)
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#define ALT_MMU_FTR_SECTION_END_IFSET(msk) \
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ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, 97)
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#define ALT_MMU_FTR_SECTION_END_IFCLR(msk) \
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ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
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/* Firmware feature dependent sections */
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#define BEGIN_FW_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
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#define BEGIN_FW_FTR_SECTION START_FTR_SECTION(97)
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#define END_FW_FTR_SECTION_NESTED(msk, val, label) \
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FTR_SECTION_ELSE_NESTED(label) \
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MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
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#define END_FW_FTR_SECTION(msk, val) \
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END_FW_FTR_SECTION_NESTED(msk, val, 97)
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#define END_FW_FTR_SECTION_IFSET(msk) END_FW_FTR_SECTION((msk), (msk))
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#define END_FW_FTR_SECTION_IFCLR(msk) END_FW_FTR_SECTION((msk), 0)
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/* Firmware feature sections with alternatives */
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#define FW_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label)
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#define FW_FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97)
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#define ALT_FW_FTR_SECTION_END_NESTED(msk, val, label) \
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MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
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#define ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, label) \
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ALT_FW_FTR_SECTION_END_NESTED(msk, msk, label)
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#define ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
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ALT_FW_FTR_SECTION_END_NESTED(msk, 0, label)
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#define ALT_FW_FTR_SECTION_END(msk, val) \
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ALT_FW_FTR_SECTION_END_NESTED(msk, val, 97)
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#define ALT_FW_FTR_SECTION_END_IFSET(msk) \
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ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, 97)
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#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
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ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
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#ifndef __ASSEMBLY__
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#define ASM_FTR_IF(section_if, section_else, msk, val) \
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stringify_in_c(BEGIN_FTR_SECTION) \
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section_if "; " \
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stringify_in_c(FTR_SECTION_ELSE) \
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section_else "; " \
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stringify_in_c(ALT_FTR_SECTION_END((msk), (val)))
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#define ASM_FTR_IFSET(section_if, section_else, msk) \
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ASM_FTR_IF(section_if, section_else, (msk), (msk))
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#define ASM_FTR_IFCLR(section_if, section_else, msk) \
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ASM_FTR_IF(section_if, section_else, (msk), 0)
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#define ASM_MMU_FTR_IF(section_if, section_else, msk, val) \
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stringify_in_c(BEGIN_MMU_FTR_SECTION) \
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section_if "; " \
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stringify_in_c(MMU_FTR_SECTION_ELSE) \
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section_else "; " \
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stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
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#define ASM_MMU_FTR_IFSET(section_if, section_else, msk) \
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ASM_MMU_FTR_IF(section_if, section_else, (msk), (msk))
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#define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \
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ASM_MMU_FTR_IF(section_if, section_else, (msk), 0)
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#endif /* __ASSEMBLY__ */
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/* LWSYNC feature sections */
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#define START_LWSYNC_SECTION(label) label##1:
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#define MAKE_LWSYNC_SECTION_ENTRY(label, sect) \
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label##2: \
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.pushsection sect,"a"; \
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.align 2; \
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label##3: \
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FTR_ENTRY_OFFSET label##1b-label##3b; \
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.popsection;
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#define RFI_FLUSH_FIXUP_SECTION \
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951: \
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.pushsection __rfi_flush_fixup,"a"; \
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.align 2; \
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952: \
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FTR_ENTRY_OFFSET 951b-952b; \
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.popsection;
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;
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void apply_feature_fixups(void);
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void setup_feature_keys(void);
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#endif
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#endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */
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