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0307e1770f
Define CPU interface offsets for the GICC_ABPR, GICC_APR, and GICC_IIDR registers. Define distributor registers for the GICD_SPENDSGIR and the GICD_CPENDSGIR. KVM/ARM needs to know about these definitions to fully support save/restore of the VGIC. Also define some masks and shifts for the various GICH_VMCR fields. Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> |
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arm-gic.h | ||
arm-vic.h | ||
chained_irq.h | ||
metag-ext.h | ||
metag.h | ||
mmp.h | ||
mxs.h | ||
spear-shirq.h | ||
versatile-fpga.h |