mirror of
https://github.com/edk2-porting/linux-next.git
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18b8bfdfba
Including: - PASID table handling updates for the Intel VT-d driver. It implements a global PASID space now so that applications usings multiple devices will just have one PASID. - A new config option to make iommu passthroug mode the default. - New sysfs attribute for iommu groups to export the type of the default domain. - A debugfs interface (for debug only) usable by IOMMU drivers to export internals to user-space. - R-Car Gen3 SoCs support for the ipmmu-vmsa driver - The ARM-SMMU now aborts transactions from unknown devices and devices not attached to any domain. - Various cleanups and smaller fixes all over the place. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJbf/9wAAoJECvwRC2XARrjcuYP/3dIsOFN7Xb4sTOB5wxk4wmD 2Rm5o/18cFekEy4M8fwIBCYkzH/McohgKbOFcH6XiCxIwJ5RdXzITLAwmp4PbvIO KtwppXSp+MQtboip/bp6NDNBhABErgUtgdXawwENCCrFivXDsB8W4wnXESAOkLv9 4fLXrUgDFCAquLZpLqQobXHhajtGAkSekaasphlhejXFulFyF1YcEUcliU7eXZ0R rZjL4Zqcyyi5kv6d3WhL+tvmmhr7wfMsMPaW18eRf9tXvMpWRM2GOAj65coI2AWs 1T1kW/jvvrxnewOsmo1nYlw7R07uiRkUfHmJ9tY65xW4120HJFhdFLPUQZXfrX/b wcGbheYIh6cwAaZBtPJ35bPeW6pREkDOShohbzt45T62Q837cBkr3zyHhNsoOXHS 13YVtTd2vtPa4iLdu2qmEOC1OuhQnMvqHqX0iN8U74QbDxEYYvMfAdx0JL3hmPp/ uynY3QmXIKCeZg+vH2qcWHm07nfaAr5y8WSPA0crnqeznD5zJ4kvJf5dFGmDyTKr pyTkhidkifm6ZejrJsDZveoZdLpHrOatrqKaoLFh2crMUG3d807NYqQ3JmA3NDjg zPbYyU4joFGNVjd3XkSnRTGxR6YvLIwNbkQ3b/K/B5AqWJ6VrTbbTCOa4GSms6rF Qm8wRrmYaycKxkcMqtls =TeYQ -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: - PASID table handling updates for the Intel VT-d driver. It implements a global PASID space now so that applications usings multiple devices will just have one PASID. - A new config option to make iommu passthroug mode the default. - New sysfs attribute for iommu groups to export the type of the default domain. - A debugfs interface (for debug only) usable by IOMMU drivers to export internals to user-space. - R-Car Gen3 SoCs support for the ipmmu-vmsa driver - The ARM-SMMU now aborts transactions from unknown devices and devices not attached to any domain. - Various cleanups and smaller fixes all over the place. * tag 'iommu-updates-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (42 commits) iommu/omap: Fix cache flushes on L2 table entries iommu: Remove the ->map_sg indirection iommu/arm-smmu-v3: Abort all transactions if SMMU is enabled in kdump kernel iommu/arm-smmu-v3: Prevent any devices access to memory without registration iommu/ipmmu-vmsa: Don't register as BUS IOMMU if machine doesn't have IPMMU-VMSA iommu/ipmmu-vmsa: Clarify supported platforms iommu/ipmmu-vmsa: Fix allocation in atomic context iommu: Add config option to set passthrough as default iommu: Add sysfs attribyte for domain type iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register iommu/arm-smmu: Error out only if not enough context interrupts iommu/io-pgtable-arm-v7s: Abort allocation when table address overflows the PTE iommu/io-pgtable-arm: Fix pgtable allocation in selftest iommu/vt-d: Remove the obsolete per iommu pasid tables iommu/vt-d: Apply per pci device pasid table in SVA iommu/vt-d: Allocate and free pasid table iommu/vt-d: Per PCI device pasid table interfaces iommu/vt-d: Add for_each_device_domain() helper iommu/vt-d: Move device_domain_info to header iommu/vt-d: Apply global PASID in SVA ...
197 lines
4.6 KiB
C
197 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/dma-direct.h>
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#include <linux/dma-debug.h>
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#include <linux/dmar.h>
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#include <linux/export.h>
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#include <linux/bootmem.h>
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#include <linux/gfp.h>
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#include <linux/pci.h>
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#include <asm/proto.h>
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#include <asm/dma.h>
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#include <asm/iommu.h>
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#include <asm/gart.h>
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#include <asm/calgary.h>
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#include <asm/x86_init.h>
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#include <asm/iommu_table.h>
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static bool disable_dac_quirk __read_mostly;
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const struct dma_map_ops *dma_ops = &dma_direct_ops;
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EXPORT_SYMBOL(dma_ops);
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#ifdef CONFIG_IOMMU_DEBUG
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int panic_on_overflow __read_mostly = 1;
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int force_iommu __read_mostly = 1;
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#else
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int panic_on_overflow __read_mostly = 0;
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int force_iommu __read_mostly = 0;
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#endif
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int iommu_merge __read_mostly = 0;
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int no_iommu __read_mostly;
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/* Set this to 1 if there is a HW IOMMU in the system */
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int iommu_detected __read_mostly = 0;
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/*
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* This variable becomes 1 if iommu=pt is passed on the kernel command line.
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* If this variable is 1, IOMMU implementations do no DMA translation for
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* devices and allow every device to access to whole physical memory. This is
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* useful if a user wants to use an IOMMU only for KVM device assignment to
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* guests and not for driver dma translation.
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* It is also possible to disable by default in kernel config, and enable with
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* iommu=nopt at boot time.
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*/
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#ifdef CONFIG_IOMMU_DEFAULT_PASSTHROUGH
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int iommu_pass_through __read_mostly = 1;
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#else
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int iommu_pass_through __read_mostly;
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#endif
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extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
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/* Dummy device used for NULL arguments (normally ISA). */
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struct device x86_dma_fallback_dev = {
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.init_name = "fallback device",
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.coherent_dma_mask = ISA_DMA_BIT_MASK,
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.dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
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};
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EXPORT_SYMBOL(x86_dma_fallback_dev);
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void __init pci_iommu_alloc(void)
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{
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struct iommu_table_entry *p;
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sort_iommu_table(__iommu_table, __iommu_table_end);
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check_iommu_entries(__iommu_table, __iommu_table_end);
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for (p = __iommu_table; p < __iommu_table_end; p++) {
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if (p && p->detect && p->detect() > 0) {
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p->flags |= IOMMU_DETECTED;
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if (p->early_init)
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p->early_init();
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if (p->flags & IOMMU_FINISH_IF_DETECTED)
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break;
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}
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}
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}
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bool arch_dma_alloc_attrs(struct device **dev)
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{
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if (!*dev)
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*dev = &x86_dma_fallback_dev;
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if (!is_device_dma_capable(*dev))
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return false;
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return true;
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}
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EXPORT_SYMBOL(arch_dma_alloc_attrs);
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/*
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* See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel
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* parameter documentation.
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*/
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static __init int iommu_setup(char *p)
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{
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iommu_merge = 1;
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if (!p)
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return -EINVAL;
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while (*p) {
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if (!strncmp(p, "off", 3))
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no_iommu = 1;
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/* gart_parse_options has more force support */
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if (!strncmp(p, "force", 5))
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force_iommu = 1;
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if (!strncmp(p, "noforce", 7)) {
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iommu_merge = 0;
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force_iommu = 0;
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}
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if (!strncmp(p, "biomerge", 8)) {
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iommu_merge = 1;
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force_iommu = 1;
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}
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if (!strncmp(p, "panic", 5))
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panic_on_overflow = 1;
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if (!strncmp(p, "nopanic", 7))
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panic_on_overflow = 0;
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if (!strncmp(p, "merge", 5)) {
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iommu_merge = 1;
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force_iommu = 1;
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}
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if (!strncmp(p, "nomerge", 7))
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iommu_merge = 0;
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if (!strncmp(p, "forcesac", 8))
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pr_warn("forcesac option ignored.\n");
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if (!strncmp(p, "allowdac", 8))
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pr_warn("allowdac option ignored.\n");
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if (!strncmp(p, "nodac", 5))
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pr_warn("nodac option ignored.\n");
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if (!strncmp(p, "usedac", 6)) {
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disable_dac_quirk = true;
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return 1;
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}
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#ifdef CONFIG_SWIOTLB
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if (!strncmp(p, "soft", 4))
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swiotlb = 1;
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#endif
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if (!strncmp(p, "pt", 2))
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iommu_pass_through = 1;
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if (!strncmp(p, "nopt", 4))
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iommu_pass_through = 0;
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gart_parse_options(p);
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#ifdef CONFIG_CALGARY_IOMMU
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if (!strncmp(p, "calgary", 7))
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use_calgary = 1;
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#endif /* CONFIG_CALGARY_IOMMU */
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p += strcspn(p, ",");
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if (*p == ',')
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++p;
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}
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return 0;
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}
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early_param("iommu", iommu_setup);
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static int __init pci_iommu_init(void)
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{
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struct iommu_table_entry *p;
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x86_init.iommu.iommu_init();
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for (p = __iommu_table; p < __iommu_table_end; p++) {
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if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
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p->late_init();
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}
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return 0;
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}
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/* Must execute after PCI subsystem */
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rootfs_initcall(pci_iommu_init);
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#ifdef CONFIG_PCI
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/* Many VIA bridges seem to corrupt data for DAC. Disable it here */
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static int via_no_dac_cb(struct pci_dev *pdev, void *data)
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{
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pdev->dev.bus_dma_mask = DMA_BIT_MASK(32);
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return 0;
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}
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static void via_no_dac(struct pci_dev *dev)
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{
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if (!disable_dac_quirk) {
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dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
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pci_walk_bus(dev->subordinate, via_no_dac_cb, NULL);
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}
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}
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DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
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PCI_CLASS_BRIDGE_PCI, 8, via_no_dac);
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#endif
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