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faf4a3ff36
Add device tree bindings for r8a7743 and r8a7745 DUs. r8a7743 DU is similar to the one from r8a7791, r8a7745 DU is similar to the one from r8a7794. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [Don't reference R8A779[0123456] and R8A774[35] explicitly] [Number all DPAD, HDMI and LVDS ports] Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
115 lines
4.4 KiB
Plaintext
115 lines
4.4 KiB
Plaintext
* Renesas R-Car Display Unit (DU)
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Required Properties:
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- compatible: must be one of the following.
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- "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU
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- "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
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- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
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- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
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- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
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- "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU
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- "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
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- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
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- "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
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- "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
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- reg: A list of base address and length of each memory resource, one for
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each entry in the reg-names property.
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- reg-names: Name of the memory resources. The DU requires one memory
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resource for the DU core (named "du") and one memory resource for each
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LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
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index).
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifiers for the DU interrupts.
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- clocks: A list of phandles + clock-specifier pairs, one for each entry in
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the clock-names property.
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- clock-names: Name of the clocks. This property is model-dependent.
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- R8A7779 uses a single functional clock. The clock doesn't need to be
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named.
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- All other DU instances use one functional clock per channel and one
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clock per LVDS encoder (if available). The functional clocks must be
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named "du.x" with "x" being the channel numerical index. The LVDS clocks
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must be named "lvds.x" with "x" being the LVDS encoder numerical index.
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- In addition to the functional and encoder clocks, all DU versions also
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support externally supplied pixel clocks. Those clocks are optional.
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When supplied they must be named "dclkin.x" with "x" being the input
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clock numerical index.
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- vsps: A list of phandle and channel index tuples to the VSPs that handle
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the memory interfaces for the DU channels. The phandle identifies the VSP
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instance that serves the DU channel, and the channel index identifies the
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LIF instance in that VSP.
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Required nodes:
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The connections to the DU output video ports are modeled using the OF graph
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bindings specified in Documentation/devicetree/bindings/graph.txt.
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The following table lists for each supported model the port number
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corresponding to each DU output.
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Port0 Port1 Port2 Port3
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-----------------------------------------------------------------------------
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R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - -
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R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - -
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R8A7779 (R-Car H1) DPAD 0 DPAD 1 - -
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R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
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R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - -
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R8A7792 (R-Car V2H) DPAD 0 DPAD 1 - -
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R8A7793 (R-Car M2-N) DPAD 0 LVDS 0 - -
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R8A7794 (R-Car E2) DPAD 0 DPAD 1 - -
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R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0
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R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 -
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Example: R8A7795 (R-Car H3) ES2.0 DU
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du: display@feb00000 {
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compatible = "renesas,du-r8a7795";
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reg = <0 0xfeb00000 0 0x80000>,
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<0 0xfeb90000 0 0x14>;
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reg-names = "du", "lvds.0";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 722>,
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<&cpg CPG_MOD 721>,
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<&cpg CPG_MOD 727>;
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clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
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vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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du_out_rgb: endpoint {
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};
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};
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port@1 {
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reg = <1>;
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du_out_hdmi0: endpoint {
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remote-endpoint = <&dw_hdmi0_in>;
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};
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};
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port@2 {
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reg = <2>;
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du_out_hdmi1: endpoint {
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remote-endpoint = <&dw_hdmi1_in>;
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};
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};
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port@3 {
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reg = <3>;
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du_out_lvds0: endpoint {
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};
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};
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};
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};
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