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linux-next/arch/x86/kvm
Liran Alon 0155b2b91b KVM: nVMX: Remove unnecessary TLB flushes on L1<->L2 switches when L1 use apic-access-page
According to Intel SDM section 28.3.3.3/28.3.3.4 Guidelines for Use
of the INVVPID/INVEPT Instruction, the hypervisor needs to execute
INVVPID/INVEPT X in case CPU executes VMEntry with VPID/EPTP X and
either: "Virtualize APIC accesses" VM-execution control was changed
from 0 to 1, OR the value of apic_access_page was changed.

In the nested case, the burden falls on L1, unless L0 enables EPT in
vmcs02 but L1 enables neither EPT nor VPID in vmcs12.  For this reason
prepare_vmcs02() and load_vmcs12_host_state() have special code to
request a TLB flush in case L1 does not use EPT but it uses
"virtualize APIC accesses".

This special case however is not necessary. On a nested vmentry the
physical TLB will already be flushed except if all the following apply:

* L0 uses VPID

* L1 uses VPID

* L0 can guarantee TLB entries populated while running L1 are tagged
differently than TLB entries populated while running L2.

If the first condition is false, the processor will flush the TLB
on vmentry to L2.  If the second or third condition are false,
prepare_vmcs02() will request KVM_REQ_TLB_FLUSH.  However, even
if both are true, no extra TLB flush is needed to handle the APIC
access page:

* if L1 doesn't use VPID, the second condition doesn't hold and the
TLB will be flushed anyway.

* if L1 uses VPID, it has to flush the TLB itself with INVVPID and
section 28.3.3.3 doesn't apply to L0.

* even INVEPT is not needed because, if L0 uses EPT, it uses different
EPTP when running L2 than L1 (because guest_mode is part of mmu-role).
In this case SDM section 28.3.3.4 doesn't apply.

Similarly, examining nested_vmx_vmexit()->load_vmcs12_host_state(),
one could note that L0 won't flush TLB only in cases where SDM sections
28.3.3.3 and 28.3.3.4 don't apply.  In particular, if L0 uses different
VPIDs for L1 and L2 (i.e. vmx->vpid != vmx->nested.vpid02), section
28.3.3.3 doesn't apply.

Thus, remove this flush from prepare_vmcs02() and nested_vmx_vmexit().

Side-note: This patch can be viewed as removing parts of commit
fb6c819843 ("kvm: vmx: Flush TLB when the APIC-access address changes”)
that is not relevant anymore since commit
1313cc2bd8 ("kvm: mmu: Add guest_mode to kvm_mmu_page_role”).
i.e. The first commit assumes that if L0 use EPT and L1 doesn’t use EPT,
then L0 will use same EPTP for both L0 and L1. Which indeed required
L0 to execute INVEPT before entering L2 guest. This assumption is
not true anymore since when guest_mode was added to mmu-role.

Reviewed-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-21 12:03:50 +01:00
..
vmx KVM: nVMX: Remove unnecessary TLB flushes on L1<->L2 switches when L1 use apic-access-page 2019-11-21 12:03:50 +01:00
cpuid.c KVM: x86: implement MSR_IA32_TSX_CTRL effect on CPUID 2019-11-21 09:59:31 +01:00
cpuid.h x86/cpufeatures: Combine word 11 and 12 into a new scattered features word 2019-06-20 12:38:44 +02:00
debugfs.c KVM: no need to check return value of debugfs_create functions 2019-08-05 12:55:49 +02:00
emulate.c KVM: X86: avoid unused setup_syscalls_segments call when SYSCALL check failed 2019-11-15 11:44:02 +01:00
hyperv.c KVM: x86: hyper-v: set NoNonArchitecturalCoreSharing CPUID bit when SMT is impossible 2019-09-24 13:37:30 +02:00
hyperv.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499 2019-06-19 17:09:53 +02:00
i8254.c kvm: x86: Add memcg accounting to KVM allocations 2019-02-20 22:48:30 +01:00
i8254.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
i8259.c kvm: x86: Add memcg accounting to KVM allocations 2019-02-20 22:48:30 +01:00
ioapic.c KVM: x86: Zero the IOAPIC scan request dest vCPUs bitmap 2019-11-20 14:23:24 +01:00
ioapic.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
irq_comm.c KVM/arm updates for 5.3 2019-07-11 15:14:16 +02:00
irq.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 320 2019-06-05 17:37:05 +02:00
irq.h KVM/arm updates for 5.3 2019-07-11 15:14:16 +02:00
Kconfig kvm: x86: add host poll control msrs 2019-06-18 11:43:46 +02:00
kvm_cache_regs.h KVM: x86: Fold decache_cr3() into cache_reg() 2019-10-22 13:34:16 +02:00
lapic.c Merge branch 'kvm-tsx-ctrl' into HEAD 2019-11-21 12:03:40 +01:00
lapic.h Merge branch 'kvm-tsx-ctrl' into HEAD 2019-11-21 12:03:40 +01:00
Makefile KVM: x86: fix TRACE_INCLUDE_PATH and remove -I. header search paths 2019-01-25 19:12:37 +01:00
mmu_audit.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499 2019-06-19 17:09:53 +02:00
mmu.c Merge branch 'kvm-tsx-ctrl' into HEAD 2019-11-21 12:03:40 +01:00
mmu.h kvm: x86: mmu: Recovery of shattered NX large pages 2019-11-04 20:26:00 +01:00
mmutrace.h KVM: x86/mmu: Explicitly track only a single invalid mmu generation 2019-09-24 14:36:00 +02:00
mtrr.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499 2019-06-19 17:09:53 +02:00
page_track.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499 2019-06-19 17:09:53 +02:00
paging_tmpl.h kvm: mmu: ITLB_MULTIHIT mitigation 2019-11-04 12:22:02 +01:00
pmu_amd.c KVM: x86/vPMU: Add lazy mechanism to release perf_event per vPMC 2019-11-15 11:44:10 +01:00
pmu.c KVM: x86/vPMU: Add lazy mechanism to release perf_event per vPMC 2019-11-15 11:44:10 +01:00
pmu.h KVM: VMX: Add helper to check reserved bits in IA32_PERF_GLOBAL_CTRL 2019-11-15 11:44:13 +01:00
svm.c Merge branch 'kvm-tsx-ctrl' into HEAD 2019-11-21 12:03:40 +01:00
trace.h KVM: nVMX: trace nested VM-Enter failures detected by H/W 2019-09-11 17:34:17 +02:00
tss.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
x86.c KVM: x86: remove set but not used variable 'called' 2019-11-21 12:03:49 +01:00
x86.h KVM: x86: Prevent set vCPU into INIT/SIPI_RECEIVED state when INIT are latched 2019-11-15 11:44:00 +01:00