Guo Ren 013de2d667 csky: MMU and page table management ... This patch adds files related to memory management and here is our memory-layout: Fixmap : 0xffc02000 – 0xfffff000 (4 MB - 12KB) Pkmap : 0xff800000 – 0xffc00000 (4 MB) Vmalloc : 0xf0200000 – 0xff000000 (238 MB) Lowmem : 0x80000000 – 0xc0000000 (1GB) abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. abiv2 CPUs are all PIPT cache and they could support highmem. Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup memory page table for it. Link:https://lore.kernel.org/lkml/20180518215548.GH17671@n2100.armlinux.org.uk/ Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Christoph Hellwig <hch@infradead.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>		2018-10-25 23:36:19 +08:00
..
cachev1.c	csky: Cache and TLB routines	2018-10-25 23:36:19 +08:00
cachev2.c	csky: Cache and TLB routines	2018-10-25 23:36:19 +08:00
dma-mapping.c	csky: MMU and page table management	2018-10-25 23:36:19 +08:00
fault.c	csky: Exception handling and mm-fault	2018-10-25 23:36:19 +08:00
highmem.c	csky: MMU and page table management	2018-10-25 23:36:19 +08:00
init.c	csky: MMU and page table management	2018-10-25 23:36:19 +08:00
ioremap.c	csky: MMU and page table management	2018-10-25 23:36:19 +08:00
Makefile
syscache.c	csky: Cache and TLB routines	2018-10-25 23:36:19 +08:00
tlb.c	csky: Cache and TLB routines	2018-10-25 23:36:19 +08:00