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https://github.com/edk2-porting/linux-next.git
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841be8ddf9
The .fill causes miscompilations with some binutils version. Instead just patch the lock prefix in the lock constructs. That is the majority of the cost and should be good enough. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
137 lines
4.8 KiB
C
137 lines
4.8 KiB
C
#ifndef _X86_64_ALTERNATIVE_H
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#define _X86_64_ALTERNATIVE_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <asm/cpufeature.h>
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struct alt_instr {
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u8 *instr; /* original instruction */
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u8 *replacement;
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u8 cpuid; /* cpuid bit set for replacement */
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u8 instrlen; /* length of original instruction */
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u8 replacementlen; /* length of new instruction, <= instrlen */
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u8 pad[5];
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};
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extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
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struct module;
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#ifdef CONFIG_SMP
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extern void alternatives_smp_module_add(struct module *mod, char *name,
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void *locks, void *locks_end,
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void *text, void *text_end);
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extern void alternatives_smp_module_del(struct module *mod);
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extern void alternatives_smp_switch(int smp);
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#else
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static inline void alternatives_smp_module_add(struct module *mod, char *name,
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void *locks, void *locks_end,
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void *text, void *text_end) {}
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static inline void alternatives_smp_module_del(struct module *mod) {}
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static inline void alternatives_smp_switch(int smp) {}
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#endif
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#endif
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/*
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* Alternative instructions for different CPU types or capabilities.
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*
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* This allows to use optimized instructions even on generic binary
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* kernels.
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*
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* length of oldinstr must be longer or equal the length of newinstr
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* It can be padded with nops as needed.
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*
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* For non barrier like inlines please define new variants
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* without volatile and memory clobber.
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*/
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#define alternative(oldinstr, newinstr, feature) \
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asm volatile ("661:\n\t" oldinstr "\n662:\n" \
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".section .altinstructions,\"a\"\n" \
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" .align 8\n" \
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" .quad 661b\n" /* label */ \
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" .quad 663f\n" /* new instruction */ \
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" .byte %c0\n" /* feature bit */ \
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" .byte 662b-661b\n" /* sourcelen */ \
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" .byte 664f-663f\n" /* replacementlen */ \
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".previous\n" \
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".section .altinstr_replacement,\"ax\"\n" \
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"663:\n\t" newinstr "\n664:\n" /* replacement */ \
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".previous" :: "i" (feature) : "memory")
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/*
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* Alternative inline assembly with input.
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*
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* Pecularities:
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* No memory clobber here.
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* Argument numbers start with 1.
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* Best is to use constraints that are fixed size (like (%1) ... "r")
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* If you use variable sized constraints like "m" or "g" in the
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* replacement make sure to pad to the worst case length.
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*/
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#define alternative_input(oldinstr, newinstr, feature, input...) \
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asm volatile ("661:\n\t" oldinstr "\n662:\n" \
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".section .altinstructions,\"a\"\n" \
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" .align 8\n" \
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" .quad 661b\n" /* label */ \
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" .quad 663f\n" /* new instruction */ \
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" .byte %c0\n" /* feature bit */ \
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" .byte 662b-661b\n" /* sourcelen */ \
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" .byte 664f-663f\n" /* replacementlen */ \
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".previous\n" \
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".section .altinstr_replacement,\"ax\"\n" \
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"663:\n\t" newinstr "\n664:\n" /* replacement */ \
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".previous" :: "i" (feature), ##input)
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/* Like alternative_input, but with a single output argument */
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#define alternative_io(oldinstr, newinstr, feature, output, input...) \
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asm volatile ("661:\n\t" oldinstr "\n662:\n" \
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".section .altinstructions,\"a\"\n" \
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" .align 8\n" \
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" .quad 661b\n" /* label */ \
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" .quad 663f\n" /* new instruction */ \
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" .byte %c[feat]\n" /* feature bit */ \
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" .byte 662b-661b\n" /* sourcelen */ \
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" .byte 664f-663f\n" /* replacementlen */ \
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".previous\n" \
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".section .altinstr_replacement,\"ax\"\n" \
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"663:\n\t" newinstr "\n664:\n" /* replacement */ \
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".previous" : output : [feat] "i" (feature), ##input)
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/*
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* Alternative inline assembly for SMP.
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*
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* The LOCK_PREFIX macro defined here replaces the LOCK and
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* LOCK_PREFIX macros used everywhere in the source tree.
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*
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* SMP alternatives use the same data structures as the other
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* alternatives and the X86_FEATURE_UP flag to indicate the case of a
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* UP system running a SMP kernel. The existing apply_alternatives()
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* works fine for patching a SMP kernel for UP.
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*
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* The SMP alternative tables can be kept after boot and contain both
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* UP and SMP versions of the instructions to allow switching back to
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* SMP at runtime, when hotplugging in a new CPU, which is especially
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* useful in virtualized environments.
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*
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* The very common lock prefix is handled as special case in a
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* separate table which is a pure address list without replacement ptr
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* and size information. That keeps the table sizes small.
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*/
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#ifdef CONFIG_SMP
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#define LOCK_PREFIX \
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".section .smp_locks,\"a\"\n" \
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" .align 8\n" \
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" .quad 661f\n" /* address */ \
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".previous\n" \
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"661:\n\tlock; "
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#else /* ! CONFIG_SMP */
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#define LOCK_PREFIX ""
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#endif
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#endif /* _X86_64_ALTERNATIVE_H */
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