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9e775ad19f
MSMs post 8x50 have 2Mb at the beginning of RAM reserved for shared memory. Since the kernel hasn't typically been told this RAM exists, PHYS_OFFSET has been set to 0xN0200000 and the memory atags passed to the kernel have matched. This doesn't play nicely with things such as AUTO_ZRELADDR, which doesn't work at all, and dynamic phys to virt, which requires an MSM specific workaround. Work around these issues by telling the kernel RAM starts at 0xN0000000 (it actually does) and fixup the atags from the bootloader (if necessary) to say the same. In addition, make sure to set TEXT_OFFSET at least 2Mb beyond the start of RAM so that the kernel doesn't end up being decompressed into shared memory. After doing this, AUTO_ZRELADDR should work on MSM with no problems and ARM_PATCH_PHYS_VIRT_16BIT should no longer be necessary. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
114 lines
3.0 KiB
C
114 lines
3.0 KiB
C
/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/clkdev.h>
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#include <linux/memblock.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <asm/setup.h>
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#include <mach/board.h>
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#include <mach/msm_iomap.h>
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#include "devices.h"
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static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
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char **cmdline, struct meminfo *mi)
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{
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for (; tag->hdr.size; tag = tag_next(tag))
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if (tag->hdr.tag == ATAG_MEM &&
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tag->u.mem.start == 0x40200000) {
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tag->u.mem.start = 0x40000000;
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tag->u.mem.size += SZ_2M;
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}
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}
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static void __init msm8960_reserve(void)
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{
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memblock_remove(0x40000000, SZ_2M);
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}
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static void __init msm8960_map_io(void)
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{
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msm_map_msm8960_io();
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}
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static void __init msm8960_init_irq(void)
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{
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unsigned int i;
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gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
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(void *)MSM_QGIC_CPU_BASE);
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/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
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writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
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if (machine_is_msm8960_rumi3())
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writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
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/* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
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* as they are configured as level, which does not play nice with
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* handle_percpu_irq.
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*/
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for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
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if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
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irq_set_handler(i, handle_percpu_irq);
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}
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}
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static struct platform_device *sim_devices[] __initdata = {
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&msm8960_device_uart_gsbi2,
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};
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static struct platform_device *rumi3_devices[] __initdata = {
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&msm8960_device_uart_gsbi5,
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};
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static void __init msm8960_sim_init(void)
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{
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platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
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}
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static void __init msm8960_rumi3_init(void)
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{
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platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
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}
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MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
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.fixup = msm8960_fixup,
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.reserve = msm8960_reserve,
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.map_io = msm8960_map_io,
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.init_irq = msm8960_init_irq,
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.timer = &msm_timer,
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.init_machine = msm8960_sim_init,
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MACHINE_END
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MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
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.fixup = msm8960_fixup,
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.reserve = msm8960_reserve,
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.map_io = msm8960_map_io,
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.init_irq = msm8960_init_irq,
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.timer = &msm_timer,
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.init_machine = msm8960_rumi3_init,
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MACHINE_END
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