Here is the big USB driver update for 3.17-rc1.
Loads of gadget driver changes in here, including some big file
movements to make things easier to manage over time. There's also the
usual xhci and uas driver updates, and a handful of other changes in
here. The changelog has the full details.
All of these have been in linux-next for a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iEYEABECAAYFAlPf2ZIACgkQMUfUDdst+ylvQwCfQKPKcwhtq4vJ2imUzJROEZwN
ygYAnRpFpH/19X59uGSdE7DAdhbitqKg
=uPh1
-----END PGP SIGNATURE-----
Merge tag 'usb-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB updates from Greg KH:
"Here is the big USB driver update for 3.17-rc1.
Loads of gadget driver changes in here, including some big file
movements to make things easier to manage over time. There's also the
usual xhci and uas driver updates, and a handful of other changes in
here. The changelog has the full details.
All of these have been in linux-next for a while"
* tag 'usb-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (211 commits)
USB: devio: fix issue with log flooding
uas: Log a warning when we cannot use uas because the hcd lacks streams
uas: Only complain about missing sg if all other checks succeed
xhci: Add missing checks for xhci_alloc_command failure
xhci: Rename Asrock P67 pci product-id to EJ168
xhci: Blacklist using streams on the Etron EJ168 controller
uas: Limit qdepth to 32 when connected over usb-2
uwb/whci: use correct structure type name in sizeof
usb-core bInterval quirk
USB: serial: ftdi_sio: Add support for new Xsens devices
USB: serial: ftdi_sio: Annotate the current Xsens PID assignments
usb: chipidea: debug: fix sparse non static symbol warnings
usb: ci_hdrc_imx doc: fsl,usbphy is required
usb: ci_hdrc_imx: Return -EINVAL for missing USB PHY
usb: core: allow zero packet flag for interrupt urbs
usb: lvstest: Fix sparse warnings generated by kbuild test bot
USB: core: hcd-pci: free IRQ before disabling PCI device when shutting down
phy: miphy365x: Represent each PHY channel as a DT subnode
phy: miphy365x: Provide support for the MiPHY356x Generic PHY
phy: miphy365x: Add Device Tree bindings for the MiPHY365x
...
drivers and fixes/enhancements to existing clock drivers. There are also
some non-critical fixes and improvements to the framework core.
Changes to the clock framework core include:
* improvements to printks on errors
* flattening the previously hierarchal structure of per-clock entries
in debugfs
* allow per-clock debugfs entries that are specific to a particular
clock driver
* configure initial clock parent and/or initial clock rate from Device
Tree
* several feature enhancements to the composite clock type
* misc fixes
New clock drivers added include:
* TI Palmas PMIC
* Allwinner A23 SoC
* Qualcomm APQ8084 and IPQ8064 SoCs
* Rockchip rk3188, rk3066 and rk3288 SoCs
* STMicroelectronics STiH407 SoC
* Cirrus Logic CLPS711X SoC
Many fixes, feature enhancements and further clock tree support for
existing clock drivers also were merged, such as Samsung's "ARMCLK down"
power saving feature for their Exynos4 & Exynos5 SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJT38lmAAoJEDqPOy9afJhJh9YQAKROq+lrKaf+YAk22E0GCF30
Q+KZ9EcePdxWvcDPKsMIf/wAIYdtGDoI6wgyw1tcSWeLKwwyHMfVdOCExWig2gwl
/4LU2tACKe+Xa0HJnsbNwQGj2n4qMGOUsDeRRmK4rcbuHZhTP15IscmFCbL+sUia
z3uaYf7ty3a1tSXBl3NY4EpYAXGiE+MMVBoU08ATYOOjvGcxNNfu50JSltGXarqv
BFBjpv0oikN3RvbVyuUUvEF8m6AeNYhbqxI0IuNmoE+mAkgB2n221CK4Qv6a3oDb
QJebzRdeprcak8HrK76Ik6Dd9itcs03u6G1qwLc30JH5wUHYcgqA5bvqDIx+2W0J
Z7NPi3tFTry1aeXnZPk7DbWruzXLQkXkgRM4xHXsmezRnO7zDvuoDgUT0pIrS9+v
+BRIyfPiBL9Lp1J17R0I1K76O7YnvyQhX+0CdZx0SOJNGPl+SIwTI4q+gQoDIZqP
0ubpuaH4v6gZiEol2HXKYN9ASWyRtX7PfiexQgmts1aewlPopWfuc7LdxhHQIv3B
3O/7jbhdhXsf7VaTvx7xkFEMxjY7IwEF4pN0F+ulwWj/rLK3vLCnTwxgv8IrNHit
Dkzt4kVzLW/GSWa3irTnISvsg+bHkRc7aPuW/i0km7RYUuL2dcaJLEBPYuka/AdH
1xIMaGNpkA3HrS+8CQYf
=48y9
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-3.17' of git://git.linaro.org/people/mike.turquette/linux
Pull clock framework updates from Mike Turquette:
"The clock framework changes for 3.17 are mostly additions of new clock
drivers and fixes/enhancements to existing clock drivers. There are
also some non-critical fixes and improvements to the framework core.
Changes to the clock framework core include:
- improvements to printks on errors
- flattening the previously hierarchal structure of per-clock entries
in debugfs
- allow per-clock debugfs entries that are specific to a particular
clock driver
- configure initial clock parent and/or initial clock rate from
Device Tree
- several feature enhancements to the composite clock type
- misc fixes
New clock drivers added include:
- TI Palmas PMIC
- Allwinner A23 SoC
- Qualcomm APQ8084 and IPQ8064 SoCs
- Rockchip rk3188, rk3066 and rk3288 SoCs
- STMicroelectronics STiH407 SoC
- Cirrus Logic CLPS711X SoC
Many fixes, feature enhancements and further clock tree support for
existing clock drivers also were merged, such as Samsung's "ARMCLK
down" power saving feature for their Exynos4 & Exynos5 SoCs"
* tag 'clk-for-linus-3.17' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
clk: Add missing of_clk_set_defaults export
clk: checking wrong variable in __set_clk_parents()
clk: Propagate any error return from debug_init()
clk: clps711x: Add DT bindings documentation
clk: Add CLPS711X clk driver
clk: st: Use round to closest divider flag
clk: st: Update frequency tables for fs660c32 and fs432c65
clk: st: STiH407: Support for clockgenA9
clk: st: STiH407: Support for clockgenD0/D2/D3
clk: st: STiH407: Support for clockgenC0
clk: st: Add quadfs reset handling
clk: st: Add polarity bit indication
clk: st: STiH407: Support for clockgenA0
clk: st: STiH407: Support for A9 MUX Clocks
clk: st: STiH407: Support for Flexgen Clocks
clk: st: Adds Flexgen clock binding
clk: st: Remove uncessary (void *) cast
clk: st: use static const for clkgen_pll_data tables
clk: st: use static const for stm_fs tables
clk: st: Update ST clock binding documentation
...
This adds the clock driver for Cirrus Logic CLPS711X series SoCs
using common clock infrastructure.
Designed primarily for migration CLPS711X subarch for multiplatform & DT,
for this as the "OF" and "non-OF" calls implemented.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This patch corrects mistyped author's name in four header files. While
at it, a copy/paste error in author's e-mail in one of the headers is
also fixed.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This patch adds definitions of clocks that are used to drive clock
output signals of particular CMU sub-blocks that are then fed to PMU and
handled by Exynos CLKOUT driver added in further patch.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABCAAGBQJTyb5mAAoJENidgRMleOc9mCAP/3JAiwaf0vsdhxf5/hQRakTq
DzGnjtMV3fHvEc5vBO5mdv8uiOv6P6dkWdBh2cRk52sFgdqz+qcr4IfQUw7yVUDN
Zyr9BqrrEEllQLTRbzf/8cEIWyXripp7kV7yVjP2Ng37NPktliYb26sqp2HODeEa
38+yi/gXbUQ5Gzh0EIeUmt1ORpJfa9qGlxRQGuDT+wL35Fb6Q/Lr+emfacmVkJuO
FYOXRHVK1i3WnjigCATsYmoD5jFkpGBqJgUFfzyy5oz94WrL6QRrSbQS3ASsWx2i
c2tSXvrOSX9Xf9/UOjf6ZZ+5qvdjxWOHkkilerbJDEUnV4W9G8dmag/7czUINVmU
/21KUoObj+wLdWl4SFMdUmksGkHLm7j6Tnllfkcke3FQrELovfb4ARAsxiU2zvXy
646qfk7f+0SWPf3/3fKl9JEQnqBaOimDjX6ibbHjY16r4xiCVMzACVeI3CQtlFyZ
knMQVjZDcgj1w80SSuG60e3Ahd5rknH8eB2h+nrUtbbjz2S1u733Dht4vBgDkSHZ
yntZ/u/7HhNehqjlBWBQyLuTPRIBTENQW2W95QR9W62FaQgzZXd7/n74gcoS3CsG
pqI1Glb166GbmiEtbXEKrOIwMenOiR7RY1/BsKO0kAqJitrShy8mvqTEzFyDPZo5
HdqttkTPpDGcF53PtltY
=azpb
-----END PGP SIGNATURE-----
Merge tag 'qcom-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into clk-next-msm
qcom clock changes for 3.17
These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0PDDAAoJEBvUPslcq6Vz2kkP/2XcaWEl5xWEP6vTFDwy1RDL
apjp2qURWpJ579bT5y5KlGP8vyBeSLfdXl+ccCuHhBrRtYCZfsUdRaii/AHDcsd/
N0p1ZaAQLwfMXUo1sVgW2grSOJEo8QZs8DEZ7eJfE8SnH2g/i4j+VFknYOO1t6vA
+QoHRWcY0CRLNVHSyGGFk235pfdq1ZAKskayzQ4wCjOXuH2tKILjFsiCxItPStih
CmKqZCoO+BQMz7dLTGZsdchDTqf0PceMh7w6PWO65QeJxr16nWmGbqnZRlUGeBqo
vTZO1Rsfb4DlRYRGBxJ1ybVJw2cgmsx8fWKv4eYVrulGNKUE2m3UYj+oYCst0g5i
VOPMwLiLapciCZi/4er2VWtb9sFWY6XaTAJHVRtrtX6RZgZC5c3cWGzkykXOkF7N
Ut7He/TT41uc5OIjuG6WGQNCIfKOmfBcSDeNRqyr9YzZpn6lbJ+U4kk0kco1pyda
IHrRUD+yHuXK0FjZvZMDlWmKqP3QLK+xjL7LRzsiJ4yfymikckjS2RH0iP9PGuCV
T68PPl+rzyHjmVUnbBCgLnatTAQ9uHPCb4Eb5rRZaiO+4nUyqeqikMWU/DsiS4jc
1igudgOx53/0zCCQC/VHVL9HGb4fSrbevMzq8YR3uyyS2b/R8FFbGs6Y6TCIDWdi
TUSv/ckpA4uUbe22SFTn
=/FMt
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Two regression fixes for omaps and one fix for device
signaling" from Tony Lindgren:
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
* tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
pinctrl: dra: dt-bindings: Fix pull enable/disable
ARM: OMAP2+: l2c: squelch warning dump on power control setting
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The DRA74/72 control module pins have a weak pull up and pull down.
This is configured by bit offset 17. if BIT(17) is 1, a pull up is
selected, else a pull down is selected.
However, this pull resisstor is applied based on BIT(16) -
PULLUDENABLE - if BIT(18) is *0*, then pull as defined in BIT(17) is
applied, else no weak pulls are applied. We defined this in reverse.
Reference: Table 18-5 (Description of the pad configuration register
bits) in Technical Reference Manual Revision (DRA74x revision Q:
SPRUHI2Q Revised June 2014 and DRA72x revision F: SPRUHP2F - Revised
June 2014)
Fixes: 6e58b8f1da ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board")
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Felipe Balbi <balbi@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This provides the shared header file which will be reference from both
the MiPHY365x driver and its associated Device Tree node(s).
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The APQ8064 multimedia clock controller is fairly similar to the
8960 multimedia clock controller, except that gfx2d0/1 has been
removed and the gfx3d frequency is slightly faster when using the
newly introduced PLL15. We also add vcap clocks and a couple new
TV clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add a driver for the global clock controller found on IPQ8064 based
platforms. This should allow most non-multimedia device drivers to probe
and control their clocks.
This is currently missing clocks for USB HSIC and networking devices.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the multimedia clock controller found on the APQ8084
based platforms. This will allow the multimedia device drivers to
control their clocks.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
[sboyd: Rework parent mapping to avoid conflicts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Samsung, ST & TI. Most of them are of the "this hardware won't work
without this fix" variety, including patches that fix platforms that did
not boot under certain configurations. Other fixes are the result of
changes to the clock core introduced in 3.15 that had subtle impacts on
the clock drivers.
There are no fixes to the clock framework core in this pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTwrM0AAoJEDqPOy9afJhJGtgP/j99sWo/P/Q+wkybYfvlAvYF
UC69GdYIV4PpHXq7JDrs9n48cf8Cte6QsYTVxFipmcBKiZrxoH1Ft6AZk0XuzHPb
bONgwlxPH03Xy/pm1aWO3AX7zMiOzTlxAqPuisJa4rbBty3XOQqEFyuJnHEW2m59
L754YWvT6dAzYyU1LQE4iSGPD8Dmh/oVvjg17+hM6//yM3fspYA3gzui/Lj4L1sx
QL0FFo6SJ4vvn9MMen+/UgZZ2G25fR4e0AONvz+rzBA2fmCGoQbNs26Iyi+MpEtg
DlXGcMTwl3Cj+mulalAIxBJ441KDtqm6TZ7iIEuaBUDCxFxNIuvup8FuMIAjDlt4
+V6OTFA7tlYr8UGQ/KRiTTgd6TKKUu9FpKmYOq/K1VZZls6m2hVTWvcwZ/217VYq
cimnVrHGs22vXhYKL2S3/TWfioiVP3vN08+NQOI5IRhYfXm+oPMuWwahHU/VnY2C
AaAUaHgqSlLmIbGqgvsjDQglRyGajs8oz/SfDuxXTBClc/6lu4ENNL9UQffdBTV4
IfrU+ALRR+CjPtLOHUTrLIHldGbn40Ff0fdKyJ/iGtdE+iiNJcnoU2G0uuhMP4eP
JpAMY2XrzZWGVJegjvg1m1Qfv85FBJhUB6+T5wIFYwKwBPzSf/yx0YTt+R0mp7Lg
g0CWTO3SoDeKDSK2Yzr2
=6n8W
-----END PGP SIGNATURE-----
Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux
Pull clock driver fixes from Mike Turquette:
"This batch of fixes is for a handful of clock drivers from Allwinner,
Samsung, ST & TI. Most of them are of the "this hardware won't work
without this fix" variety, including patches that fix platforms that
did not boot under certain configurations. Other fixes are the result
of changes to the clock core introduced in 3.15 that had subtle
impacts on the clock drivers.
There are no fixes to the clock framework core in this pull request"
* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
clk: spear3xx: Set proper clock parent of uart1/2
clk: spear3xx: Use proper control register offset
clk: qcom: HDMI source sel is 3 not 2
clk: sunxi: fix devm_ioremap_resource error detection code
clk: s2mps11: Fix double free corruption during driver unbind
clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabled
clk: exynos5420: Remove aclk66_peric from the clock tree description
clk/exynos5250: fix bit number for tv sysmmu clock
clk: s3c64xx: Hookup SPI clocks correctly
clk: samsung: exynos4: Remove SRC_MASK_ISP gates
clk: samsung: add more aliases for s3c24xx
clk: samsung: fix several typos to fix boot on s3c2410
clk: ti: set CLK_SET_RATE_NO_REPARENT for ti,mux-clock
clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabled
clk: ti: dra7: return error code in failure case
clk: ti: apll: not allocating enough data
Add the clock tree definition for the new rk3288 SoC.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This adds a clock driver that handles the specific muxes, dividers and gates
of rk3188 and rk3066 SoCs.
The structure of the clock list resembles the arrangement of their
counterparts in the clock architecture diagrams found in the SoC
documentation.
Clocks exported to the clock provider are currently limited to well known
or measured ones. So additional clock exports may be necessary in the future.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add the necessary clocks for SATA, PCIe and UFS to the
APQ8084 global clock controller (GCC). This will allow
the above device drivers to control their clocks.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This patch adds support for the global clock controller found on
the APQ8084 based devices. This includes UART, I2C, SPI etc.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Adds IDs for MUX clocks to be used by power domain for MFC
for doing re-parenting while pd on/off.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This pull request contains fixes for various issues found while testing
-rc versions of Linux 3.16. Mostly two kinds of patches:
* Fixes of incorrectly defined clocks
1) a37c82a clk: samsung: exynos4: Remove SRC_MASK_ISP gates
Issue present since v3.10.
2) 0b1643b clk/exynos5250: fix bit number for tv sysmmu clock
Issue present since v3.16.
3) 44ff025 clk: exynos5420: Remove aclk66_peric from the clock tree description
Issue present since v3.11.
* Adding things missed by original patches
1) cec1cde clk: samsung: fix several typos to fix boot on s3c2410
2) 34ece9e clk: samsung: add more aliases for s3c24xx
Both issues present since the driver was added in v3.16.
3) a92dda4 clk: s3c64xx: Hookup SPI clocks correctly
Issue present since v3.12.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJTtDYTAAoJEIv3Hb8G/XrulvoQAJSaAnP4IzKmMwB85yyZmfeg
ROYQnk9ig2vQjwN2XY9gUmGnkNIhn+oskurScSCDL3egdxaFGyeRK3JiNYWfLHWp
p868MUf9xV+MJhlDBatfAU7B2CZ6hEm0+350cm2+PVAjxRW35zTHpHwU1dWXTMMi
hQCvcMke3aNi7aMPpzZK+TFxWcGuRHXGwA4aozLby4J56s328ZQ38HQSMkeaMi+A
FgcW3+5WmFW7L82Hw2ZKIQ3XLlVLHCA9mGlLZpqQP93zoQZv50IrAm5ldKI6kkS2
AQtbpJMv3Eld3hzyKUeL15W3ozvUXKS+0eLmOlHq02sdLYr2ZtF3bPG3xbyaMp49
bFRLjTKoCyEdUCbF99wrO8qaJL+aA52JZ/nwppc0eXr+8wjIA1dvvzUoVQQMqjOX
kk1AdOj8+hVqsy2vuMRlejJZZ9Yle5+4r+580CTmVrR/sJknAzdqiRTH48OjEffo
6G7STja8Xf4o9S86HtOCFxtsDCrv6ndK0g5JJ2ctnBlIj/PIdykMnZDN2LmVCLmO
teOuRH6OSJqsxqo5vwTQltsoNoiRM6YbtOA1vixh62tyP5Zo9O0J7Z77I05FlO7D
ct+BD6jNNj21GGQrKC+AJxqc3zPPI+Nyapcl6BbytB85KY6kqKopMR3vZKRmdXjY
01TSSaTZWm8CbSIBiG6w
=eE4V
-----END PGP SIGNATURE-----
Merge tag 'for_3.16/samsung-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-fixes-samsung
Samsung clock fixes for v3.16.
This pull request contains fixes for various issues found while testing
-rc versions of Linux 3.16. Mostly two kinds of patches:
* Fixes of incorrectly defined clocks
1) a37c82a clk: samsung: exynos4: Remove SRC_MASK_ISP gates
Issue present since v3.10.
2) 0b1643b clk/exynos5250: fix bit number for tv sysmmu clock
Issue present since v3.16.
3) 44ff025 clk: exynos5420: Remove aclk66_peric from the clock tree description
Issue present since v3.11.
* Adding things missed by original patches
1) cec1cde clk: samsung: fix several typos to fix boot on s3c2410
2) 34ece9e clk: samsung: add more aliases for s3c24xx
Both issues present since the driver was added in v3.16.
3) a92dda4 clk: s3c64xx: Hookup SPI clocks correctly
Issue present since v3.12.
Palmas class of devices can provide 32K clock(s) to be used by other devices
on the board. Depending on the actual device the provided clocks can be:
CLK32K_KG and CLK32K_KGAUDIO
or only one:
CLK32K_KG (TPS659039 for example)
Use separate compatible flags for the two 32K clock.
A system which needs or have only one of the 32k clock from
Palmas will need to add node(s) for each clock as separate section
in the dts file.
The two compatible property is:
"ti,palmas-clk32kg" for clk32kg clock
"ti,palmas-clk32kgaudio" for clk32kgaudio clock
Apart from the register control of the clocks - which is done via
the clock API there is a posibility to enable the external sleep
control. In this way the clock can be enabled/disabled on demand by the
user of the clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Exynos4 has saveral PPMUs and each of them has operation clock which
can be gated through CMU's SFR control.
New clocks are listed below. All clocks are added as a gate-typed clock.
CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUCAMIF, CLK_PPMUTV, CLK_PPMUMFC_L,
CLK_PPMUMFC_R, CLK_G3D, CLK_PPMUIMAGE, CLK_PPMULCD0, CLK_PPMULCD1,
CLK_PPMUFILE, CLK_PPMUGPS, CLK_PPMUDMC0, CLK_PPMUDMC1, CLK_PPMUCPU,
CLK_PPMUACP,
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The "aclk66_peric" clock is a gate clock with a whole bunch of gates
underneath it. This big gate isn't very useful to include in our
clock tree. If any of the children need to be turned on then the big
gate will need to be on anyway. ...and there are plenty of other "big
gates" that aren't described in our clock tree, some of which shut off
collections of clocks that have no relationship in the hierarchy so
are hard to model.
"aclk66_peric" is causing earlyprintk problems since it gets disabled
as part of the boot process, so let's just remove it.
Strangely (and for no good reason) this clock is exported as part of
the common clock bindings. Remove it since there are no in-kernel
device trees using it and no reason anyone out of tree should refer to
it either.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
because controller base CD/WP is not working in esdhc driver due to
runtime PM support
- A couple of random ventana gw5xxx board fixes
- Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
IPUv3 driver out of staging tree
- Fix enet/fec clock selection on imx6sl
- Fix display node on imx53-m53evk board
- A couple of Cubox-i updates from Russell, which were omitted from
the merge window due to dependency
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQEcBAABAgAGBQJTpUMjAAoJEFBXWFqHsHzOXm4IAKmUwbwRq3neZeRImgautENK
zyP0qtIaChqiJN+c0p23BSOnv6g914ORNPxbMIzdDVOEGC344ZOffWRQBBqSe9VR
XMifhdkhCiwtAXRRmsOBu5okBT/TjreFDfvwxssApkf9pdp/Hn3JeeDcxxGOoJr7
nIZSVGbKr0+wYTfPcnoloNUXqzTmk8WfDMvLNovE0U+MKsXtPzUvPUsJ9mNKiOAu
qkWltn5/rL8sD+onbtq/mHiPs2Lkb4ni8Duc3PggpvGCSoxmk8RTFC0YpMdXe8P6
DpfBsKfU18j0YDbOX07K8Qim0Wm1ODVvX6h/wlw+uSVwpk9aT6rbBaDlJNwhqUM=
=Bw+Y
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "i.MX fixes for 3.16" from Shawn Guo:
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
because controller base CD/WP is not working in esdhc driver due to
runtime PM support
- A couple of random ventana gw5xxx board fixes
- Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
IPUv3 driver out of staging tree
- Fix enet/fec clock selection on imx6sl
- Fix display node on imx53-m53evk board
- A couple of Cubox-i updates from Russell, which were omitted from
the merge window due to dependency
* tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
ARM: dts: imx51-babbage: Fix esdhc setup
ARM: dts: mx5: Move the display out of soc {} node
ARM: dts: mx5: Fix IPU port node placement
ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level
ARM: dts: cubox-i: add support for PWM-driven front panel LED
ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source
ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix
ARM: dts: imx6: ventana: fix include typo
ARM: dts: imx6sl: correct the fec ipg clock source
ARM: imx6sl: add missing enet clock for imx6sl
This patch fixes two problems: -
1) The device tree isn't currently providing sti-ethclk which is
required by the dwmac glue code to correctly configure the ethernet
PHY clock speed.
This means depending on what the bootloader/jtag has
configured this clock to, and what switch/hub the board is plugged
into you most likely will NOT successfully negotiate a ethernet link.
2) The stmmaceth clock was associated with the wrong clock. It was
referencing the PHY clock rather than the interconnect clock which
clocks the IP.
This patch also brings us closer to not having to boot the upstream
kernel with the clk_ignore_unused parameter.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
driver additions and fixes. There are additions to the clock core code
for some of the basic types (e.g. the common divider type has some fixes
and featured added to it).
One minor annoyance is a last-minute dependency that wasn't handled
quite right. ba0fae3 in this pull request depends on
include/dt-bindings/clock/berlin2.h, which is already in your tree via
the arm-soc pull request. Building for the berlin platform will break
when the clk tree is built on it's own, but merged into your master
branch everything should be fine.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTkhd7AAoJEDqPOy9afJhJ/kAQAKJt4slFYNW5t69HBmqlfkxR
1Y61KqTaZiJ2XNqudNUDd6GkD5CW0pqD194dOXOLQMSGIZ3i+mHJ91ddV4x7J8xe
+eAvaHqDc4XJyJouzOOxx2LhnThRUkpyXLzbXTITIoy4nK6K+ANg6hPjfBwTDs3m
7dDu+WDYAN4EMjMffpPD26axl778H5FXzqJaKx+RmMDw6f3y6g+8hKCvSicetpAa
AnTLhx8q4kbEmOZHOEny28KliOpDAMPd/nNcnjqpfKBSoq0J6aYGM0t5bUH+clY9
nzjgMfE+pRm8N+oyssNCqT99ebeIxSF6Ps/EVZRJCETUi3s0n1/Y4dK3uPNOyo+G
BSv0wfQ5M1IebmnIIlQuJ+zNvtKFkoLoi1Q/fsOr51HVfddwrEbd972+zYdjSeVe
RXRb3HAStfQEjp0874VD9wr6u0tHskUrQGzHSSs8PNsfCv/URwJUPuS7XnePPXAZ
KdtJST/b+WiY96pPJDLc44trRko1opxgncYqsusnWtwsUzK5aKnAbbYSiTIZhxJU
44p7/xOokeTcgDuluEk8mR+PEX5EhGokYXOVXfSCMJOXehpHnpMHtzCieTcmJ9Ir
NaOATHjSXwHI7jiv/W+EZQnZCnoHnST+GT4FtmjYkD3lzMpK9d/E9mxjKs8hUNgO
xH71k4uL7WljxsVWp/16
=2AAL
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux into next
Pull clock framework updates from Mike Turquette:
"The clock framework changes for 3.16 are pretty typical: mostly clock
driver additions and fixes. There are additions to the clock core
code for some of the basic types (e.g. the common divider type has
some fixes and featured added to it).
One minor annoyance is a last-minute dependency that wasn't handled
quite right. Commit ba0fae3b06 ("clk: berlin: add core clock driver
for BG2/BG2CD") in this pull request depends on
include/dt-bindings/clock/berlin2.h, which is already in your tree via
the arm-soc pull request. Building for the berlin platform will break
when the clk tree is built on it's own, but merged into your master
branch everything should be fine"
* tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux: (75 commits)
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
clk: export __clk_round_rate for providers
clk: versatile: free icst on error return
clk: qcom: Return error pointers for unimplemented clocks
clk: qcom: Support msm8974pro global clock control hardware
clk: qcom: Properly support display clocks on msm8974
clk: qcom: Support display RCG clocks
clk: qcom: Return highest rate when round_rate() exceeds plan
clk: qcom: Fix mmcc-8974's PLL configurations
clk: qcom: Fix clk_rcg2_is_enabled() check
clk: berlin: add core clock driver for BG2Q
clk: berlin: add core clock driver for BG2/BG2CD
clk: berlin: add driver for BG2x complex divider cells
clk: berlin: add driver for BG2x simple PLLs
clk: berlin: add driver for BG2x audio/video PLL
clk: st: Terminate of match table
clk/exynos4: Fix compilation warning
ARM: shmobile: r8a7779: Add clock index macros for DT sources
clk: divider: Fix overflow in clk_divider_bestdiv
clk: u300: Terminate of match table
...
As with previous release, this continues to be among the largest branches
we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjNNQAAoJEIwa5zzehBx3KyYP/3TEJcXXEYDURXDB0SktPNyy
cKp5HUnsu4+aq/Ae6jdjVGiX5FZa64Xije9b0kP3oxoPS+fuODvzhlnoEsT84Ab5
/jeygWJZYUIWAQTxShPT55K8WAEtL7H1WcvswdCZoTDxPBNCLR/nLzv084nv9Die
IOUWDTKW4qB8+KYQxh2TBx0E1TorZ0J5OWf6qqepZ0i4J5dhL1VYtc/ZNU5C37V5
rZyyBQNOCBE/MK/Dw9CnResQf4f8DigHBYgpl7VxB+bBqfgzFuSSEPvg21MXLkfi
ln64yYTVvqhleVjGriDV+mUHOCZr4sUWZPDzeF5HzpvqDAMDWTsWlHNh6WDU6dgo
b+zFPqqnWaBiWrinY+o7MVvjVzu3Nf8id/GyjnDJEFbSc9ka/8uiC3v9UJXAFawF
3Huc3K6BC/3qOoCPfnBotzx7Xxxvjk2lPRfnonhSvBoSzPeFc6vz2k4USX1GbdkB
y/v+Q+n52VebxiKknTMv9HOI06yTOJo2ji+2iKIULb+W86HzNRZL8ZlmNib4WysF
z/OgHZl+YzbhJQJtvfBecCIH2Hu+A4GD2ES8hhklA0QhFHPiDfB9cqcsthSGS5oL
dDaGv6XGpHoySlEm1ybgWhvH96dc7lTR+nPGZqCKtRBn5pJiEHczxQ2Jz3aBHYeW
PUPlrVfYXzIKsh+OU1HO
=OvOG
-----END PGP SIGNATURE-----
Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC devicetree updates from Olof Johansson:
"As with previous release, this continues to be among the largest
branches we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q"
* tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits)
ARM: dts: add secure firmware support for exynos5420-arndale-octa
ARM: dts: add pmu sysreg node to exynos3250
ARM: dts: correct the usb phy node in exynos5800-peach-pi
ARM: dts: correct the usb phy node in exynos5420-peach-pit
ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
ARM: dts: add dts files for exynos3250 SoC
ARM: dts: add mfc node for exynos5800
ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
ARM: dts: enable fimd for exynos5800-peach-pi
ARM: dts: enable display controller for exynos5800-peach-pi
ARM: dts: enable hdmi for exynos5800-peach-pi
ARM: dts: add dts file for exynos5800-peach-pi board
ARM: dts: add dts file for exynos5800 SoC
ARM: dts: add dts file for exynos5260-xyref5260 board
ARM: dts: add dts files for exynos5260 SoC
ARM: dts: update watchdog node name in exynos5440
ARM: dts: use key code macros on Origen and Arndale boards
ARM: dts: enable RTC and WDT nodes on Origen boards
ARM: dts: qcom: Add APQ8084-MTP board support
ARM: dts: qcom: Add APQ8084 SoC support
...
The bulk of this branch is updates for Renesas Shmobile. They are still
doing some enablement for classic boards first, and then come up with DT
bindings when they've had a chance to learn more about the hardware. Not
necessarily a bad way to go about it, and they're looking at moving some
of the temporary board code resulting from it to drivers/staging instead
to avoid the churn here.
As a result of the shmobile clock cleanups, we end up merging quite a
bit of SH code here as well. We ended up merging it here instead of in
the cleanup branch due to the other board changes depending on it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjNClAAoJEIwa5zzehBx3Q7wP+wYzWTAU0+3BnnjJpQM79hsX
1hP89RaM6DEyTf6PiL/AKOHsnDponUhNzZu1W5FvNG6cFVenh/nxbmO65FKX9CrY
Ap2pkQW+/IcpmIKZ+Hln2bkCc54a6yPouK+5pd9W14X5TtqNmLbdh1qhoq9UjFTo
zgLfhch5tyNqfpNOj0vFsmvTw0ZGJ0Neq6olRqQbXmyAaRaWzDa64lmEKVupMdk7
2Fh/8jeXlVlryi7p7CvNoAmZEMm7+We5ZMVsQXLk8b9zcwuCWK0DZzNW4DnRCB1d
lsNM/Sygi3Y5zRj2XogNANVhNDIih0f50FX7uuKtmevWNJE9n4To7uFUMTk/3zBt
1hvJLL8w4WHhzkg5v5nFsiCTx65pFaTD/LocPj8lhQ1AYzUvWN5sKPxW0uC1lvJ9
Unlwdc0C4EWs3yq6hAPUZS2eB7owmzNUWdjdkgKfdc74u5RnRay0pUmbRMJm2l20
OKoDSwaluQZUeHrxPnTSLdgpkBbPRn9M5DbswEQsuPyI6yROgCRxaRQ4XcpM93dV
4obCF+fOvX6dtsdIUBCtdhvmJ/iHqhQlPLc2avpt2gyti7eWjQkt5it12hjjOF6A
DVBdNHv215EEgvB0MbPJvFVKBLw4boxdeBx+FqMQCqvAbqefHo4gcQZcsUGAv/pX
zJ8jgkYhlt7XTd+6GlJu
=lWof
-----END PGP SIGNATURE-----
Merge tag 'boards-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC board support updates from Olof Johansson:
"The bulk of this branch is updates for Renesas Shmobile. They are
still doing some enablement for classic boards first, and then come up
with DT bindings when they've had a chance to learn more about the
hardware. Not necessarily a bad way to go about it, and they're
looking at moving some of the temporary board code resulting from it
to drivers/staging instead to avoid the churn here.
As a result of the shmobile clock cleanups, we end up merging quite a
bit of SH code here as well. We ended up merging it here instead of
in the cleanup branch due to the other board changes depending on it"
* tag 'boards-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (130 commits)
ARM: davinci: remove checks for CONFIG_USB_MUSB_PERIPHERAL
ARM: add drivers for Colibri T30 to multi_v7_defconfig
ARM: shmobile: Remove Genmai reference DTS
ARM: shmobile: Let Genmai multiplatform boot with Genmai DTB
ARM: shmobile: Sync Genmai DTS with Genmai reference DTS
ARM: shmobile: genmai-reference: Remove legacy clock support
ARM: shmobile: Remove non-multiplatform Genmai reference support
ARM: configs: enable XHCI mvebu support in multi_v7_defconfig
ARM: OMAP: replace checks for CONFIG_USB_GADGET_OMAP
ARM: OMAP: AM3517EVM: remove check for CONFIG_PANEL_SHARP_LQ043T1DG01
ARM: OMAP: SX1: remove check for CONFIG_SX1_OLD_FLASH
ARM: OMAP: remove some dead code
ARM: OMAP: omap3stalker: remove two Kconfig macros
ARM: tegra: tegra_defconfig updates
ARM: shmobile: r7s72100: use workaround for non DT-clocks
ARM: shmobile: Add forward declaration of struct clk to silence warning
ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support
ARM: shmobile: r7s72100: add spi clocks to dtsi
ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support
ARM: shmobile: r7s72100: add i2c clocks to dtsi
...
A quite large set of SoC updates this cycle. In no particular order:
- Multi-cluster power management for Samsung Exynos, adding support for
big.LITTLE CPU switching on EXYNOS5
- SMP support for Marvell Armada 375 and 38x
- SMP rework on Allwinner A31
- Xilinx Zynq support for SOC_BUS, big endian
- Marvell orion5x platform cleanup, modernizing the implementation and
moving to DT.
- _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
that their platform can be enabled in the same kernel binary as most
of the other v7 platforms in the tree. \o/ The work isn't quite complete,
there's some driver fixes still needed, but the basics now work.
New SoC support added:
- Freescale i.MX6SX
- LSI Axxia AXM55xx SoCs
- Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800
- STi STIH407
Plus a large set of various smaller updates for different platforms. I'm
probably missing some important one here.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjOKWAAoJEIwa5zzehBx36aEP/2vTD7x9FC59FACNHJ8iO7aw
0ebTgBBjI1Np6X18O+M7URbxV5TaBgwpUm/NDN86p03MpQ2eOXr8r47qVxe/HhZs
AdlTvzgE6QwxcVL/HeCKKUEN3BPH74+TZgFl9I5aSzNjpR39xETeK1aWP/ZiAl/q
/lGRZAQ59+c7Ung00Hg0g2YDxH9WFpK50Nj90ROnyjKSFkhIYngXYVpZB3maOypq
Pgib/U8IraKZ52oGJw3yinSoORr7FdcUdAGWGTz/lQdNL/jYDfQ6GkRW2oblWXdt
3Xvj9UW6NmkbMICucMvFuuW1nXAgutZuTp9w7mBxsiUlYepxPv/DXM6yiI1WGlEb
BeVOmOreNeN2nT6avv/uUhk3Osq63Jn9x8cz5y+7/lgWQwllh3/c+G01RotvgJEQ
vpQq5ps9fMxIAMaNP6N/YqMJI1IOrBj0iXxaZEDw3VYM/k4lSvtb3VXP9c/rqApu
U4i6hpSIGzrraU4NrjndYPndcLeNOVZbByETQKosZXuCo6G1sb7FstNSkzI9vSo8
O/pujIVUfYyBW82GzZGDw+aa7DWA29FPeUQ3p+sj5MSCg051xXT8h6QwqMo2K/zY
5ATs/qo6w7zH/Ou9rtHTRynCIb0GQJThDSlWtuXFedUF9quEltS+TDz/2o+dWtGJ
yBFGKDRuBB20D36w9xqg
=6LYI
-----END PGP SIGNATURE-----
Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull part one of ARM SoC updates from Olof Johansson:
"A quite large set of SoC updates this cycle. In no particular order:
- Multi-cluster power management for Samsung Exynos, adding support
for big.LITTLE CPU switching on EXYNOS5
- SMP support for Marvell Armada 375 and 38x
- SMP rework on Allwinner A31
- Xilinx Zynq support for SOC_BUS, big endian
- Marvell orion5x platform cleanup, modernizing the implementation
and moving to DT.
- _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
that their platform can be enabled in the same kernel binary as
most of the other v7 platforms in the tree. \o/
The work isn't quite complete, there's some driver fixes still
needed, but the basics now work.
New SoC support added:
- Freescale i.MX6SX
- LSI Axxia AXM55xx SoCs
- Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800
- STi STIH407
plus a large set of various smaller updates for different platforms.
I'm probably missing some important one here"
* tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits)
ARM: exynos: don't run exynos4 l2x0 setup on other platforms
ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug
ARM: EXYNOS: mcpm rename the power_down_finish
ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC
ARM: EXYNOS: Enable multi-platform build support
ARM: EXYNOS: Consolidate Kconfig entries
ARM: EXYNOS: Add support for EXYNOS5410 SoC
ARM: EXYNOS: Support secondary CPU boot of Exynos3250
ARM: EXYNOS: Add Exynos3250 SoC ID
ARM: EXYNOS: Add 5800 SoC support
ARM: EXYNOS: initial board support for exynos5260 SoC
clk: exynos5410: register clocks using common clock framework
ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084
ARM: sunxi: allow building without reset controller
Documentation: devicetree: arm: sort enable-method entries
ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE
clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks
ARM: dts: axxia: Add reset controller
power: reset: Add Axxia system reset driver
ARM: axxia: Adding defconfig for AXM55xx
...
Cleanups for 3.16. Among these are:
- A bunch of misc cleanups for Broadcom platforms, mostly housekeeping
- Enabling Common Clock Framework on the older s3c24xx Samsung chipsets
- Cleanup of the Versatile Express system controller code, moving it to syscon
- Power management cleanups for OMAP platforms
+ a handful of other cleanups across the place
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjMwHAAoJEIwa5zzehBx3MjMP/iELgDsqbNE2wxF9Fb5EEnoe
S11q1QIvVrMVdMcKFN5HfW7f+xNso6+4SwXW0cRrJokGvaqRE758WZWuZq0QBUeS
RYMhfpqmI6pTTJUyy6i6OyXhuRqu8rQ1NPEAatYrKzmtwFX1H4t25f1YtZWhBcK8
ONi45FHeH1OKGGpjpT63uhWEzLk+LZI2MtgxmWoFcemf7guX6vEPJVuVRi8eqLoS
9vl1cAkweYgGhjvQFcSXENaguV50dZlLc9C41dJk9KVvJfRt7o+/cRbG5YpGvnp5
Liu+OWM72w0BkgNk6wDN4kaPX5UGLF8QX11JlvDRCJ2FcPtM4NBG/C9TqLMfkKDR
Ze+ITiXh6NjefdTZWJaM4vzsd6vFws8EYAP24IWFlZ451bNLVN1lzlgqluPNoKmj
CAsFPZhY/x5X9a8VLZ72ohx3N17T/iMsOlbiWtnlfqDcL6N0IoLG1YkFFeQIKEAH
mpobWus8Myq1miWqSaeXh5wOqUVQmYR0I8jNoTfte1nBYSaIGhtMixoQhM6Zw50C
dgSh4p7qhrZUOnYmkPqFXr7NCJ9n3RD10Xu8d/3IIp0u9RJ5Kx6NCEg9adq22jZQ
XGrr/vH0sM8MzpKmfTMi5t2Cx5kP2G+O3enq0hQi4x3Cb4o8vwWQlMgydTd+xBjj
aLo3WTTw0h6nTuKkZL2p
=wuX4
-----END PGP SIGNATURE-----
Merge tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC cleanups from Olof Johansson:
"Cleanups for 3.16. Among these are:
- a bunch of misc cleanups for Broadcom platforms, mostly
housekeeping
- enabling Common Clock Framework on the older s3c24xx Samsung
chipsets
- cleanup of the Versatile Express system controller code, moving it
to syscon
- power management cleanups for OMAP platforms
plus a handful of other cleanups across the place"
* tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
ARM: kconfig: allow PCI support to be selected with ARCH_MULTIPLATFORM
clk: samsung: fix build error
ARM: vexpress: refine dependencies for new code
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
...
The EXYNOS5410 clocks are statically listed and registered
using the Samsung specific common clock helper functions.
Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com>
Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
In this time, it is having dependency with arch/arm/ for 3.16,
I pulled them into samsung tree from Tomasz under agreement from Mike.
- Pull for_3.16/exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
- Pull for_3.16/clk_fixes_non_critical from Tomasz Figa:
"This pull requests contains a number of non-critical fixes for Samsung clock
framework and drivers, including:
1) a series of fixes for Exynos5420 to correct clock definitions and make the
driver closer to the documentation,
2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and
Exynos5420 drivers,
3) fix for incorrect initialization of clock table with NULL,
4) compiler warning fix."
- Pull for_3.16/clk_cleanup from Tomasz Figa:
"This pull requests contains minor clean-up related to Samsung clock
support, including:
1) move Kconfig entries of Samsung clock drivers to drivers/clk,
2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is
selected,
3) remove obsolete Kconfig lines after moving s3c24xx to CCF."
- Pull for_3.16/exynos3250 from Tomasz Figa:
"This small pull request contains a patch adding clock driver for Exynos3250,
which depends on previous pull requests in this series."
- add dt bindings for exynos3250 clock
- add exynos5800 specific clocks in current exynos5420 clock
Note that this branch is based on s3c24xx ccf branch
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTeoa3AAoJEA0Cl+kVi2xqSEgP/0FBT5Hz6aYmTs32Rs4fnPz/
232dV6GEWXLPWnxZNlRo4YlaLT0ZOU+BW17iWln5AnoqEEIwQjezMcDoQm0W7Di9
6gcocX58i7O319Bi6zgCeO1cN+0eo9GuIOX1gD7YghblKNcvx1JnEZ+lriFMSDZw
hM2nTk2JWTLniD6qlU/yf/sdJJI3O37QOgMnccXkzU/PFvNc2/8JYIZJ4FrfalMC
dYmy52QtvKl3vkxvCliVGhyZBm736G3rxkh4hgdI2pczBs6EkH7X7EuqngIaDGZ0
P+5SVcNEbUSWvtvHWRKK1DXv5IaSotfRciEX7OYqssJtQQa0P/MhtvhXCURHzxc4
WxpcPdHha6bHTMAAWtGEuRQ6ReuBGl88gvKWIMfYEK1+8vt1z0c3W3RzJ1hQ0mJ6
oRJA4CAhD9OW/vQaF0LwRPVEZGnPgkohN7Skp/25cKx0wkEQ9zDrSC0sm6jyJy9Y
d0lzsHJY+QRED2luvfSMcwC1xRX1W7w8Qs10rAgExU6zE3Um37nq1MWhx1Ep6GMp
F90mWsNzCfSv4w34i8U8Gy4BZCSpMo8U7z/ivQokAzM1c+mCbL5+teAt1WDbsTL2
Ythah64USFdtU56zzaVr6nLis1ASyfhkQSHDc/r9C3CxGMrdji6Tx41Sp8Z1+Mt9
Y+7h4J//YO+lHPEfi8OR
=PqTJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung clock updates for 3.16" from Kukjin Kim:
In this time, it is having dependency with arch/arm/ for 3.16,
I pulled them into samsung tree from Tomasz under agreement from Mike.
- Pull for_3.16/exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
- Pull for_3.16/clk_fixes_non_critical from Tomasz Figa:
"This pull requests contains a number of non-critical fixes for Samsung clock
framework and drivers, including:
1) a series of fixes for Exynos5420 to correct clock definitions and make the
driver closer to the documentation,
2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and
Exynos5420 drivers,
3) fix for incorrect initialization of clock table with NULL,
4) compiler warning fix."
- Pull for_3.16/clk_cleanup from Tomasz Figa:
"This pull requests contains minor clean-up related to Samsung clock
support, including:
1) move Kconfig entries of Samsung clock drivers to drivers/clk,
2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is
selected,
3) remove obsolete Kconfig lines after moving s3c24xx to CCF."
- Pull for_3.16/exynos3250 from Tomasz Figa:
"This small pull request contains a patch adding clock driver for Exynos3250,
which depends on previous pull requests in this series."
- add dt bindings for exynos3250 clock
- add exynos5800 specific clocks in current exynos5420 clock
Note that this branch is based on s3c24xx ccf branch
* tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (59 commits)
clk: exynos5420: Add 5800 specific clocks
dt-bindings: add documentation for Exynos3250 clock controller
ARM: S3C24XX: fix merge conflict
clk: samsung: exynos3250: Add clocks using common clock framework
drivers: clk: use COMMON_CLK_SAMSUNG for Samsung clock support
ARM: S3C24XX: move S3C24XX clock Kconfig options to Samsung clock Kconfig file
ARM: select COMMON_CLK_SAMSUNG for ARCH_EXYNOS and ARCH_S3C64XX
clk: samsung: add new Kconfig for Samsung common clock option
ARM: S3C24XX: Remove omitted Kconfig selects and conditionals
clk: samsung: exynos5420: add more registers to restore list
clk: samsung: exynos5420: add misc clocks
clk: samsung: exynos5420: update clocks for MAU Block
clk: samsung: exynos5420: fix register offset for sclk_bpll
clk: samsung: exynos5420: correct sysmmu-mfc parent clocks
clk: samsung: exynos5420: update clocks for FSYS and FSYS2 blocks
clk: samsung: exynos5420: update clocks for WCORE block
clk: samsung: exynos5420: update clocks for PERIS and GEN blocks
clk: samsung: exynos5420: update clocks for PERIC block
clk: samsung: exynos5420: update clocks for DISP1 block
clk: samsung: exynos5420: update clocks for G2D and G3D blocks
...
Signed-off-by: Olof Johansson <olof@lixom.net>
A new PLL (gpll4) is added on msm8974 PRO devices to support a
faster sdc1 clock rate. Add support for this and the two new sdcc
cal clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Audio Tracking Logic is designed to be used by HD Radio applications to
synchronize the audio output clocks to the baseband clock. ATL can be also
used to track errors between two reference clocks (BWS, AWS) and generate a modulated
clock output which averages to some desired frequency.
In essence ATL is generating a clock to be used by an audio codec and also
to be used by the SoC as MCLK.
To be able to integrate the ATL provided clocks to the clock tree we need
two types of DT binding:
- DT clock nodes to represent the ATL clocks towards the CCF
- binding for the ATL IP itself which is going to handle the hw
configuration
The reason for this type of setup is that ATL itself is a separate device
in the SoC, it has it's own address space and clock domain. Other IPs can
use the ATL generated clock as their functional clock (McASPs for example)
and external components like audio codecs can also use the very same clock
as their MCLK.
The ATL IP in DRA7 contains 4 ATL instences.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Add macros usable by device tree sources to reference r8a7779 clocks by
index.
Based on work for the r8a7791 SoC by Laurent Pinchart.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
BG2Q joins Berlin SoC family with corresponding development board, DW
gpio nodes for all SoCs. Most notably, we have settled clock bindings
to allow us to continue on drivers requiring clocks and pinctrl bindings.
Last but not least, BG2Q gained SDHCI support and is able to properly
boot into userspace.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTenGqAAoJEN2kpao7fSL4TzgP/0lTj/kMs6jMvJ/Jq92PhJAX
sdyCC5sWdJuC88RcteOaQ5VlGF9bGj9J2RNBDmnyC+HqYbc+e1fmQW+U/+rmcMBt
T5OdmrVY9UxyfpVuXlUN2Y3MORiKNoxZyr8L9GoaER5FrUYQwgGbi+8HyEh3RMV+
np6TJ+zYDpSTZHJmBSvn1xzwVKtDXPDi8kbteFjV4VjUOKJjrWRCSi5Tu71J3C2D
yljmLZZR2Ei96+6YrgyL4qeQkATN3VpAzVDs2jl7SmAK7oRHW1mkBr3ToZQ8cc56
gWUuyeOOU8vSXk+bkp0bIPDxFqfy9LBJqxfG0wVcbWN51as/MmqoorWgU6MQXVHV
Oe292vEi1c+zgsGS4Qg2G0aeIV5ORATa79eHaw4IYM6YXKMoNAI+JFt46SvA0QY7
xKlnjwhgRhN1K5G+veJyemi+L/1KwjPqNbfHpFibmaQV/Q5pNtON2WR93LgUO42Q
3daOH7nSHatCo81iSzy8NoQD1rgylFq8HOFGFdfp+QL68qLb7wsn6goOtcltWYBE
TT7C/YyjWdy13MQaJkrRZQIKPMDGFk6X3Bd6yWICbiPZW9svBkM9cFeqiyJo0CEu
miHIVMxgoOVt1LyC08w9A66fhFuKrWI0Si6Ig573klvpzUBfy9lc2KcZ+stheCkZ
6VW13d+DfBoyy+z78rQ/
=C9FR
-----END PGP SIGNATURE-----
Merge tag 'berlin-dt-3.16' of https://github.com/shesselba/linux-berlin into next/dt
Merge "ARM: berlin: DT changes for v3.16" from Sebastian Hesselbart:
Quite a lot changes but it looks like DT approach is really paying off.
BG2Q joins Berlin SoC family with corresponding development board, DW
gpio nodes for all SoCs. Most notably, we have settled clock bindings
to allow us to continue on drivers requiring clocks and pinctrl bindings.
Last but not least, BG2Q gained SDHCI support and is able to properly
boot into userspace.
* tag 'berlin-dt-3.16' of https://github.com/shesselba/linux-berlin:
ARM: dts: berlin: enable SD card reader and eMMC for the BG2Q DMP
ARM: dts: berlin: add the SDHCI nodes for the BG2Q
ARM: dts: berlin: add the pinctrl node and muxing setup for uarts
dt-binding: ARM: add pinctrl binding docs for Marvell Berlin2 SoCs
ARM: dts: berlin: convert BG2Q to DT clock nodes
ARM: dts: berlin: convert BG2 to DT clock nodes
ARM: dts: berlin: convert BG2CD to DT clock nodes
clk: berlin: add binding include for Berlin SoC clock ids
dt-binding: ARM: add clock binding docs for Marvell Berlin2 SoCs
ARM: dts: berlin: add the BG2CD GPIO nodes
ARM: dts: berlin: add the BG2 GPIO nodes
ARM: dts: berlin: add the BG2Q GPIO nodes
ARM: dts: berlin: add scu and chipctrl device nodes for BG2/BG2Q
ARM: dts: berlin: add the Marvell BG2-Q DMP device tree
ARM: dts: berlin: add the Marvell Armada 1500 pro
Signed-off-by: Olof Johansson <olof@lixom.net>
conversion to device tree. This series sets up the PMIC signaling
in a way where we can test for PM regressions easily by
looking at state of the the sys_clkreq and sys_off_mode pins.
Note that this series alone does not make omap3 PM to cut
off core voltage during off-idle, changes to twl4030-power.c
configurations are still needed. Those will be posted
separately.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTa+Y/AAoJEBvUPslcq6VzzIoQAIRtJk2cvwd/8CzfmNG6OQl1
cuzO0/HUsueQtzarCcNLSR00a9COD9ZcrZPIJWGsnSs/HM0bOWQTnx2GE75o//58
PxOF527a66Eyg+VmJvJAeo/lkTWhsTrb1CgRN45KnP6sVbtO5+5MYGrkkbw2q/ML
lfFqiMrB02a9mp2Rq2Qy4et4L1bedTEAX5NdmKzZRIoygavXTWe/zP/FKppBnYTh
bcUGjPDbkwUHQFoJKpX4I5yq91rWdZuPD0cb+e4QYI/+C2b7yQX5HFJBT0x9hDOl
aGEh08dzO6jTU5HFlJhXOjBka7M9iBaYixKOU8ejnoFtVzU1A/tXOFIdyafBWp4N
iYUqTW3HTKgeFnTEW7ei55XC3Mfwuk7YHm9v+GEhU76iw9FnChMajLBaUwRnL5Tm
8YxKK2ubcgYW10bK5ZhvRP2dPAOgn7x7uwm9Mp8Il2zyvTiOR5Fw/oyd1l5G4tlD
FM1+v19xypfGFIyULZwFsSDL+0M57OudvK4U75vue0oyV6QyksHDHeu2k5nETTsS
CHcjUO0rJTAcgOQrgGuQCmD0qcUu7Qs40boQ8YQlZ73sJSH2qNR5QCRjOXi0r5gx
yoqpor2rR4R9q+XEpHA3M/YjerH0rsAtsXETPg7yifEP9TV8TDnTTRGyxxgeXHlo
22mOK74gPcGH6EBaPeY7
=SIKK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "ARM: omap pm changes for v3.16 merge window, resend" from Tony Lindgren:
PM related fixes for omap3 that were discovered during omap3
conversion to device tree. This series sets up the PMIC signaling
in a way where we can test for PM regressions easily by
looking at state of the the sys_clkreq and sys_off_mode pins.
Note that this series alone does not make omap3 PM to cut
off core voltage during off-idle, changes to twl4030-power.c
configurations are still needed. Those will be posted
separately.
* tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Enable CPUidle in omap2plus_defconfig
ARM: dts: Enable N900 keyboard sleep leds by default
ARM: OMAP2+: Fix voltage scaling init for device tree
ARM: dts: Configure omap3 twl4030 I2C4 pins by default
ARM: OMAP3: Fix voltage control for deeper idle states
ARM: OMAP3: Disable broken omap3_set_off_timings function
ARM: OMAP3: Fix idle mode signaling for sys_clkreq and sys_off_mode
ARM: dts: Fix omap serial wake-up when booted with device tree
mfd: twl-core: Fix idle mode signaling for omaps when booted with device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTeqB/AAoJEBvUPslcq6VzBEcQANY9sHb6yyL0l+NkC8NdcRiv
4QASanwEXYJf9qCFujdEwBAxjVhRm32D+bzY1UGCTvcPQY3573QqKA0O3qaASbXJ
hROZtgBll72mloKo+3gC2y1fQiKuFLb8fa7Ns9c6j7tTaDBpoN6X6ZVWY+9X+VPc
wrOh2Q5pqYZRf8fYuI9v0+p/zpna8I6spdD6rcOTMjoe84RTYSX0Ge6gcDhhvNZ5
oE7UWgHmqWVQ6GlRPAPqLKe/AjGraOnzh9g71Al329UF5jOFf43T5lyoVBtdbbEY
bDRIir9lpWF9wGhY7Lgs2RcocGiWbQGvLRHlXfegem1D40OyBxpYYUzKxuuvXeae
dLINKavWvlp73EtkZzN7EX8f/BjpZy30H4Nu397tO0vA2GsuZ7SxcH4bS8POpVLT
s6kYLrSi3vU0idypmk8YIewfeVWVFI6gx2mMsVeOgyIW15KuuV/7q0Zk6cbPyNio
HMVwjh7owtVFUz0D9gRG16tMODN4OvtUO56hguNUCWdbc4mJ938mAqlT3c5JZ6F6
8q9CGXCOfiHa3x6qkgsjOYPefEqBxMUivyagukG3XeHxF5BCa7yJkrEq8tn3627b
1bs3z1ylxUSbuLdy1RtUY/HlyFiqvjeVpDIHfrbcnWRhNFHLm8IIq/w9+dXbCiKI
CDVvmPIxHK910JnzI3PN
=Su13
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/dt-part2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "ARM: omap dt changes for v3.16 merge window, part 2" From Tony Lindgren:
Device tree related changes for omaps.
* tag 'omap-for-v3.16/dt-part2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (49 commits)
ARM: dts: Enable mcpdm and mcbsp1 on DuoVero
ARM: dts: Convert DuoVero Parlor to use IOPAD macro
ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition
ARM: dts: dra7: add support for parallel NAND flash
ARM: dts: am437x-gp-evm: Add ethernet support for GP EVM
ARM: dts: am4372: Add cpsw phy sel dt node
ARM: OMAP2+: Use pdata quirks for wl12xx on VAR-STK/DVK-OM44
ARM: dts: Add VAR-SOM-OM44 WLAN nodes
ARM: dts: Add support for OMAP4 VAR-DVK-OM44
ARM: dts: Add support for OMAP4 Variscite OM44 family
ARM: dts: Change IOPAD macro's for OMAP4/5
ARM: dts: AM33XX: fix ethernet and mdio default state
ARM: dts: am4372: Add hdq device tree data
ARM: omap2+: skip device build from platform code for dt
dts: dra7-evm: add USB support
ARM: dts: dra7: Add USB related nodes
ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate
ARM: dts: omap4+: Add clocks to USB2 PHY node
ARM: dts: dra7: add OCP2SCP3 and SATA nodes
ARM: dts: omap5: add sata node
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the missing sysmmu clocks for Display and
ISP blocks.
Signed-off-by: Cho KyongHo <pullip.cho@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Merge "Qualcomm ARM Based Device Tree Updates for v3.16" from Kumar Gala:
* Added device tree nodes for pinctrl and SDHC for msm8974 SoC/DB8074 board
* Added binding spec for GSBI configuration node
* tag 'qcom-dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
soc: qcom: Add device tree binding for GSBI
ARM: dts: msm: Add SDHC controller nodes for MSM8974 and DB8074 board
ARM: dts: MSM8974: Add pinctrl node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "ARM: STi: DT changes for v3.16, v3" from Maxime Coquelin:
Please consider these STi DT updates for v3.16.
This 3rd version takes into account Olof's comments on the v2:
- Fix upper-cases in labels and node names
- Sort compatibles order from specific to generic
- Sort dts entries in Makefile
It also adds support for the B2020 revision E board for STiH416 SoC.
Note that two reset patches are part of this pull request, in order to avoid
compilation breakage.
Adding these two patches in this pull request has been accepted by Philipp Zabel.
* tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti: (23 commits)
ARM: sti: stih41x: Provide a proper header for this DTSI file
ARM: sti: stih416: Enable board LED support for B2020 RevE
ARM: sti: stih416: Add support for B2020 RevE
ARM: STi: DT: STiH41x Add clk_ignore_unused to bootargs
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A9
ARM: STi: DT: STiH415: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
ARM: STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12
ARM: STi: DT: STiH416: 416 DT Entry for clockgen A9/DDR/GPU
ARM: STi: DT: STiH416: 416 DT Entry for clockgen B/C/D/E/F
ARM: STi: DT: STiH416: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
ARM: STi: DT: STiH416: Remove unused CLK_S_ICN_REG_0 fixed clock
ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12
ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
ARM: STi: DT: add keyscan for stih41x-b2000
ARM: STi: DT: add keyscan for stih416
ARM: STi: DT: add keyscan for stih415
driver: reset: sti: add keyscan for stih416
driver: reset: sti: add keyscan for stih415
ARM: dts: STiH407: Add B2120 board support
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
