GPIO175 is used for PEN_IRQ on the EVM. This patch
sets the mux settings for the same.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The keypad was not working properly after migrating
to matrix_keypad.
Swapped the row, col fields of the KEY() macro in
the keymap definition to get it working again.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch sets SYS_NIRQ for keypad input. It also
sets the same as a wakeup event from OFF mode.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Zoom3 board has omap3630 EHCI port2 connected to a ULPI phy.
GPIO_64 is connected to the PHY reset pin.
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The check for a valid mux name should be performed regardless of whether
DEBUG_FS is enabled or not. Otherwise without DEBUG_FS, we get:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = c0004000
[00000000] *pgd=00000000
Internal error: Oops: 5 [#1]
last sysfs file:
Modules linked in:
CPU: 0 Not tainted (2.6.33-rc8 #10)
PC is at strcmp+0x18/0x40
LR is at omap_mux_init_signal+0x68/0x14c
...
This fixes the issue currently seen with boards not booting up
if DEBUG_FS is not enabled in defconfig.
Note that the earlier ifndef + ifdef now becomes simpler ifdef else:
If CONFIG_OMAP_MUX is selected, we use pin names. If it's not selected,
we only want the GPIO to mux register mapping.
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds L2 Cache support for OMAP4. External L2 cache
is used in OMAP4
CC: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
sdp4430_uart_config isn't used anywhere, so remove it.
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add base address definations for new AM35xx IPSS modules, like
VPFE, USBOTG, CPGMAC.
Please note that the OMAP34xx IVA2 memory space is being used for
AM35xx IPSS modules.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Changes for setting the padconf value for sys_nirq line which is
connected to T2 INTR1. This will fix the T2 keypad wakeup.
Signed-off-by: Lesly A M <x0080970@ti.com>
Signed-off-by: Teerth Reddy <teerth@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Get rid of the ifdeffery in omap_mux_init by creating
omap_mux_init_package and omap_mux_init_signals functions.
Signed-off-by: Tony Lindgren <tony@atomide.com>
EMMC can have two voltage supplies, Vcc and VccQ
which are implemented in the code as consumer
supplies vmmc and vmmc_aux.
If the regulator that supplies vmmc_aux is shared
with other consumers, then sending it to sleep
will disrupt those consumers. However, the
TWL4030-family regulators may have OFF remapped
to SLEEP, in which case 'regulator_disable()'
will put the regulator to sleep only when all
consumers are disabled - which is the desired
behaviour.
This patch adds a platform data field to allow
that option.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
An eMMC may be always powered on, so that the lowest
power saving state possible is sleeping. Add a field
to the platform data to indicate that.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
It has been discovered that, when eMMC is powered off, current
will flow from OMAP eMMC data pull-ups to the eMMC voltage supply.
Configuring pads for OMAP off-mode does not help because eMMC is
powered off independently of OMAP off-mode. Hence the pads are
now re-configured when eMMC is powered on or off.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Call the PM context-loss count function, now that there
is a prototype for it.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
hsmmc.[ch] no longer has any dependency on twl4030
and variable names should be renamed to reflect that.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
mmc-twl4030.[ch] no longer has any dependency on twl4030
and should be renamed to reflect that.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch moves the setup code for GPIO's and Voltage
Regulators from the board file mmc-twl4030.c to the
driver omap_hsmmc.c. PBIAS and other system control
configuration remains in the board file.
Moving GPIO code to the driver makes the board initialisation
code independent of when GPIO's are defined. That makes the
board initialisation now entirely independent of its original
twl4030 roots.
Moving Voltage Regulator code to the driver allows for further
development of regulator support in the core MMC code. It also
permits the MMC core to be compiled as a module, because the
board code no longer calls MMC core functions.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds support for flashes on 3430SDP boards. All three
NAND, NOR and OneNAND are supported. I have tested it on
3430SDP (ES2 and ES3.1).
This patch can be treated as an example to "how to utilize":
'gpmc-nand.c' and 'board-sdp-flash.c'.
Similar patches can be created for 2430sdp and 3630sdp or any other
similar board.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds 'board-sdp-flash.c', which could be utilized
by boards similar to 3430SDP. (For ex: 2430sdp, 36030sdp).
This file does initialization for all three flash devices present
in SDP boards (NOR, NAND, OneNAND), by finding there 'cs' number
dynamically using switch setting information (S8: 1-4).
This also expects partition information from core board files (for
ex: board-3430sdp.c). Which allows to choose different default
partitions for different boards.
A new structure is created for this purpose: 'flash_partitions'
in 'mach/board-sdp.h'. This has two members:
1. struct mtd_partition *parts
2. int nr_parts
A board file is expected to fill this structure and pass it to
'sdp-flsash-init'. Partition information should be passed in
structure array of 'flash_partitions'. Partition information should
be passed in below sequence in array:
NOR
OneNAND
NAND
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Introducing 'gpmc-nand.c' for GPMC specific NAND init.
For example: GPMC timing parameters and all.
This patch also migrates gpmc related calls from 'nand/omap2.c'
to 'gpmc-nand.c'.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Get rid of the following warnings:
arch/arm/mach-omap2/gpmc.c:550:30: warning: non-ANSI
function declaration of function 'omap3_gpmc_save_context'
arch/arm/mach-omap2/gpmc.c:581:33: warning: non-ANSI
function declaration of function 'omap3_gpmc_restore_context'
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Determine cache size required per McBSP port at init time, based on
processor type running on.
Allocate space for storing cached copies of McBSP register values at
port request.
Modify omap_msbcp_write() function to update the cache with every
register write operation.
Modify omap_mcbsp_read() to support reading from cache or hardware.
Update MCBSP_READ() macro for modified omap_mcbsp_read() function API.
Introduce a new macro that reads from the cache.
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with: omap_perseus2_730_defconfig, omap_generic_1610_defconfig,
omap_generic_2420_defconfig, omap_2430sdp_defconfig, omap_3430sdp_defconfig,
omap_4430sdp_defconfig with CONFIG_OMAP_MCBSP=y selected.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert OMAP based boards to use physmap-flash. Refreshed against today's
Linux omap kernel tree
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rename clkops_noncore_dpll_ops for omap3 and omap4.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Allow booting omap4 with multi-omap configuration.
Tested only on omap2 and omap3, please somebody test
on omap4 and ack.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move defines around and set up handlers based on MULTI_OMAP2.
Note that this will only allow compiling in omap4 with omap2 and
omap3. It will not yet make omap4 boot with multi-omap.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Define the irq base the same way as for omap2 and omap3,
and start using get_irqnr_preamble.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Make get_irqnr_and_base common for mach-omap2 multiboot
Thanks to a tip from Russell King <rmk+kernel@arm.linux.org.uk>,
this also optimizes the code for non-multiboot configurations by
using get_irqnr_preamble.
Note that this will only work currently for 24xx and 34xx.
Support for 44xx can be added later on for basic multiboot,
and similar patch should be done for mach-omap1/entry-macro.S.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Define arch_decomp_setup() the same way as some other
architectures do. Use arch_id to configure the debug uart
based on the machine_is by storing it into the uart
scratchpad register for DEBUG_LL code to use.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This way we don't have conflicts with the defines
with compiling in multiple omaps. Set the addresses
for uarts in struct omap_globals for the early serial
init code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Otherwise more complicated uart configuration won't be possible.
We can use r1 for tmp register for both head.S and debug.S.
NOTE: This patch depends on another patch to add the the tmp register
into all debug-macro.S files. That can be done with:
$ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/"
arch/arm/*/include/*/debug-macro.S
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The regulator is now enabled by DSS driver, and thus the panel driver
doesn't need to touch it.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
The platform data allocated with kmalloc() will become unreachable once
the init is complete, so it should be freed. The problem was discovered
by kmemleak.
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently the omap serial clocks are autoidled after 5 seconds.
However, this causes lost characters on the serial ports. As this
is considered non-standard behaviour for Linux, disable the timeout.
Note that this will also cause blocking of any deeper omap sleep
states.
To enable the autoidling of the serial ports, do something like
this for each serial port:
# echo 5 > /sys/devices/platform/serial8250.0/sleep_timeout
# echo 5 > /sys/devices/platform/serial8250.1/sleep_timeout
...
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
David Binderman ran the sourceforge tool cppcheck over the source code of the
new Linux kernel 2.6.33-rc6:
[./arm/mach-omap2/mux.c:492]: (error) Buffer access out-of-bounds
13 characters + 1 digit + 1 zero byte is more than 14 characters.
Also add a comment on mode0 name length in case new omaps
start using longer names.
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3630 has more mux signals than 34xx. The additional pins
exist in omap36xx_cbp_subset, but are not initialized
as the superset is missing these offsets. This causes
the following errors during the boot:
mux: Unknown entry offset 0x236
mux: Unknown entry offset 0x22e
mux: Unknown entry offset 0x1ec
mux: Unknown entry offset 0x1ee
mux: Unknown entry offset 0x1f4
mux: Unknown entry offset 0x1f6
mux: Unknown entry offset 0x1f8
mux: Unknown entry offset 0x1fa
mux: Unknown entry offset 0x1fc
mux: Unknown entry offset 0x22a
mux: Unknown entry offset 0x226
mux: Unknown entry offset 0x230
mux: Unknown entry offset 0x22c
mux: Unknown entry offset 0x228
Fix this by adding the missing offsets to omap3 superset.
Note that additionally the uninitialized pins need to be
skipped on 34xx.
Based on an earlier patch by Allen Pais <allen.pais@ti.com>.
Reported-by: Allen Pais <allen.pais@ti.com>
Signed-off-by: Allen Pais <allen.pais@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Ensure valid clock pointer during GPMC init. Fixes compiler
warning about potential use of uninitialized variable.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Ensure valid base address during IRQ init. Fixes compiler warning
about potential use of uninitialized variable.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert CONFIG_ARCH_OMAP34XX to CONFIG_ARCH_OMAP3, and
CONFIG_ARCH_OMAP24XX to CONFIG_ARCH_OMAP2, in preparation for Tony's
multi-OMAP patches.
While here, update some copyrights, convert instances of "34xx" to
"3xxx" where applicable, and convert preprocessor directives of the
form
#if defined(CONFIG_ARCH_OMAP2) | defined(CONFIG_ARCH_OMAP3)
to
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
for standardization.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
The macros defining the shift bits in registers for various
register bit fields are defined as 1 << n.
Instead define them as n. They can then be used as val << n.
The changes are generated by updating the script which autogenerates
the files modifed in the patch.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rename the omap2_clk_init() in the OMAP2, 3, and 4 clock code to be
omap2xxx_clk_init(), omap3xxx_clk_init(), etc. Remove all traces of
the (commented) old virt_prcm_set code from omap3xxx_clk_init() and
omap4xxx_clk_init(), since this will be handled with the OPP code that
is cooking in the PM branch.
After this patch, there should be very little else in the clock code
that blocks a multi-OMAP 2+3 kernel. (OMAP2420+OMAP2430 still has some
outstanding issues that need to be resolved; this is pending on some
additions to the hwmod data.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Move all static functions up to the top of the file to match the
practice in other OMAP clock code. Make omap3_noncore_dpll_program()
static (noted by sparse) and prepend an underscore to the function
name to mark that it is file-local.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
omap2_clk_prepare_for_reboot() is only applicable to OMAP2xxx chips,
so rename it to omap2xxx_clk_prepare_for_reboot() and only call it when
running on OMAP2xxx chips. Remove the old stub in the OMAP3 clock code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Now that almost all of the code has been removed from clock2xxx.c and
clock34xx.c, many of the includes are now unnecessary and can be removed.
While we're here, standardize the initial comment blocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
In the OMAP3xxx clock code, remove the #ifdef CONFIG_ARCH_OMAP3 in
clock34xx.c, since this file is only compiled for OMAP3xxx builds. Also,
rename omap2_clk_arch_init in this file to omap3xxx_clk_arch_init() to
pave the way for multi-OMAP kernels. Ensure that it is not executed
on non-OMAP3xxx systems.
In the OMAP2xxx clock code, rename omap2_clk_arch_init in this file to
omap2xxx_clk_arch_init() to pave the way for multi-OMAP kernels.
Ensure that it is not executed on non-OMAP2xxx systems.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Split the DPLL3 M2 divider clock functions out of clock34xx.c and move
them into mach-omap2/clkt34xx_dpll3m2.c. This is intended to make the
clock code easier to understand, since all of the functions needed to
manage the OMAP3 DPLL3 M2 divider are now located in their own file,
rather than being mixed with other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG macro
can now be defined for the DPLL3 M2 clock alone. This should reduce
unnecessary console noise when debugging DVFS.
Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be placed in the mach-omap34xx/
directory, rather than shared with other chip types that don't use this
clock type.
This patch also lays the groundwork to skip compilation of this
code on OMAP3 chips that don't support DVFS (e.g., AM35xx) via
the Makefile, rather than via #ifdefs.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
omap2430_clk_i2chs_find_idlest() doesn't need to be compiled in on
non-2430 builds, so skip it in those cases to save memory.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Move the sys_clk clock functions from clock2xxx.c to
mach-omap2/clkt2xxx_sys.c. This is intended to make the clock code
easier to understand, since all of the functions needed to manage the
sys_clk are now located in their own file, rather than being mixed
with other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG
macro can now be defined for the sys_clk clock alone. This
should reduce unnecessary console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split into
OMAP2/3/4 variants, this clkt file can be placed in the mach-omap2xxx/
directory, rather than shared with other chip types that don't use
this clock type.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
Move the osc_clk clock functions from clock2xxx.c to
mach-omap2/clkt2xxx_osc. This is intended to make the clock code
easier to understand, since all of the functions needed to manage the
osc_clk are now located in their own file, rather than being mixed
with other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG
macro can now be defined for osc_clk clocks alone. This
should reduce unnecessary console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be placed in the mach-omap2xxx/
directory, rather than shared with other chip types that don't use this
clock type.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
Move the APLL-related clock functions from clock2xxx.c to
mach-omap2/clkt2xxx_apll.c. This is intended to make the clock code
easier to understand, since all of the functions needed to manage APLLs
are now located in their own file, rather than being mixed with other,
unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG
macro can now be defined for APLL clocks alone. This
should reduce unnecessary console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be placed in the mach-omap2xxx/
directory, rather than shared with other chip types that don't use this
clock type.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
Move the DVFS virtual clock functions from clock2xxx.c to
mach-omap2/clkt2xxx_virt_prcm_set.c. This is intended to make the
clock code easier to understand, since all of the functions needed to
manage the virt_prcm_set clock are now located in their own file,
rather than being mixed with other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG macro
can now be defined for the virt_prcm_set clock alone. This should
reduce unnecessary console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split into
OMAP2/3/4 variants, this clkt file can be placed in the mach-omap2xxx/
directory, rather than shared with other chip types that don't use
this clock type.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments.
Thanks also to Kevin Hilman <khilman@deeprootsystems.com> for finding
and fixing a bug with the CONFIG_CPU_FREQ portion of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Move the DPLL+CORE composite clock functions from clock2xxx.c to
mach-omap2/clkt2xxx_dpllcore.c. This is intended to make the clock
code easier to understand, since all of the functions needed to manage
the OMAP2 DPLL+CORE clock are now located in their own file, rather
than being mixed with other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG
macro can now be defined for the DPLL+CORE clock alone. This
should reduce unnecessary console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be placed in the mach-omap2xxx/
directory, rather than shared with other chip types that don't use this
clock type.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
The struct clk_functions for OMAP2, 3, and 4 are all essentially the
same, so combine them. This removes one multi-OMAP kernel impediment
and saves memory on multi-OMAP builds.
The stubs for omap2_clk_{init,exit}_cpufreq() code will removed once
the OPP layer code that's currently in Kevin's PM branch is merged.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Move static functions to the top of the file and ensure that their names
are prefixed with an underscore to conform with the practice in the newer
OMAP clock code files.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Move all clksel-related clock functions from mach-omap2/clock.c to
mach-omap2/clkt_clksel.c. This is intended to make the clock code
easier to understand, since all of the functions needed to manage
clksel clocks are now located in their own file, rather than being
mixed with other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG macro
can now be defined for clksel clocks alon. This should reduce
unnecessary console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be moved to the plat-omap/
directory to be shared.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
Move all DPLL-related clock functions from mach-omap2/clock.c to
mach-omap2/clkt_dpll.c. This is intended to make the clock code
easier to understand, since all of the functions needed to manage
DPLLs are now located in their own file, rather than being mixed with
other, unrelated functions.
Clock debugging is also now more finely-grained, since the DEBUG macro
can now be defined for DPLLs alone. This should reduce unnecessary
console noise when debugging.
Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be moved to the plat-omap/
directory to be shared.
Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
improve the patch description.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexander Shishkin <virtuoso@slind.org>
Mark the OMAP3-specific DPLL functions as being OMAP3-specific by moving
them from mach-omap2/dpll.c to mach-omap2/dpll3xxx.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Some HW blocks have errata which requires specific slave idle mode
under certain conditions.
This patch adds an hwmod API to allow setting slave idlemode
ensuring that any SYSCONFIG register updates go through hwmod.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch only affects documentation; no functional changes are
included.
Clean up comments in the current clockdomain, powerdomain code and
header files. This mostly involves conversion to kerneldoc format,
although some clarifications are also included.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Nothing calls pwrdm_clk_state_switch(), and the function that seems to be
its ideal use case calls pwrdm_clkdm_state_switch(clk->clkdm), so remove it.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
OMAP clockdomains and powerdomains are currently defined statically,
only registered at boot, and never unregistered, so we can remove the
unregister function and the locking. A variant of this was originally
suggested a while ago by Dmitry Baryshkov <dbaryshkov@gmail.com>.
This version of this patch contains an additional fix from Kevin Hilman
<khilman@deeprootsystems.com> to address one of the pwrdm_for_each_nolock()
users in mach-omap2/pm-debug.c. Thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Dmitry Baryshkov <dbaryshkov@gmail.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
For some reason, previously, we included the MDM clockdomain on all 24xx,
but the stacked die-on-die modem configuration (chassis mode) is only
available on OMAP2430.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Previously some of the clockdomain wakeup/sleep dependency structures
were shared between several domains. For the subsequent wakeup and sleep
dependency usecounting patch to work, these can no longer be
shared. This patch splits the shared structures apart.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Move clockdomain wakeup dependency and sleep dependency data
structures from the powerdomain layer to the clockdomain layer, where
they belong. These dependencies were originally placed in the
powerdomain layer due to unclear documentation; however, it is clear
now that these dependencies are between clockdomains. For OMAP2/3,
this is not such a big problem, but for OMAP4 this needs to be fixed.
Thanks to Benoît Cousson <b-cousson@ti.com> for his advice on this
patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
One of the clock domains was missing from the auto-generated file.
It has been added here.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The clockdomain related code being in place, it is not necessary to have
some part of the clock code commented out. This would help the validation of
the clockdomain functions using the clock level interfaces.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
One of the OMAP1 clocks can use the fixed divisor recalculation code
introduced in the OMAP2 clock code, so rename the
omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc()
and make it available to all OMAPs. A followup patch converts the OMAP1
clock.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
AM3505/17 though a OMAP3530 derivative have the following
main differences
- Removal of the following OMAP3 modules
- IVA
- ISP/CAM
- Modem and D2D components (MAD2D, SAD2D)
- USIM
- SSI
- Mailboxes
- USB OTG
- ICR
- MSPRO
- SmartReflex
- SDRC replaced with EMIF4 Controller in the SDRC subsystem
thus adding support for DDR2 memory devices
- Addition of the following new modules
- Ethernet MAC (CPGMAC)
- CAN Controller (HECC)
- New USB OTG Controller with integrated Phy
- Video Processing Front End (VPFE)
- Additional UART (UART4)
- All security accelerators disabled on GP devices and not to
be accessed or configured
This patch defines CPU flags for AM3505/17 and update the clock table.
Clock support for new modules will be added by subsequent patches.
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
[paul@pwsan.com: updated for 2.6.34 clock layout]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add CK_* flags for the two new Sitara chips, AM3505 and AM3517, and
the OMAP34xx die shrink, OMAP36xx/OMAP37xx. Introduce a new CK_*
flag, CK_3XXX, that marks all clocks that are common to OMAP3 family
chips. CK_343X now refers to clocks that are available only on
OMAP34{1,2,3,4}0 (WTBU) and OMAP35{03,15,25,30} (any version).
At some point, the RATE_IN_* flags should be updated also.
While here, add some documentation describing the chip families
covered by these clock flags.
This patch is partially based on patches from Ranjith Lohithakshan
<ranjithl@ti.com> and Vishwanath Sripathy <vishwanath.bs@ti.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
Port the APIs to support the OMAP4 clockdomain framework.
Also take care of the compiling requirements for the same.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
The introduction of the OMAP4 Clock Domain framework requires
some adaptaions to be done in the earlier files to place the
common and uncommon data in the proper places where they belong.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
The Autogenerated OMAP4 clock domain specific file
(mach-omap2/clockdomains44xx.h) is added here. This file is
auto-generated using python scripting, and following is the lsit of
the people involved:
Benoit Cousson
Abhijit Pagare
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Here the APIs are modified to use absolute addresses instead of module offsets.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Here the ".clkstctrl_reg" field is added to the clockdomain stucture
as the module offsets for OMAP4 do not map one to one for powerdomains
and clockdomains as it used to for OMAP3. Hence we need to use absolute
addresses to access the control registers. Some of the clock domains have
modules falling in the address space of PRM partition. Hence necessitating
the use of absolute adresses.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
The proper Macros have to be used for platform specific calls and
some of the compiling requirements and init calls are taken care of.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Taking care of the platform specific and common power domains with
proper checks. Also refining some Macros according to the latest
OMAP4 requirements.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
The Autogenerated OMAP4 power domain specific file (mach-omap2/powerdomains44xx.h)
is added here.
This file is auto-generated using python scripting and following is the list of the people
involved:
Paul Walmsley
Benoit Cousson
Abhijit Pagare
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4.
Hence we need different macros for identifying platform specific offsets.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Some of the OMAP4 specific chip level initialisations are taken care of.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated
to apply after the intervening cpu.h/id.c patch; thanks also to Tony
for catching a bug in my rewrite]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Fix following warning when CONFIG_DEBUG_FS wasn't selected:
arch/arm/mach-omap2/pm-debug.c:57: warning: 'pm_dbg_init' declared 'static' but never defined
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Currently, DSS does not wakeup when there is a DMA request. DSS wake
up event must be enabled so that the DMA request to refill the FIFO
will wake up the CORE domain.
Signed-off-by: Subramani Venkatesh <subramani.venkatesh@windriver.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Due to OMAP3 erratas 1.157, 1.185 the save of the last pad register
(ETK_D14 and ETK_D15) can fail sometimes when there is simultaneous
OCP access to the SCM register area. Fixed by writing the last
register to the save area.
Also, optimized the delay loop for the HW save to include an udelay(1),
which limits the number of unnecessary HW accesses to SCM register area
during the save.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
val is an u64 pointer, we need an int to check the error.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Wake-up from McBSP ports are needed, especially when the THRESHOLD
dma mode is in use for audio playback.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The PM debug code fails to build on when CONFIG_DEBUG_FS is not
enabled.
Build error log:
arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle':
arch/arm/mach-omap2/pm34xx.c:449: undefined reference to `pm_dbg_regset_save'
arch/arm/mach-omap2/pm34xx.c:460: undefined reference to `pm_dbg_regset_save'
arch/arm/mach-omap2/built-in.o: In function `configure_vc':
arch/arm/mach-omap2/pm34xx.c:1237: undefined reference to `pm_dbg_regset_init'
arch/arm/mach-omap2/pm34xx.c:1238: undefined reference to `pm_dbg_regset_init'
make: *** [.tmp_vmlinux1] Error 1
This patch fixes the above errors.
Kernel booting is tested on omap zoom2 and zoom3 boards.
Signed-off-by: Manjunatha GK <manjugk@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
As part of Core domain context restoration while coming out of off mode
there are some registers being restored which are not required to be restored.
ROM code will have restored them already. Overwriting some of them can have
potential side effect. Eg: CM_CLKEN_PLL register should not be written while dpll is locked.
Tested on OMAP 3430 SDP for suspend/resume and off mode with sleep_while_idle enabled.
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Current value is stored on SDRAM and it is written back during wakeup.
Previously a static value of 0x72 was written there.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Acked-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Previously used u32 as temporary data storage that wraps around at 4.294s.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch removes code blocks that are repeated
in function prcm_setup_regs().
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
OMAP interrupt controller goes to unknown state when there is right
combination of l3,l4 sleep/wake-up transitions, l4 autoidle in
interrupt controller and some interrupt. When this happens, interrupts
are not delivered to ARM anymore and ARM will remain in WFI (wait for
interrupt) until interrupt controller is forced to wake-up
(i.e. lauterbach).
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Enable the auto-idle feature of the SCM block to save some additional
power.
Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Suspending drivers may still generate interrupts just before their suspend is
completed. Any pending interrupts here will prevent sleep.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Don't assume that gpmc_l3_clk is on, enable it before touching
configuration registers.
Note that the current code assumes that this clock is always
enabled. We are already setting smart idle and L3 autogating
for GPMC clock in gpmc_init.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For all DPLL's the valid dividers are same as the values
to be programmed in the register. 0 is an invalid value.
The changes are generated by updating the script which autogenerates
the file modifed in the patch.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The CHIRONSS has its own local PRCM module and the register defines
need to use the CHIRONSS base and not the PRM base.
The changes are generated by updating the script which autogenerates
the file modifed in the patch.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We need to set the omap_chip.oc carefully for the clocks to work.
To fix this, set the omap_chip.oc in omap3_check_features() based
on the CONTROL_IDCODE and silicon revision registers.
Also add handling for 34xx es3.1.2 as es3.1 for now.
Fixes booting on at least overo board.
Based on an earlier patch by Paul Walmsley <paul@pwsan.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Make the omap_mux_read and write available for board code,
and rename omap_mux_set_board_signals into omap_mux_write_array.
Also add the related prototypes and comments into mux.h.
In some cases we want to change the signals dynamically,
mostly for power management.
Note that we cannot use the signal names as they are set
__init to save memory.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like cmdline muxing got broken at some point when we
decided to limit muxing to __init code. Currently omap_mux_entry
list is not yet initialized when we try to initialize cmdline
muxing.
Fix this by calling omap_mux_init_list() before calling
omap_mux_set_cmdline_signals().
Reported-by: Philip Balister <philip@balister.org>
Tested-by: Philip Balister <philip@balister.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The first thing that omap2_init_clksel_parent() does is check for
a non-zero .clksel field in the struct clk. Therefore, it is
pointless calling this function on clocks where the clksel field
is unset.
Remove init calls to omap2_init_clksel_parent() on clocks without
a clksel field.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
In the current implementation the sysconfig value is read into
_sysc_cache once and an actual update to the sysconfig register
happens only if the new value paased is differnt from the one in _sysc_cache.
_sysc_cache is updated only if _HWMOD_SYSCONFIG_LOADED is not set.
This can lead to the follwing issue if off mode is enabled in modules
which employs "always-retore" mechanism of context save and restore.
a. The module sets the sysconfig register through omap_device_enable.
Here _sysc_cache is updated with the value written to the sysconfig
register and left.
b. The power domain containig the module enters off mode and the
module context is lost.
c. The module in use becomes active and calls omap_device_enable to
enable itself. Here a read of sysconfig register does not happen
as _HWMOD_SYSCONFIG_LOADED flag is set. The value to be written
to the sysconfig register will be same as the one written in step a.
Since _sysc_cache reflects the previous written value an update
of the sysconfig register does not happen.
This means in modules which employs "always-restore" mechanism
after off , the sysconfig regsiters will never get updated.
This patch introduces a flag SYSC_NO_CACHE which if set ensures that the
sysconfig register is always read into _sysc_cache before an update is
attempted.
This flags need to be set only by modules which does not do a context save
but re-initializes the registers every time the module is accessed. This
includes modules like i2c, smartreflex etc.
Signed-off-by: Thara Gopinath <thara@ti.com>
[paul@pwsan.com: tweaked to apply on a different head, added flag comment]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Dynamically allocate the CPUFreq frequency table on OMAP2xxx chips.
This fixes some compilation problems, since the kernel may not know
what chip it is running on until boot-time. This also reduces the size
of the CPUFreq frequency table.
Problem originally reported by Felipe Balbi <felipe.balbi@nokia.com>.
Thanks also for comments on the patch from Felipe and Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Felipe Balbi <felipe.balbi@nokia.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Revise some of the comments in the OMAP2xxx OPP data for clarity.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
if we enable CPUFREQ we can't build omap2 for two reasons,
one of them is fixed by the patch below.
It's failing because the __must_be_array() check in
ARRAY_SIZE() is failing and printing the following message:
arch/arm/mach-omap2/clock2xxx.c:453: error: negative width in bit-field '<anonymous>'
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
[paul@pwsan.com: commit message updated; changed rate variable name]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add necessary definitions to clock framework to allow changing
dpll4_m5_ck rate. This is used by the camera code.
Signed-off-by: Jouni Högander <jouni.hogander@nokia.com>
Signed-off-by: Tuukka Toivonen <tuukka.o.toivonen@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The correct parent of the McBSP 2, 3, and 4 functional clocks is
PER_96M_FCLK, not CORE_96M_FCLK. Fix this in the OMAP clock tree.
Reported by Nicole Chalhoub <n-chalhoub@ti.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Nicole Chalhoub <n-chalhoub@ti.com>
UART1 & 2 were missing clockdomains resulting in broken omap_hwmod
init for these devices.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Out of the three major OMAP2 chip types, OMAP2420, OMAP2430, and OMAP3430,
we only map the IVA on OMAP2420. The memory mapping is not shared between
OMAP2420 and OMAP2430, so it is inappropriate to label those macros as
'24XX'; this patch changes them to '2420'.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
In OMAP2/3 some of the clock-domains which did not have control
facility were being falsely written to and read using the CM_CLKSTCTRL
register though it did not exist for them. One check is added to remove
this flaw.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Without this the kernel doesn't boot, it craches in
omap_mux_package_fixup(), since the package_subset becomes NULL.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Otherwise bringing up new boards can be harder:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = c0004000
[00000000] *pgd=00000000
Internal error: Oops: 5 [#1]
last sysfs file:
Modules linked in:
CPU: 0 Not tainted (2.6.33-rc2-00015-g0bc9c93-dirty #37)
PC is at omap_mux_init+0xa4/0x3d8
LR is at omap_mux_init+0x3c/0x3d8
...
Signed-off-by: Tony Lindgren <tony@atomide.com>
`!' has a higher precedence than `&' so parentheses are required.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Keys: 'right arrow', 'up arrow' and 'select' were mapped
wrongly. This patch corrects them.
This patch also adds one missing key present in the board,
currently I added it as 'unknown' key, as I am not able to
find proper description for this key.
One key entry (r: 7, c: 5) is present in the keymap, which
is really not present in the board, removing it.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit f62349ee97 makes it possible to
have some other than first uart port as ttyS0, which breaks the workaround
serial_in_override() function which will try to address the first uart
port (for ttyS0) and not the one that was initialized.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
CC: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit f62349ee97 had side effect that
causes kernel to oops when we are suspending to ram:
# echo mem > /sys/power/state
WARNING: at kernel/irq/manage.c:858 __free_irq+0x90/0x174()
Trying to free already-free IRQ 72
Modules linked in:
Backtrace:
[<c00328d0>] (dump_backtrace+0x0/0x110) from [<c0347298>] (dump_stack+0x18/0x1c)
r7:dfd4be08 r6:c009505c r5:c03fbfd1 r4:0000035a
[<c0347280>] (dump_stack+0x0/0x1c) from [<c005a408>] (warn_slowpath_common+0x50/0x68)
[<c005a3b8>] (warn_slowpath_common+0x0/0x68) from [<c005a46c>] (warn_slowpath_fmt+0x30)
r7:c0474afc r6:00000048 r5:00000000 r4:c0474ac0
[<c005a43c>] (warn_slowpath_fmt+0x0/0x38) from [<c009505c>] (__free_irq+0x90/0x174)
r3:00000048 r2:c03fc0ef
[<c0094fcc>] (__free_irq+0x0/0x174) from [<c0095184>] (free_irq+0x44/0x64)
[<c0095140>] (free_irq+0x0/0x64) from [<c0038100>] (omap_uart_enable_irqs+0x4c/0x90)
r7:c034d58c r6:00000003 r5:00000000 r4:c0463028
[<c00380b4>] (omap_uart_enable_irqs+0x0/0x90) from [<c003d8f8>] (omap3_pm_begin+0x1c/0)
r5:00000003 r4:00000000
[<c003d8dc>] (omap3_pm_begin+0x0/0x28) from [<c008d008>] (suspend_devices_and_enter+0x)
[<c008cfd8>] (suspend_devices_and_enter+0x0/0x1dc) from [<c008d29c>] (enter_state+0xe8)
r5:c03f7f46 r4:00000000
[<c008d1b4>] (enter_state+0x0/0x140) from [<c008c8e0>] (state_store+0x9c/0xc4)
r7:c034d58c r6:00000003 r5:00000003 r4:c03f7f46
[<c008c844>] (state_store+0x0/0xc4) from [<c01cb2dc>] (kobj_attr_store+0x20/0x24)
[<c01cb2bc>] (kobj_attr_store+0x0/0x24) from [<c0119420>] (sysfs_write_file+0x114/0x14)
[<c011930c>] (sysfs_write_file+0x0/0x148) from [<c00cb298>] (vfs_write+0xb8/0x164)
[<c00cb1e0>] (vfs_write+0x0/0x164) from [<c00cb408>] (sys_write+0x44/0x70)
r8:4001f000 r7:00000004 r6:df81bd00 r5:00000000 r4:00000000
[<c00cb3c4>] (sys_write+0x0/0x70) from [<c002f040>] (ret_fast_syscall+0x0/0x38)
r8:c002f204 r7:00000004 r6:401fa5e8 r5:4001f000 r4:00000004
This is due the fact that uart_list list was populated in
omap_serial_early_init() and omap_uart_enable_irqs() went through this
list even when serial idle wasn't enabled for all uarts.
This patch moves the code that populates the uart_list and enables uart
clocks into omap_serial_init_port().
Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Recent drivers/mfd/twl4030* renames to twl broke compile for
various boards as the series was missing a patch to change
the board-*.c files.
This patch renames include twl4030.h to include twl.h
and also renames twl4030_i2c_ routines.
Signed-off-by: Balaji T K <balajitk@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: Felipe Balbi <felipe.balbi@nokia.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP34XX has EHCI, so select USB_ARCH_HAS_EHCI.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The upcoming TWL6030 is companion chip for OMAP4 like the current TWL4030
for OMAP3. The common modules like RTC, Regulator creates opportunity
to re-use the most of the code from twl4030.
This patch renames few common drivers twl4030* files to twl* to enable
the code re-use.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
The power scripts optimisation was mainly done by:
Tero Kristo <tero.kristo@nokia.com> and
Arnaud Mandy <ext-arnaud.2.mandy@nokia.com>
I'm only refactoring and testing it against the mainline kernel.
Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com>
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: linux-omap@vger.kernel.org
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
OMAP3xxx and OMAP4430 UART IP blocks have a restriction wrt RX FIFO.
Empty RX fifo read causes an abort.
OMAP3xxx:
UART IP revision >= 0x52 have this issue
MVR register format is:
Bits Field Name Description Type Reset
31:8 RESERVED RO 0x0
7:4 MAJOR Major revision number of the module. RO 0x--
3:0 MINOR Minor revision number of the module. RO 0x--
OMAP4xxx:
All revisions have this issue
Revision id check is not used as the format of MVR resigster has changed
For omap4 MVR register reads as: 0x50410602 => Revision id = 0x0602
Format of MVR register on omap4 is: (Courtesy: Cousson, Benoit)
Bits Field Name Description Type Reset
31:30 SCHEME Scheme revision number of module RO 0x1
29:28 RESERVED RO 0x1
27:16 FUNC Function revision number of module RO 0x041
15:11 RTL Rtl revision number of module RO 0x00
10:8 MAJOR Major revision number of the module. RO 0x6
7:6 CUSTOM Custom revision number of the module. RO 0x0
5:0 MINOR Minor revision number of the module. RO 0x02
Override the default 8250 read handler: mem_serial_in()
by a custom handler: serial_in_8250()
which makes sure that RX fifo is not read when empty
tested on zoom3(3630) board
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update the hsmmc zoom peripheral configuration to support:
Power saving mode
mmc2 8-bit support
Configure mmc2 as non removable
Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The runtime detection of OMAP3515 and OMAP3525
was reversed.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Otherwise Extreme Lower Power (ELP) wakeup doesn't work properly.
Signed-off-by: Kalle Valo <kalle.valo@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap3: zoom2/3: make MMC slot work again
Commit 12f8dfb56 accidentally broke MMC on zoom2/3.
The .vmmc1 field of zoom_twldata was deleted. Restoring it
allows the MMC slot to work again
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds new function: omap_serial_init_port(port) that can be
used to initialize only selected UARTs as serial ports. Platforms can
then in their board files call this function instead of omap_serial_init()
if they don't want to use all UARTs as serial ports.
Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CM-T35 can be assembled with different set of peripherals thus making
certain interfaces available to user as GPIOs or dedicated pins. Because
of it CM-T35 bootloader sets up mux configuration only for pins
necessary to boot the system and the rest of the mux configuration is
done by the kernel. Besides, having mux configuration in the kernel
allows to minimize dependancy on bootloader.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The secondary cores wakes up in time so the wait loop is not
necessary anymore.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
