Some newer devices from the Sigma-Delta ADC family do have their data
register at a different address than the current default address. Add a
parameter to the ad_sigma_delta_info struct which allows to override the
default address.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Sometimes the ADC controller met some problems, and it will not complete
the data conversion, that will can not wake up the read process any more
to block users. So we should add one maximum conversion time to avoid
this issue.
Signed-off-by: Freeman Liu <freeman.liu@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Channel 6 of the SAR ADC can be switched between two inputs:
SAR_ADC_CH6 input (an actual pad on the SoC) and the signal from the
temperature sensor inside the SoC.
To get usable results from the temperature sensor we need to read the
corresponding calibration data from the eFuse and pass it to the SAR ADC
registers. If the temperature sensor is not calibrated (the eFuse data
contains a bit for this) then the driver will only register the
iio_chan_spec's for voltage measurements.
This only enables the temperature sensor for the Meson8 SoC. Meson8b and
Meson8m2 SoCs can be supported in the future as well but we first need
a way to pass the fifth TSC (temperature sensor coefficient) bit to the
HHI register area (apart from that the infrastructure as already
implemented for Meson8 can be used). On the 64-bit SoCs (GXBB, GXL and
GXM) the temperature sensor inside SAR ADC is firmware-controlled (by
BL30, we can simply use the SCPI hwmon driver to get the chip
temperature).
To keep the devicetree interface backwards compatible we simply skip the
temperature sensor initialization if no eFuse nvmem cell is passed via
devicetree.
The public documentation for the SAR ADC IP block does not explain how
to use the registers to read the temperature. The logic from this patch
is based on reading and understanding Amlogic's GPL kernel sources.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Compatible with AD7682 and AD7689 chips.
It is a Analog Devices ADC driver 14/16 bits 4/8 channels
with SPI protocol
Datasheet of the device:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf
Signed-off-by: Charles-Antoine Couret <charles-antoine.couret@essensium.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This updates the ti-adc128s052.c file to use SPDX-License-Identifier
instead of more verbose license text.
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
ACPI _HID AANT1280 matches an ADC124S101 present on E3940 SKUs of the UP
Squared board.
Add it to the driver.
Signed-off-by: Nicola Lunghi <nicola.lunghi@emutex.com>
[javier@emutex.com: fix up commit message and one checkpatch warning]
Signed-off-by: Javier Arteaga <javier@emutex.com>
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The datasheets for ADC122S021 and ADC124S021 list two more
pin-compatible alternatives for each device.
Add their IDs as compatible strings.
Suggested-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Javier Arteaga <javier@emutex.com>
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Static analysis with CoverityScan is throwing warnings that specific
case statements are missing breaks. Rather than adding breaks, add
return -EINVAL to the specific case statements to clarify the
error return paths. Fix also saves 50 bytes.
Before:
text data bss dec hex filename
21418 4936 128 26482 6772 drivers/iio/adc/ina2xx-adc.o
After:
dec hex filename
21370 4936 128 26434 6742 drivers/iio/adc/ina2xx-adc.o
(gcc 8.2, x86-64)
Detected by CoverityScan, CID#1462408 ("Missing break in switch")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Until now the "channel" number is identical to how the channel is
identified inside the (FIFO) registers. In our case we have eight
channels and the hardware also has eight inputs.
However, there are two special inputs:
- channel 6 can select between the SAR_ADC_CH6 pad and the chip's
internal temperature sensor
- channel 7 can select between SAR_ADC_CH7 and VSS, VDD / 4, VDD / 2,
VDD * 3 / 4 and VDD.
When programming the registers to read for example the temperature
sensor we have to select FIFO channel 6, set the correct bit which muxes
channel 6 to the temperature sensor and then start the ADC measurement
for channel 6 as usual.
When we add support for the temperature sensor the driver has to know
about that it has to use FIFO channel 6 to measure using the chip's
internal temperature sensor. However, in that case the iio_chan_spec
channel will not be 6 because this is already used for the SAR_ADC_CH6
pad input. Thus we use iio_chan_spec's address field to store the FIFO
channel number for each channel.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
In the future we may support two different channel sets:
- one which includes the voltage pads and the temperature sensor output
(for Meson8, Meson8b and Meson8m2)
- one which only includes the voltage pads (GXBB, GXL, GXM and AXG)
Channel 7 has a special function on all of these platforms. However,
since we will have different channel array definitions we want our code
to always use whatever channels struct iio_dev uses.
No functional changes for now. This is the preparation for adding
temperature sensor support to this driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
When channels are registered, the hardware channel number is not the
actual iio channel number.
This is because the driver is probed with a certain number of accessible
channels. Some pins are routed and some not, depending on the description of
the board in the DT.
Because of that, channels 0,1,2,3 can correspond to hardware channels
2,3,4,5 for example.
In the buffered triggered case, we need to do the translation accordingly.
Fixed the channel number to stop reading the wrong channel.
Fixes: 0e589d5fb ("ARM: AT91: IIO: Add AT91 ADC driver.")
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
When doing simple conversions, the driver did not acknowledge the DRDY irq.
If this irq status is not acked, it will be left pending, and as soon as a
trigger is enabled, the irq handler will be called, it doesn't know why
this status has occurred because no channel is pending, and then it will go
int a irq loop and board will hang.
To avoid this situation, read the LCDR after a raw conversion is done.
Fixes: 0e589d5fb ("ARM: AT91: IIO: Add AT91 ADC driver.")
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Commit 053ffe3c8c ("iio: adc: meson-saradc: squash and share the
common adc platform data") put all the data which is needed at runtime
from struct meson_sar_adc_data to a new struct meson_sar_adc_param so
we can re-use the platform specific configuration without having to
duplicate everything just to change the name.
The only place where struct meson_sar_adc_data is now needed is the
_probe function which has to pass the name to the iio_dev. All other
functions only need access to struct meson_sar_adc_param. This means we
can simplify struct meson_sar_adc_priv.
The goal of this patch is to make the code a bit easier to read since
this removes one level of nesting. No functional changes intended.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This simplifies our _probe function by using of_device_get_match_data
instead of open-coding it. No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This define is of no use because the driver is avoiding shifting bits
by itself but using FIELD_GET/FIELD_PREP (which are using bit masks)
instead. There is already a MESON_SAR_ADC_DELTA_10_TS_C_MASK bit mask so
MESON_SAR_ADC_DELTA_10_TS_C_SHIFT was redundant.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Leaving for_each_child_of_node loop we should release child device node,
if it is not stored for future use.
Found by Linux Driver Verification project (linuxtesting.org).
JC: I'm not sending this as a quick fix as it's been wrong for years,
but good to pick up for stable after the merge window.
Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Fixes: 6df2e98c3e ("iio: adc: Add imx25-gcq ADC driver")
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This changes how the SPI message for the triggered buffer is setup in
the TI ADS7950 A/DC driver. By using the SPI_CS_WORD flag, we can read
multiple samples in a single SPI transfer. If the SPI controller
supports DMA transfers, we can see a significant reduction in CPU usage.
For example, on an ARM9 system running at 456MHz reading just 4 channels
at 100Hz: before this change, top shows the CPU usage of the IRQ thread
of this driver to be ~7.7%. After this change, the CPU usage drops to
~3.8%.
The use of big-endian for the raw data was cargo culted from another
driver when this driver was originally written. It used an SPI word size
of 8 bits and big-endian byte ordering to effectively emulate 16 bit
words.
Now, in order to inject a CS toggle between each word, we need to use
the correct word size, otherwise we would get a CS toggle half way
through each word 16-bit. The SPI subsystem uses CPU byte ordering for
multi-byte words. So, the data we get back from the SPI is going to be
CPU endian now no matter what. Converting that to big endian will just
add overhead on little endian systems so we opt to change the raw data
format from big endian to CPU endian.
There is a small risk that this could break some lazy userspace programs
that use the raw data without checking the data format. We can address
this if/when it actually comes up.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Hartmut Knaack <knaack.h@gmx.de>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-iio@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The driver only defines a subset of all possible ADC channels. Channel
numbers read from the device tree are accepted as long as they don't
exceed a max value, even when no channel definition exists. Add a
check to abort initialization in this case.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch adds support to read calibration values from the eFuse
controller to calibrate the ADC channel scales, which can make ADC
sample data more accurate.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The headset device will use channel 20 of ADC controller to detect events,
but it needs the raw ADC data to do conversion according to its own formula.
Thus we should configure the channel mask separately and configure channel
20 as IIO_CHAN_INFO_RAW, as well as adding raw data read support.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
MCP3911 is a dual channel Analog Front End (AFE) containing two
synchronous sampling delta-sigma Analog-to-Digital Converters (ADC).
Co-developed-by: Kent Gustavsson <kent@minoris.se>
Signed-off-by: Kent Gustavsson <kent@minoris.se>
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Add ADC5_AMUX_THM2_100K_PU and ADC5_AMUX_THM4_100K_PU to the list of
rev2 ADC channels.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
After finding a reasonable gain, the function converts the configured
gain to a gain configuration option selector enum max9611_csa_gain.
Make the conversion clearly visible by using an explicit cast. This
also avoids a warning seen with clang:
drivers/iio/adc/max9611.c:292:16: warning: implicit conversion from
enumeration type 'enum max9611_conf_ids' to different enumeration
type 'enum max9611_csa_gain' [-Wenum-conversion]
*csa_gain = gain_selectors[i];
~ ^~~~~~~~~~~~~~~~~
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch adds support for QCOM SPMI PMIC5 family
of ADC driver that supports hardware based offset and
gain compensation. The ADC peripheral can measure both
voltage and current channels whose input signal is
connected to the PMIC ADC AMUX.
The register set and configuration has been refreshed
compared to the prior QCOM PMIC ADC family. Register
ADC5 as part of the IIO framework.
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Enabling the Interrupts before registering the irq handler is a bad
idea. This patch corrects the same for XADC driver.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch avoids getting irq number in xadc_remove function. Instead
store 'irq' in xadc struct and use xadc->irq wherever needed.
This patch also resolves a warning reported by coverity where it asks to
check return value of platform_get_irq() for any errors in xadc_remove.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch limits the xadc pcap clock frequency value to be less than
200MHz. This fixes the issue when zynq is booted at higher frequency
values, pcap crosses the maximum limit of 200MHz(Fmax) as it is derived
from IOPLL.
If this limit is crossed it is required to alter the WEDGE and REDGE
bits of XADC_CFG register to make timings better in the interface. So to
avoid alteration of these bits every time, the pcap value should not
cross the Fmax limit.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch adds check for return values from clock related functions.
This was reported by static code analysis tool.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
wait_for_completion_timeout returns unsigned long not int so an appropriate
variable is declared and the assignment and check fixed up.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Reviewed-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The SAR ADC on Meson8m2 behaves identical to the one found in the
Meson8b SoCs. Add a separate compatible string because the temperature
sensor logic (not supported yet) differs between Meson8 and Meson8m2
(however, it's the same for Meson8b and Meson8m2).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This modifies the TI ADS7950 A/DC driver to allow the simultaneous use
of both the triggered buffer and reading channels directly (via in-
kernel API or sysfs).
The use case for this is on LEGO MINDSTORMS EV3. Two of the voltage
channels are used in-kernel by a power supply driver, which reads the
values using iio_read_channel_processed(). These channels are only read
at a slow rate (<= 1Hz). However, we want to be able to read 12 other
channels at the same time using the triggered buffer at a high rate (>=
100Hz).
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This updates the ti-ads7950.c file to use SPDX-License-Identifier
instead of more verbose license text.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This code is problematic because we're supposed to be writing an int but
we instead write to only the high 16 bits. This doesn't work on big
endian systems, and there is a potential that the bottom 16 bits are
used without being initialized.
Fixes: 23ec2774f1 ("iio: adc: at91-sama5d2_adc: add support for position and pressure channels")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This patch removes dead code from xadc_zynq_setup. The condition
"if (tck_rate > XADC_ZYNQ_TCK_RATE_MAX)" cannot be true at any point of
time. There is also an incompatible parameter used in the code.
This patch fixes the same reported by coverity.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
On a system with parasitic capacitance it turned out that DOUT is not ready
after 100 ns after PD_SCK has raised. A measurement showed almost 1000 ns
until DOUT has reached its correct value.
With this patch its now possible to wait until data is ready.
The wait time should not be higher than the maximum PD_SCK high time which
is corresponding to the datasheet 50000 ns.
Signed-off-by: Andreas Klinger <ak@it-klinger.de>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Drop call to of_match_device, which is subsumed by the subsequent
call to of_device_get_match_data. The code becomes simpler, and a
temporary variable can be dropped.
The semantic match that makes this change is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@r@
local idexpression match;
identifier i;
expression x, dev, e, e1;
@@
- match@i = of_match_device(x, dev);
- if (match) e = of_device_get_match_data(dev);
- else e = e1;
+ e = of_device_get_match_data(dev);
+ if (!e) e = e1;
@@
identifier r.i;
@@
- const struct of_device_id *i;
... when != i
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
When the buffer is enabled for ina2xx driver, a dedicated kthread is
invoked to capture mesurement data. When the buffer is disabled, the
kthread is stopped.
However if the kthread gets register access errors, it immediately exits
and when the malfunctional buffer is disabled, the stale task_struct
pointer is accessed as there is no kthread to be stopped.
A similar issue in the usbip driver is prevented by kthread_get_run and
kthread_stop_put helpers by increasing usage count of the task_struct.
This change applies the same solution.
Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Cc: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Fixes: c43a102e67 ("iio: ina2xx: add support for TI INA2xx Power Monitors")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The Spreadtrum SC27XX PMICs ADC controller contains 32 channels,
which is used to sample voltages with 12 bits conversion.
[Baolin Wang did lots of improvements]
Signed-off-by: Freeman Liu <freeman.liu@spreadtrum.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The usual mixed bunch. Particular good to see is the generic
touch screen driver. Will be interesting to see if this works
for other ADCs without major changes.
Core features
* Channel types
- New position relative channel type primarily for touch screen
sensors to feed the generic touchscreen driver.
New device support
* ad5586
- Add support for the AD5311R DAC.
* Generic touch screen driver as an IIO consumer.
- Note this is in input, but due to dependencies is coming through
the IIO tree.
- Specific support for this added to the at91-sama5d2 ADC.
- Various necessary DT bindings added.
Staging Drops
* ADIS16060 gyro
- A device with a very odd interface that was never cleanly supported.
It's now very difficult to get, so unlikely it'll ever be fixed up.
Cleanups and minor features and fixes
* core
- Fix y2038 timestamp issues now the core support is in place.
* 104-quad-8
- Provide some defines for magic numbers to help readability.
- Fix an off by one error in register selection
* ad7606
- Put in a missing function parameter name in a prototype.
* adis16023
- Use generic sign_extend function rather than local version.
* adis16240
- Use generic sign_extend funciton rather than local version.
* at91-sama5d2
- Drop dependency on HAS_DMA now this is handled elsewhere. Will
improve build test coverage.
- Add oversampling ratio control. Note there is a minor ABI change
here to increase the apparent depth to 14 bits so as to allow
for transparent provision of different oversampling ratios that
drop the actual bit depth to 13 or 12 bits.
* hx711
- Add a MAINTAINERS entry for this device.
* inv_mpu6050
- Replace the timestamp fifo 'special' code with generic timestamp
handling.
- Switch to using local store of timestamp divider rather than rate
as that is more helpful for accurate time measurement.
- Fix an unaligned access that didn't seem to be causing any trouble.
- Use the fifo overflow bit to track the overflow status rather than
a software counter.
- New timestamping mechanism to deal with missed sample interrupts.
* stm32-adc
- Drop HAS_DMA build dependency.
* sun4i-gpadc
- Select REGMAP_IRQ a very rarely hit build issue fix.
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Merge tag 'iio-for-4.19a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
First set of IIO new device support, features and cleanups in the 4.19 cycle
The usual mixed bunch. Particular good to see is the generic
touch screen driver. Will be interesting to see if this works
for other ADCs without major changes.
Core features
* Channel types
- New position relative channel type primarily for touch screen
sensors to feed the generic touchscreen driver.
New device support
* ad5586
- Add support for the AD5311R DAC.
* Generic touch screen driver as an IIO consumer.
- Note this is in input, but due to dependencies is coming through
the IIO tree.
- Specific support for this added to the at91-sama5d2 ADC.
- Various necessary DT bindings added.
Staging Drops
* ADIS16060 gyro
- A device with a very odd interface that was never cleanly supported.
It's now very difficult to get, so unlikely it'll ever be fixed up.
Cleanups and minor features and fixes
* core
- Fix y2038 timestamp issues now the core support is in place.
* 104-quad-8
- Provide some defines for magic numbers to help readability.
- Fix an off by one error in register selection
* ad7606
- Put in a missing function parameter name in a prototype.
* adis16023
- Use generic sign_extend function rather than local version.
* adis16240
- Use generic sign_extend funciton rather than local version.
* at91-sama5d2
- Drop dependency on HAS_DMA now this is handled elsewhere. Will
improve build test coverage.
- Add oversampling ratio control. Note there is a minor ABI change
here to increase the apparent depth to 14 bits so as to allow
for transparent provision of different oversampling ratios that
drop the actual bit depth to 13 or 12 bits.
* hx711
- Add a MAINTAINERS entry for this device.
* inv_mpu6050
- Replace the timestamp fifo 'special' code with generic timestamp
handling.
- Switch to using local store of timestamp divider rather than rate
as that is more helpful for accurate time measurement.
- Fix an unaligned access that didn't seem to be causing any trouble.
- Use the fifo overflow bit to track the overflow status rather than
a software counter.
- New timestamping mechanism to deal with missed sample interrupts.
* stm32-adc
- Drop HAS_DMA build dependency.
* sun4i-gpadc
- Select REGMAP_IRQ a very rarely hit build issue fix.
This implements oversampling support for the SAMA5d2 ADC device.
Enabling oversampling : OSR can improve resolution from 12 bits to
13 or 14 bits.
Changing the channel specification to have 14 bits, and we shift the value
1 bit to the left if we have oversampling for just one extra bit, and two
bits to the left if we have no oversampling (old support).
From this commit on, the converted values for all the voltage channels
change to 14 bits real data, with most insignificant two bits always zero
if oversampling is not enabled.
sysfs object oversampling_ratio has been enabled and
oversampling_ratio_available will list possible values (1 or 4 or 16) having
1 as default (no oversampling, 1 sample for each conversion).
Special care was required for the triggered buffer scenario (+ DMA), to
adjust the values accordingly.
Touchscreen measurements supported by this driver are not affected by
oversampling, they are still on 12 bits (scale handing is already included
in the driver).
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Remove dependencies on HAS_DMA where a Kconfig symbol depends on another
symbol that implies HAS_DMA, and, optionally, on "|| COMPILE_TEST".
In most cases this other symbol is an architecture or platform specific
symbol, or PCI.
Generic symbols and drivers without platform dependencies keep their
dependencies on HAS_DMA, to prevent compiling subsystems or drivers that
cannot work anyway.
This simplifies the dependencies, and allows to improve compile-testing.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This implements the support for position and pressure for the included
touchscreen support in the SAMA5D2 SOC ADC block.
Two position channels are added and one for pressure.
They can be read in raw format, or through a buffer.
A normal use case is for a consumer driver to register a callback buffer
for these channels.
When the touchscreen channels are in the active scan mask,
the driver will start the touchscreen sampling and push the data to the
buffer.
Some parts of this patch are based on initial original work by
Mohamed Jamsheeth Hajanajubudeen and Bandaru Venkateswara Swamy
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
