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Commit Graph

6 Commits

Author SHA1 Message Date
Kelvin Cheung
c5d58e9e79 MIPS: Loongson1B: Add a clockevent/clocksource using PWM Timer
This patch add a clockevent/clocksource using PWM Timer for Loongson1B,
which is based on earlier work by Tang, Haifeng.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8025/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:09 +01:00
Kelvin Cheung
813c14108d MIPS: Loongson1B: Improve early printk
- Determine serial port for early printk according to kernel command line.
  - Move to 8250/16550 serial early printk driver.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8023/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:09 +01:00
Ralf Baechle
377cb1b6c1 MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:37 +02:00
Kelvin Cheung
17ded0a89b MIPS: Loongson1B: use common clock infrastructure instead of private APIs
Use common clock infrastructure instead of private APIs.
1. Enable COMMON_CLK in the Kconfig.
2. Remove private clock APIs, which are replaced by the code in
   drivers/clk/clk-ls1x.c.
3. Modify header file for drivers/clk/clk-ls1x.c.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4431
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Yoichi Yuasa
4b00951f6f MIPS: Loongson 1: more clk support and add select HAVE_CLK
This fixes a redefinition of clk_*:

arch/mips/loongson1/common/clock.c:23:13: error: redefinition of 'clk_get'
include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here
arch/mips/loongson1/common/clock.c:41:15: error: redefinition of 'clk_get_rate'
include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here
make[3]: *** [arch/mips/loongson1/common/clock.o] Error 1

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Reviewed-by: John Crispin <blogic@openwrt.org>
Acked-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4143/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-01 17:59:23 +02:00
Kelvin Cheung
ca585cf9fb MIPS: Loongson 1B: Add board support
Adds basic platform devices for Loongson 1B, including serial port,
ethernet, USB, RTC and interrupt handler.

The Loongson 1B UART is compatible with NS16550A, the Loongson 1B GMAC is
built around a Synopsys IP Core.

Use normal instead of enhanced descriptors.

Thanks to Giuseppe for updating the normal descriptor in stmmac driver.
Thanks to Zhao Zhang for implementing the RTC driver.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4133/
Patchwork: https://patchwork.linux-mips.org/patch/4134/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-25 16:17:24 +02:00