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Commit Graph

8625 Commits

Author SHA1 Message Date
Rob Clark
ec61c71d0d drm/i2c: drm_connector_property -> drm_object_property
Signed-off-by: Rob Clark <rob@ti.com>
2012-11-30 10:20:12 -06:00
Rob Clark
b8b163ba9d drm/vmwgfx: drm_connector_property -> drm_object_property
Signed-off-by: Rob Clark <rob@ti.com>
2012-11-30 10:20:11 -06:00
Rob Clark
99d1dba6d9 drm/udl: drm_connector_property -> drm_object_property
Signed-off-by: Rob Clark <rob@ti.com>
2012-11-30 10:20:11 -06:00
Rob Clark
c708a56d8e drm/shmob: drm_connector_property -> drm_object_property
Signed-off-by: Rob Clark <rob@ti.com>
2012-11-30 10:20:11 -06:00
Rob Clark
e35755fa34 drm/radeon: drm_connector_property -> drm_object_property
Signed-off-by: Rob Clark <rob@ti.com>
2012-11-30 10:20:11 -06:00
Rob Clark
a69ac9ea85 drm/gma500: drm_connector_property -> drm_object_property
Signed-off-by: Rob Clark <rob@ti.com>
2012-11-30 10:20:11 -06:00
Dave Airlie
7136470d4b Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Daniel writes:
Besides the big item of lifting the "preliminary hw support" tag from the
 Haswell code, just small bits&pieces all over:
 - Leftover Haswell patches and some fixes from Paulo
 - LyncPoint PCH support (for hsw)
 - OOM handling improvements from Chris Wilson
 - connector property and send_vblank_event refactorings from Rob Clark
 - random pile of small fixes

 Note that the send_vblank refactorings will cause some locking WARNs to
 show up. Imre has fixed that up, but since all the driver changes outside
 of the drm core have been for exonys, those four patches are merged
 through the exonys-next tree.

Meh, I've forgotten to cherry-pick an important fix from Ben for a
regression in the 3.8 gen6+ gtt code. New pull request below. While I'm at
it, the hdmi VIC patch for the drm edid code is still in my queue, I'll
send you that in the next 3.8-fixes pull.

* 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel: (33 commits)
  drm/i915: Fix pte updates in ggtt clear range
  drm/i915: promote Haswell to full support
  drm/i915: Report the origin of the LVDS fixed panel mode
  drm/i915: LVDS fallback to fixed-mode if EDID not present
  drm/i915/sdvo: kfree the intel_sdvo_connector, not drm_connector, on destroy
  drm/i915: drm_connector_property -> drm_object_property
  drm/i915: use drm_send_vblank_event() helper
  drm/i915: Use pci_resource functions for BARs.
  drm/i915: Borrow our struct_mutex for the direct reclaim
  drm/i915: Defer assignment of obj->gtt_space until after all possible mallocs
  drm/i915: Apply the IBX transcoder A w/a for HDMI to SDVO as well
  drm/i915: implement WaMbcDriverBootEnable on Haswell
  drm/i915: fix intel_ddi_get_cdclk_freq for ULT machines
  drm/i915: make the panel fitter work on pipes B and C on Haswell
  drm/i915: make the panel fitter work on pipes B and C on IVB
  drm/i915: don't intel_crt_init if DDI A has 4 lanes
  drm/i915: make DP work on LPT-LP machines
  drm/i915: fix false positive "Unclaimed write" messages
  drm/i915: use cpu/pch transcoder on intel_enable_pipe
  drm/i915: don't limit Haswell CRT encoder to pipe A
  ...
2012-11-29 20:23:56 +10:00
Ben Widawsky
2ff4aeac39 drm/i915: Fix pte updates in ggtt clear range
This bug was introduced by me:
commit e76e9aebcd
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Sun Nov 4 09:21:27 2012 -0800

    drm/i915: Stop using AGP layer for GEN6+

The existing code uses memset_io which follows memset semantics in only
guaranteeing a write of individual bytes. Since a PTE entry is 4 bytes,
this can only be correct if the scratch page address is 0.

This caused unsightly errors when we clear the range at load time,
though I'm not really sure what the heck is referencing that memory
anyway. I caught this is because I believe we have some other bug where
the display is doing reads of memory we feel should be cleared (or we
are relying on scratch pages to be a specific value).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-11-29 11:14:44 +01:00
Jingoo Han
ca06241533 drm/pci: add missing variable initialization
Fixed build warning as below:

drivers/gpu/drm/drm_pci.c: In function 'drm_pcie_get_speed_cap_mask':
drivers/gpu/drm/drm_pci.c:496:9: warning: 'lnkcap' may be used uninitialized in this function [-Wuninitialized]
drivers/gpu/drm/drm_pci.c:497:10: warning: 'lnkcap2' may be used uninitialized in this function [-Wuninitialized]

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-29 18:20:31 +10:00
Sachin Kamat
a8f559efb2 drm/nouveau/device: Remove duplicate inclusion of core/device.h
core/device.h was included twice.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:13 +10:00
Sachin Kamat
24c89e9b63 drm/nouveau: remove duplicate inclusion of nouveau_ttm.h
nouveau_ttm.h was included twice.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:13 +10:00
Ben Skeggs
edc260d061 drm/nouveau/fifo: trigger engine context unload before zeroing context pointer
Fixes a PCE0 page fault noticed on NVD9 during module unload.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:12 +10:00
Daniel J Blueman
c9aa763fe9 drm/nouveau: prevent log mangling
On 3.7-rc6, add missing newline to to prevent the following kernel log
line getting appended to the current one after switching the integrated
GPU and suspending the discrete GPU.

Signed-off-by: Daniel J Blueman <daniel@quora.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:12 +10:00
Marcin Slusarz
04c8c21085 drm/nouveau: unpin various bo's before destroying
These objects leak VRAM - but only on module unload.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:11 +10:00
Marcin Slusarz
124ea297c8 drm/nouveau: unpin pushbuffer bo before destroying it
Fixes GART leak (as accounted by nouveau_drm.gem.gart_available).

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:11 +10:00
Marcin Slusarz
3f69e7605d drm/nouveau: remove misleading comment from nouveau_prime_new
Copy/pasted from nouveau_gem_new.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:10 +10:00
Marcin Slusarz
ae4ba7371c drm/nouveau: raise reporting levels of some messages
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:10 +10:00
Martin Peres
507ceb1518 drm/nouveau/core: fix the assumption that NVDEV_XXXX is always under 32
It fixes a bug that would have been introduced when adding more
sudevs/engines.

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:09 +10:00
Ben Skeggs
d1be7e9be1 drm/nouveau/ppp: remove nouveau_ppp base class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:09 +10:00
Ben Skeggs
fb9bff26f1 nve0/ppp: enable support via nvc0's implementation
NVIDIA also appear to use the same class on Fermi/Kepler for PPP.

Will allow use of the engine if firmware (nvXX_fuc086) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:08 +10:00
Maarten Lankhorst
4a7950140b nvc0/ppp: initial implementation of engine
Will allow use of the engine if firmware (nvXX_fuc086) provided.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:08 +10:00
Maarten Lankhorst
7d8bd91bf4 nvc0/vp: initial implementation of engine
Will allow use of the engine if firmware (nvXX_fuc085) provided.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:07 +10:00
Maarten Lankhorst
23c14ed2ec nvc0/bsp: initial implementation of engine
Will allow use of the engine if firmware (nvXX_fuc084) provided.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:07 +10:00
Ben Skeggs
66433c2af8 drm/nouveau/vdec: remove nouveau_{bsp,vp} base classes, use nouveau_engine directly
Later chipsets use falcon anyway, and I can't currently see a good need
for a shared base class.

PPP will get the same treatment once Maarten's patches are merged.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:07 +10:00
Ben Skeggs
f3295b3c99 drm/nve0/fifo: allow for future binding of ppp contexts
No support for the class yet, but will be pulled in with Maarten's Fermi
vdec patches.  The Kepler PPP class is identical.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:06 +10:00
Ben Skeggs
a7416d0d8a drm/nve0/vp: implement initial support for engine
Will allow use of the engine if firmware (nvXX_fuc085) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:06 +10:00
Ben Skeggs
b2f04fc6cb drm/nve0/bsp: implement initial support for engine
Will allow use of the engine if firmware (nvXX_fuc084) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:05 +10:00
Ben Skeggs
4946980099 drm/nve0: allow specification of channel engine type in abi16 call
Previously, if either vram/gart handles were specified as ~0, the ioctl
call would fail.  In order to hack engine selection into the ioctl for
kepler, we now define (fb_ctxdma_handle == ~0) to mean "engine mask is
in tt_ctxdma_handle".

This approach also allows new userspace to detect lack of support for
non-PGRAPH channels on older kernels.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:05 +10:00
Ben Skeggs
43598875b3 drm/nouveau/core: implement shortcut for simple engctx construction
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:04 +10:00
Ben Skeggs
e5e454f918 drm/nvc0/copy: share interrupt handler with nva3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:04 +10:00
Ben Skeggs
874309a5b7 drm/nv50/fb: implement trap handler as subdev interrupt handler
nv50_fb_trap() will now be called automagically by the mc intr handler,
rather than each engine's handler having to check for traps manually.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:03 +10:00
Ben Skeggs
e0cdd1e545 drm/nouveau/mc: allow calling of multiple handlers for a give intr bit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:03 +10:00
Ben Skeggs
3cb0ebddd0 drm/nouveau/copy: remove nouveau_copy base class
nva3/nvc0 are using falcon, nve0 is now using engine directly.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:02 +10:00
Ben Skeggs
586ae46d65 drm/nvc0/copy: use nouveau_falcon base class
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:02 +10:00
Ben Skeggs
8365f2fd5c drm/nva3/copy: use nouveau_falcon base class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:01 +10:00
Ben Skeggs
27abc13e47 drm/nv98/crypt: use nouveau_falcon base class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:01 +10:00
Ben Skeggs
e3aaa946bd drm/nouveau: initial falcon (fuc) engine base class implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:00 +10:00
Dave Airlie
2d8b9ccbce drm/nouveau: convert to dev_pm_ops
This is a precursor to dynamic power management support for nouveau,

we need to use pm ops for that, so first convert the driver to using pm ops
interfaces.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:58:00 +10:00
Dave Airlie
c839d748bd drm/nouveau: Add interface to detect optimus and v1 support
This is required to decide if we can auto-powerdown and how to implement it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:59 +10:00
Ben Skeggs
bf2c886a85 drm/nouveau/disp: add support for 10bpc over DisplayPort
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:59 +10:00
Ben Skeggs
e225f446a0 drm/nouveau: rename nvd0_display to nv50_display to reflect reality since merge
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:58 +10:00
Ben Skeggs
4f6029da58 drm/nv50-nvc0: switch to common disp impl, removing previous version
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:58 +10:00
Ben Skeggs
f9887d0911 drm/nvd0/disp: implement support for colour vibrance control
Ported from original nv50 commit by Christoph, with added support for the
setting on later chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:57 +10:00
Ben Skeggs
647bf61d03 drm/nvd0/disp: remove fetching of capabilities report
Unused, and caused a race with evo_sync().  Will revisit using it properly
later on.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:57 +10:00
Ben Skeggs
63718a0730 drm/nvd0/disp: enable support for older display classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:56 +10:00
Ben Skeggs
47057302f0 drm/nvd0/disp: support creation of fb dma objects on older chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:56 +10:00
Ben Skeggs
ed5085a589 drm/nvd0/disp: implement support for older DISP_SYNC classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:56 +10:00
Ben Skeggs
419e8dc0af drm/nvd0/disp: implement sor support for older display classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:55 +10:00
Ben Skeggs
97b19b5c6f drm/nvd0/disp: implement dac support for older display classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:55 +10:00
Ben Skeggs
de8268c503 drm/nvd0/disp: start implementing support for older display classes
Currently unused, but checkpointing the merged head handling routines.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29 09:57:54 +10:00