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Commit Graph

9 Commits

Author SHA1 Message Date
Lorenzo Pieralisi
78e65739a6 ARM: dts: spear: cpus/cpu nodes dts updates
This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2013-05-23 10:45:21 +01:00
Linus Torvalds
ca2a88f56a MTD pull for 3.8
- Various cleanups especially in NAND tests
  - Add support for NAND flash on BCMA bus
  - DT support for sh_flctl and denali NAND drivers
  - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
  - Fix JFFS2 locking bug in ENOMEM failure path
  - New SPI flash chips, as usual
  - Support writing in 'reliable mode' for DiskOnChip G4
  - Debugfs support in nandsim
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Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd

Pull MTD updates from David Woodhouse:
 - Various cleanups especially in NAND tests
 - Add support for NAND flash on BCMA bus
 - DT support for sh_flctl and denali NAND drivers
 - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
 - Fix JFFS2 locking bug in ENOMEM failure path
 - New SPI flash chips, as usual
 - Support writing in 'reliable mode' for DiskOnChip G4
 - Debugfs support in nandsim

* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
  mtd: nand: typo in nand_id_has_period() comments
  mtd: nand/gpio: use io{read,write}*_rep accessors
  mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
  mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
  mtd: nand/docg4: fix and improve read of factory bbt
  mtd: nand/docg4: reserve bb marker area in ecclayout
  mtd: nand/docg4: add support for writing in reliable mode
  mtd: mxc_nand: reorder part_probes to let cmdline override other sources
  mtd: mxc_nand: fix unbalanced clk_disable() in error path
  mtd: nandsim: Introduce debugfs infrastructure
  mtd: physmap_of: error checking to prevent a NULL pointer dereference
  mtg: docg3: potential divide by zero in doc_write_oob()
  mtd: bcm47xxnflash: writing support
  mtd: tests/read: initialize buffer for whole next page
  mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
  mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
  mtd: nand: onfi need to be probed in 8 bits mode
  mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
  mtd: nand: print flash size during detection
  mted: nand_wait_ready timeout fix
  ...
2012-12-19 12:47:41 -08:00
Shiraz Hashim
8113ba917d ARM: SPEAr: DT: Update device nodes
This patch adds multiple device nodes for SPEAr machines and boards.

Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-11-26 16:55:28 +05:30
Deepak Sikri
4c7a078f90 ARM: SPEAr: DT: Modify DT bindings for STMMAC
This patch modifies the DT bindings for the GMAC IP existings for the
SPEAr family. The DT bindings now additionally pass the phy mode as a
configuration parameter for the ethernet device.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-11-26 15:53:52 +05:30
Jean-Christophe PLAGNIOL-VILLARD
6d7b42a447 mtd: fsmc_nand: pass the ale and cmd resource via resource
Do not use the platform_data to pass resource and be smart in the drivers.
Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-By: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 15:37:47 +02:00
Stefan Roese
69c7e3772e ARM: SPEAr600: Fix timer interrupt definition in spear600.dtsi
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-07-18 10:05:05 +05:30
Viresh Kumar
30551c0108 SPEAr: Add DT bindings for SPEAr's timer
All SPEAr SoC's use ST's Timer module. This patch adds device tree probing
capability for that.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-12 21:03:26 +02:00
Viresh Kumar
0b7ee71794 SPEAr: Add PL080 DMA support for 3xx and 6xx
Both SPEAr3xx and SPEAr6xx families have one instance of ARM PL080 DMA
controller. This patch adds in support for that.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
2012-04-22 22:41:35 +02:00
Stefan Roese
9652e8bd16 ARM: SPEAr600: Add device-tree support to SPEAr600 boards
This patch adds a generic target for SPEAr600 board that can be
configured via the device-tree. Currently the following devices
are supported via the devicetree:

- VIC interrupts
- PL011 UART
- PL061 GPIO
- Synopsys DW I2C
- Synopsys DW ethernet

Other peripheral devices (e.g. SMI flash, FSMC NAND flash etc) will
follow in later patches.

Only the spear600-evb is currently supported. Other SPEAr600
based boards will follow later.

Since the current mainline SPEAr600 code only supports the SPEAr600
evaluation board, with nearly zero peripheral devices (only UART
and GPIO), it makes sense to switch over to DT based configuration
completely now. So this patch also removes all non-DT stuff, mainly
platform device data. The files spear600.c and spear600_evb.c are
removed completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-16 20:19:41 +00:00