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Author SHA1 Message Date
Juergen Beisert
c0db2ea4e3 MXC family: Add clock handling
Internal clock path handling for the mxc CPUs.

Changed against the original Freescale code (and against clocklib for example):
 - clock rate is always calculated whenever one ask for the current rate
   (means struct clk has no more a member called "rate"). So switching the PLL
   base frequency will propagate immediately to all other clocks that are
   depending on this frequency.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:47 +02:00