Update the dt property ti,audpwron-gpio to use the
gpio macro definition for GPIO_ACTIVE_HIGH.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es
are different.
A1-A3 = gpio_wk7
ES = gpio_110
There is no change to LED D2
Abstract away the pinmux and the LED definitions for the two boards into
the respective DTS files.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Use the constants defined in include/dt-bindings/interrupt-controller/
to enhance readability.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Use standard GPIO constants to enhance the readability of DT GPIOs.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Replace /include/ by #include for OMAP2+ DT, in order to use the
C pre-processor, making use of #define features possible.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
GPMC controller on AM335x-EVM has a NAND flash connected to it.
This patch updates following in am335x-evm.dts:
- adds nandflash specific pin-mux configs
- adds nand node as child of GPMC contoller, with information about
NAND flash interface, NAND partition table, ECC scheme, elm handle id.
- updates GPMC node for newer GPMC DT properties added in linux-3.10.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Gupta, Pekon <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
ELM hardware engine is used for locating bit-flips in NAND data
This patch is required for working of hardware based NAND ECC schemes
with DT support.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The IGEP COM Module has an 512MB NAND flash memory.
Add a device node for this NAND and its partition layout.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The IGEPv2 board has an 512MB NAND flash memory.
Add a device node for this NAND and its partition layout.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to
the OMAP3 processor though the General-Purpose Memory Controller.
This patch adds a device node for the ethernet chip as a GPMC child
and all its dependencies (regulators, GPIO and pin muxs).
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
xdma_event_intr1.clkout2 pad can be used to source clock
from either 32K OSC or any of the PLL (except MPU) outputs.
On the existing AM335x based boards (EVM, EVM-SK and Bone),
this pad is used to feed the clock to audio codes.
So, this patch configures the pinmux to get clkout2 on the pad.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Add pin control binding for UART0 device nodes in all
board specific DT files.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
With DT support, where naming convention is based on base-addr
and not id, so we should follow TRM/Spec numbering label.
This patch changes UART numbering as per TRM, as uart0-5.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Cc: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Now gpio-leds driver is using devm_pinctrl_get_select_default()
api to set default pinmux configuration required for the
functionality of the driver, so this patch moves respective
pinctrl binding inside leds node.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Add pin control binding for I2C device nodes in all
board specific DT files (as per current usage),
EVM: Both i2c0 and i2c1
EVM-SK and Bone: Only i2c0
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The carveouts that have been reserved for multimedia usecases
are not being used currently by any driver and so have been
cleaned up. Memory will be allocated runtime through CMA for
enabling the multimedia usecases.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Conflicts:
arch/arm/kernel/smp.c
Please pull these miscellaneous LPAE fixes I've been collecting for a while
now for 3.11. They've been tested and reviewed by quite a few people, and most
of the patches are pretty trivial. -- Will Deacon.
Extend the soft reset support for EXYNOS5420 SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The location at which the boot address is specified for secondary
CPUs of EXYNOS5420 is SYSRAM base + 4. Update the cpu_boot_reg
function accordingly.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add initial device tree nodes for EXYNOS5420 SoC and SMDK5420 board.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use chipid[27:20] bits to identify the EXYNOS family while setting
up the serial port during the uncompression setup. This uses four
additional bits of chipid to identify the EXYNOS family since this
is required for identifying EXYNOS5420 SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
EXYNOS5420 is new SoC in Samsung's Exynos5 SoC series. Add
initial support for this new SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Instead of having to specify the number for CPUs in EXYNOS5250 in
platsmp.c file, let the number of CPUs be determined by having this
information listed in EXYNOS5250 device tree file.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
In preparation of adding support for EXYNOS5420, which has many
peripherals similar to EXYNOS5250, a new common EXYNOS5 device tree
source file is created out of the exising EXYNOS5250 device tree
source file. Only the common nodes required for basic boot up on
EXYNOS5420 based boards are moved into this new file and the rest
of the common nodes would be moved subsequently.
EXYNOS5440 SoC is quite different from EXYNOS5250 and EXYNOS5420.
Hence it is not possible to reuse "exynos5.dtsi" for EXYNOS5440.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
These changes bring both HugeTLB support and Transparent HugePage
(THP) support to ARM. Only long descriptors (LPAE) are supported
in this series.
The code has been tested on an Arndale board (Exynos 5250).
This patch reads the cpuid part number and if it matches with
cortex-A9, calls scu_enable()
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be
missing the pincontrol definitions. Move PINCTRL selects to the arch
level since we should be enabling the code for all exynos variants.
Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not
for exynos5440. Also add basic dependencies for the PINCTRL_EXYNOS
kernel config.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables support for XHCI on exynos5 series of SOCs,
to support host side USB 3.0 support.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add clock lookup information for i2s controllers on exynos5250 SoC.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Audio subsystem introduced in s5pv210 and exynos platforms
which has a internal clock controller. This patch adds a node
for the same on exynos5250.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Replace /include/ (dtc) with #include (C pre-processor) for all
Samsung DT files
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since there are no remaining users of this header, it can be safely
dropped.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since all platforms have been moved to the new watchdog reset driver,
the legacy code can be removed safely.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch moves all platforms using the legacy watchdog reset helper
function to the new watchdog reset driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds a watchdog reset driver that can be used on Samsung SoCs
that do not provide dedicated reset method. It replaces the legacy
helper function that relies on static IO mapping.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds local definitions of required watchdog registers and
bitfields to the uncompress header, allowing to remove the dependency on
plat/regs-watchdog.h header and the ugly hack to replace virtual with
physical addresses.
In addition, it fixes reboot on decompression failure feature, due to
the mentioned ugly hack not working anymore (the macro being redefined
got renamed, without fixing this code).
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit 9ee51f01ee (tty: serial/samsung: make register definitions
global) removed the S3C2410_PA_UARTX defines that the newly merged
s3c2416 dt support still expected.
So update mach-s3c2416-dt.c to use the S3C24XX_PA_UART constant until
we have support for the common clock framework the the s3c2416-dt.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since uart_base can be set dynamically in arch_detect_cpu(), there is no
need to have a copy of all code locally, just to override UART base
address.
This patch removes any duplicate code in uncompress.h variant of s5p64x0
and implements proper arch_detect_cpu() function to initialize UART with
SoC-specific parameters.
While at it, replace hard-coded register address with macro.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
For mach-exynos, uart_base is a pointer and the value is calculated
in the machine folder. For other machines, uart_base is defined as
a macro in platform directory. For symmetry, the uart_base macro
definition is removed and the uart_base calculation is moved to
specific machine folders.
This would help us consolidating uncompress subroutine for s5p64x0.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes remaining small bits of unused code that was left
after removing non-DT support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since Exynos is now supporting only DT-based boot, the old L2X0
initialization code is not needed anymore, so exynos4_l2x0_cache_init()
can be greatly simplified.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since there is no board specific mapping needed on Exynos,
exynos_init_io() can be simplified and used as map_io callback for both
Exynos4 and Exynos5.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since both exynos4_init_irq() and exynos5_init_irq() are just calling
irqchip_init(), there is no need for them to exist any more, since this
is the default that is called when init_irq callback is not specified.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes mach/regs-usb-phy.h header, which is not used
anywhere in the kernel.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes all the unused base addresses from mach/map.h header,
leaving only addresses of IPs that currently use static IO mapping or
need the address hardcoded, like low level debug UART.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since Exynos now uses CONFIG_SPARSE_IRQ and all remaining users of this
header has been fixed, we can safely remove it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds selection of CONFIG_SPARSE_IRQ for ARCH_EXYNOS, since it
is required by multiplatform and allows to remove the legacy mach/irqs.h
header.
To make this possible, a dummy IRQ_EINT_BIT macro is added to pm-core.h
header to allow plat-samsung/pm.c compile. This macro is irrelevant for
Exynos and will be removed after reworking Samsung pm code for
multiplatform compatibility.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This allows to bypass compilation of static platform device and resource
definitions that require interrupts and base addresses to be defined
statically.
Cc: Jeongtae Park <jtp.park@samsung.com>
Cc: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Contents of this header are not used any more and can be safely removed.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes mach/gpio.h header that is not required any more on
Exynos.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Now since SAMSUNG_ATAGS is no longer selected for ARCH_EXYNOS, we can
safely remove the remaining setup code.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes selection of several legacy Kconfig symbols from
ARCH_EXYNOS to bypass compilation of code used only for ATAGS based
boot.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since it is illegal to include mach/ headers from source files outside
of respective mach-* directory and DT-only Samsung platforms might not
have all of them anyway, this patches makes inclusion of them
conditional, based on CONFIG_SAMSUNG_ATAGS.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
After removing support for ATAGS based boot on Exynos, there is not much
that can be shared between Exynos and other S5P platforms. This patch
makes Exynos a standalone Samsung platform, not using PLAT_S5P.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds new Kconfig symbols, SAMSUNG_PM_GPIO and S5P_IRQ_PM that
get enabled when GPIO_SAMSUNG, PM and S5P_PM are enabled, but only if
SAMSUNG_ATAGS is selected.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds several compatibility definitions that are not relevant
for Exynos, but are required by Samsung PM core.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds Kconfig entry that selects whether legacy Samsung GPIO
driver should be built or not. For platforms that support only DT based
boot, the new pinctrl driver is used and so the old one is not needed.
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The LDO for LCD driver is currently not handled by any of the drivers.
This disables the LDO during booting time. To fix this, the LDO
is forced to enabled always.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Many of the boards use GPIO-mapped buttons for generic input.
For Arndale board, these buttons also serve as wakeup source.
And the issues reported in commit 522ccdb6fd ("ARM: dts:
Disable the RTC by default on exynos5") are no longer reproduced
on EXYNOS5250 based systems. Hence it would be better to re-enable
RTC support for EXYNOS5250.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
[mturquette@linaro.org: ack on RTC enabling]
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
GPMC is hardware controller for external memory interfaces.
This patch adds suspend/resume support for GPMC driver.
It also preserves GPMC register configurations across device low-power states
in which GPMC hardware can be powered-off.
gpmc_suspend()/gpmc_resume() are called by default by core PM framework as part
of driver's runtime PM callbacks.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP2+ platforms, USB support needs physical layer signalling and
the NOP USB Transceiver driver since v3.10. This patch enables USB_PHY
and NOP_USB_XCEIV in omap2plus_defconfig. These two are harmless to
the kernel stability, and useful since they are required for USB and
Ethernet (over USB) support.
We do not enable USB_EHCI_HCD here because all features aren't fully
supported yet.
This patch applies to Linux 3.10-rc3.
Cc: Roger Quadros <rogerq@ti.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Adrien Vergé <adrienverge@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform data for Tahvo.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
[tony@atomide.com: left out extcon to remove dependency to USB patches]
Signed-off-by: Tony Lindgren <tony@atomide.com>
On 37xx EVM non-dt boot fails with current mainline,
because of broken GPIO numbering in the board file
that uses hardcoded GPIOs.
So marking omap3_evm_display_init() with CONFIG_BROKEN
for now as suggested by Tony as per the below link:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg90399.html
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The reset GPIO should be set for the SMSC911x, otherwise the controller
will not work and probing will fail. In the case of the tobi-duo
expansion board, the second controller shares the same GPIO, thus no
more changes are required (not tested).
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Layout of DEV_FEATURE register (offset = 0x604) is different
between TI81xx and AM33xx device, so create separate function
which will check for features available on specific AM33xx SoC
and set the flags accordingly.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use devm_ioremap_resource instead of reques_mem_region()/ioremap(),
devm_request_irq() instead of request_irq() and kzalloc() calls to
devm_kzalloc().
This ensures more consistent error values and simplifies error paths.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
[nsekhar@ti.com: add missing err.h include]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This board is impossible to found anymore.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Because MT_DEVICE is not executable in armv7, we change
the internal SRAM memory type to MT_MEMORY_NONCACHED.
As it seems that caching this internal SRAM memory is not necessary,
we chose the this memory type.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Fixes:
arch/arm/mach-at91/built-in.o: In function `ksz9021rn_phy_fixup':
:(.text+0x1174): undefined reference to `mdiobus_write'
:(.text+0x1188): undefined reference to `mdiobus_write'
:(.text+0x119c): undefined reference to `mdiobus_write'
:(.text+0x11b0): undefined reference to `mdiobus_write'
arch/arm/mach-at91/built-in.o: In function `sama5_dt_device_init':
:(.init.text+0x1e34): undefined reference to `phy_register_fixup_for_uid'
when CONFIG_PHYLIB is not selected.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch adds required structures for powerdomain initialization on
the ti816x. It is impossible to use omap3430 structures in order to
initialize powerdomains on ti816x, because there are big differences
between PRCM module base address offsets on these CPUs.
Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently omap3xxx_check_revision() detects ES1.0 and ES1.1 only,
this patch extends it by adding ES2.0 and ES2.1 versions support.
Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit e45600107b (Merge tag 'msm-cleanup-for-3.11' of
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into
next/cleanup) incorrectly resolved a merge conflict, resulting in a
node address that doesn't match the register address.
Fix this node address.
Signed-off-by: David Brown <davidb@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Minimal machine and device-tree support with arch_timers and console UART
- Reboot hook using PLL reset
- Low level debug support using UART
- SMP boot support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRv4/wAAoJEHJsHOdBp5c/IgsQAIRBEH3do787aX8WnvE2K2eH
bertrD86dcHGe4oNRg+L6WFxS/0SLYTzvkwizBSUl6gs1e0LkruAqiKM5LJmyBfr
G+ay0Z/j6oROwCpVF1aVL1sqC0dn7uUk9jhqaTy9DhLQjol6xLELvOy16+0WlpCC
uDJamki+i+PyO3HyLmyT+exgsLxdKmo3PzDn4fsgab0a/Y1wEniYrraSr5158uj2
Zpo9uDgDaMtPn0bC7WUPI+lC4F8s4GqQp87GH90QpVFPIR/yKCuurHocC8vvVER1
HBhZ9e6VVSuRYc3pkZO8Xtr/hvoopnDO07SYrMGxL2F3tzUqab900o9IsYWkBbYT
Z8DrPHFx6ZDhx0yEOdTeNq+wSXL2jduz78Wh20/Sh3lBDl6hn5YSIyWR+WiPpheo
MlJRKNs0cKwsPwTIK3x4LEkLzDe3tVGbBGigNDex5m5azQci10Cctbc+DnBjLOnj
AZiLuKM0LxNUx9riErWMmkskgNpRB31d7q9dgAC+rxA66MqBnz6x4nTTGFXNSkGC
/iRU5YO/BgwL/IeiX2gY/msFLW0YyjXakpQ8XcqoAxGb6y6qvbD6SNtjfxA16OHT
o6uPSpA82TprHzePFCSbzIkSE+Jj1o0Dqc4PWZkuX0X7TmW9R+k6TUU9OF+VnlCV
q0Jjsrod/6z8CQ/tIpD8
=pkFT
-----END PGP SIGNATURE-----
Merge tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
From Santosh Shilimkar:
SOC support for Keystone II devices:
- Minimal machine and device-tree support with arch_timers and console UART
- Reboot hook using PLL reset
- Low level debug support using UART
- SMP boot support
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Enable SMP support on Keystone machines
ARM: keystone: Add minimal TI Keystone platform support
ARM: dts: keystone: Add minimal Keystone SOC device tree data
Signed-off-by: Olof Johansson <olof@lixom.net>
When changing the name of Ether platform device in the commit c02f846938 (ARM:
shmobile: r8a7778: fix Ether device name), I completely forgot that there's also
platform device name used in bockw_pinctrl_map[], so the commit "ARM: shmobile:
BOCK-W: add Ether support" went in with the old "sh-eth" device name. Now change
it to "r8a777x-ether" in accordance with the commits that are now in the 'net-
next.git' repository, otherwise BOCK-W Ether support won't work in 3.11.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The convention for Device Tree node names is <device>@<hex-address>, where
the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi
DT names.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add definitions in arch/arm/mach-omap1/dma.h are now removed so remove
the file and include statements from dma.c and lcd_dma.c.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap-ir.c driver has never been upstream and was also removed from
linux-omap.git four years ago (See linux-omap.git commit efd1e3f
("REMOVE OMAP LEGACY CODE: Reset drivers/net/irda to mainline")).
Therefore remove needless device registration from a few board files
and delete thus to be unused arch/arm/mach-omap1/include/mach/irda.h
and unused OMAP_DMA_UART3_* definitions from dma.h.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Similarly than with OMAP2 there are many DMA channel definitions that have
been moved or redefined in drivers using them and we can remove them from
dma.h.
There is exception with MMC that arch/arm/mach-omap1/devices.c is using
MMC DMA channel definitions for setting platform data but those can be well
replaced with numeric values.
Remove dma.h include from arch/arm/mach-omap1/devices.c and use a script
below for dropping duplicated definitions and for replacing definitions
with DMA channel numbers.
grep '#define OMAP_DMA' arch/arm/mach-omap1/dma.h | while read -r i; do \
DDEF=`echo $i |cut -d ' ' -f 1-2`; \
DEF=`echo $DDEF |cut -d ' ' -f 2`; \
CH=`echo $i |cut -d ' ' -f 3`; \
if [ `git grep -c "$DDEF" |wc -l` -gt 1 ]; then \
echo "removing" $DEF; \
sed -i "s/${DEF}/${CH}/" arch/arm/mach-omap1/devices.c; \
sed -i "/${DDEF}/d" arch/arm/mach-omap1/dma.h; \
fi; \
done
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap1/mcbsp.c is only place where OMAP1 McBSP DMA channel
definitions are set. We may well use numerical values there and get rid
of their definitions in arch/arm/mach-omap1/dma.h.
Remove dma.h include from arch/arm/mach-omap1/mcbsp.c and use following
script for replacing definitions with DMA channel number:
egrep '#define OMAP_DMA_MCBSP' arch/arm/mach-omap1/dma.h | cut -f 1,3 \
| while read i; do \
DEF=`echo $i |cut -d ' ' -f 2`; \
CH=`echo $i |cut -d ' ' -f 3`; \
echo "removing" $DEF; \
sed -i "s/${DEF}/${CH}/" arch/arm/mach-omap1/mcbsp.c; \
sed -i "/${DEF}/d" arch/arm/mach-omap1/dma.h; \
done
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All definitions in arch/arm/mach-omap2/dma.h are removed so it can be
removed now.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Last remaining DMA channel definitions in arch/arm/mach-omap2/dma.h
are used only by omap_hwmod_2xxx_3xxx_ipblock_data.c and
omap_hwmod_3xxx_data.c. Remove them by using directly DMA channel number in
hwmod data and drop definitions with a following script:
egrep '#define [OMAP|AM35XX].*DMA' arch/arm/mach-omap2/dma.h | cut -f 1,3 \
| while read i; do \
DEF=`echo $i |cut -d ' ' -f 2`; \
CH=`echo $i |cut -d ' ' -f 3`; \
echo "removing" $DEF; \
sed -i "s/${DEF}/${CH}/" arch/arm/mach-omap2/omap_hwmod_*.c; \
sed -i "/${DEF}/d" arch/arm/mach-omap2/dma.h; \
done
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Many DMA channel definitions in arch/arm/mach-omap2/dma.h have been moved or
redefined in drivers without removing them from dma.h. Remove those with a
script below:
egrep '#define OMAP.*DMA' arch/arm/mach-omap2/dma.h \
|cut -f 1 |cut -d ' ' -f 1-2 | while read -r i; do \
if [ `git grep -c "$i" |wc -l` -gt 1 ]; then \
echo "removing" $i; \
sed -i "/${i}/d" arch/arm/mach-omap2/dma.h; \
fi; \
done
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These became unused after commit 660ffd6
("ARM: OMAP2xxx: hwmod: Convert AES crypto devcie data to hwmod").
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Given p = pdev->dev.platform_data; and
d = p->dma_attr;
the freeing of either one of these by the driver
seems just plain wrong.
Get rid of them in the .probe failure path as well as the
.remove.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Once a free channel is found, the check for dev_id == 0 does
not make any sense. Get rid of it.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Chris Ball <cjb@laptop.org> # davinci_mmc.c
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
[nsekhar@ti.com: dropped davinci sffsdr changes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add basic SMP support for Keystone machines. This does not
include support for CPU hotplug for now.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Texas Instruments Keystone family of multi-core devices are
based on ARM Cortex A15. Patch adds basic definitions for a
new Keystone sub-architecture in ARM.
The TCI66xxK2H Communications Infrastructure Keystone SoCs
are member of the C66x family based on TI's new KeyStone 2
multi-core SoC Architecture designed specifically for high
performance wireless and networking infrastructure applications.
The SOCs contains many subsystems like Cortex A15 ARM CorePacs,
C66XX DSP CorePacs, MSMC memory controller, Tera Net bus,
IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers
and queue based communication systems.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Add minimal device tree data for Keystone2 based SOCs. Patch
contains mainly ARM related SOC data and nothing about EVM specific
yet.
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
By default the exynos RTC is disabled. Enable it for snow. There's
also an external RTC on the max77686 PMIC but we haven't yet enabled
that.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The issues reported in commit 522ccdb6fd ("ARM: dts: Disable the RTC
by default on exynos5") are no longer reproduced on EXYNOS5250 based
Arndale board. Hence re-enabling RTC support for Arndale board.
This is helpful for testing S2R on Arndale board.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since the pdma works only in secure mode, accessing the same
in hypervisor mode gives an abort. As we are not using pdma
anywhere, removing the same.
Signed-off-by: Giridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since ssdk5440 and sd5v1 have 8GiB memory, this patch
updates bootargs for them.
Signed-off-by: Subash Patel <subash.rp@samsung.com>
Signed-off-by: Jungseok Lee <jays.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch updates cpu frequency level from 1500 to 800MHZ in steps
of 100MHZ. The corresponding voltage(in uV) is also added.
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds the required regulator supplies and properties
for wm8994 codec on smdk5250 board.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables the SPI in EXYNOS5440 SoC. The NOR
Flash can be accessed by enabling the spi interface
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add comments to machine_shutdown()/halt()/power_off()/restart() that
describe their purpose and/or requirements re: CPUs being active/not.
In machine_shutdown(), replace the call to smp_send_stop() with a call to
disable_nonboot_cpus(). This completely disables all but one CPU, thus
satisfying the requirement that only a single CPU be active for kexec.
Adjust Kconfig dependencies for this change.
In machine_halt()/power_off()/restart(), call smp_send_stop() directly,
rather than via machine_shutdown(); these functions don't need to
completely de-activate all CPUs using hotplug, but rather just quiesce
them.
Remove smp_kill_cpus(), and its call from smp_send_stop().
smp_kill_cpus() was indirectly calling smp_ops.cpu_kill() without calling
smp_ops.cpu_die() on the target CPUs first. At least some implementations
of smp_ops had issues with this; it caused cpu_kill() to hang on Tegra,
for example. Since smp_send_stop() is only used for shutdown, halt, and
power-off, there is no need to attempt any kind of CPU hotplug here.
Adjust Kconfig to reflect that machine_shutdown() (and hence kexec)
relies upon disable_nonboot_cpus(). However, this alone doesn't guarantee
that hotplug will work, or even that hotplug is implemented for a
particular piece of HW that a multi-platform zImage runs on. Hence, add
error-checking to machine_kexec() to determine whether it did work.
Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Zhangfei Gao <zhangfei.gao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch corrects the base address of pinctrl_3 on Exynos5250
platform.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This includes the following series sent earlier to the list:
- nommu-fixes
- R7 Support
- MPU support
I've left out the ARCH_MULTIPLATFORM/!MMU stuff that Arnd and I were
discussing today until we've reached a conclusion/that's had some more
review.
This is rebased (and re-tested) on your devel-stable branch because
otherwise there were going to be conflicts with Uwe's V7M work now that
you've merged that. I've included the fix for limiting MPU to CPU_V7.
Now that there is a way to tell the powerdomain core about
missing voltage domain auto-scaling control in SoCs', get rid of the dummy
voltage domain data populated for AM33xx devices.
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Afzal Mohammed <afzal@ti.com> # am335x evm
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The powerdomain framework currently expects all powerdomains to be associated with
a corresponding voltagedomain. For some SoCs' (like the already existing AM33xx
family, or for the upcoming AM437x and DRA7 SoCs') which
do not have a Voltage controller/Voltage Processor (neither the SR I2C
bus to communicate with the PMIC) there is no need for a Powerdomain to have
a voltage domain association since there is no auto-scaling of voltages possible
using the voltage FSM.
Extend the arch operations to add an api which the powerdomain core can
then use to identify if a voltdm lookup and association for a powerdomain
is really needed.
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Afzal Mohammed <afzal@ti.com> # am335x evm
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The support for the MPU is currently implemented only for R-class
(PMSAv7/R). Since the merge of V7M support in to the kernel it is possible
to select MPU support on V7M.
This patch ensures that until MPU support for M-class processors is
implemented, the MPU can only be selected with R-class CPUs
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Without an MMU it is possible for userspace programs to start executing code
in places that they have no business executing. The MPU allows some level of
protection against this.
This patch protects the vectors page from access by userspace processes.
Userspace tasks that dereference a null pointer are already protected by an
svc at 0x0 that kills them. However when tasks use an offset from a null
pointer (eg a function in a null struct) they miss this carefully placed svc
and enter the exception vectors in user mode, ending up in the kernel.
This patch causes programs that do this to receive a SEGV instead of happily
entering the kernel in user-mode, and hence avoid a 'Bad Mode' panic.
As part of this change it is necessary to make sigreturn happen via the
stack when there is not an sa_restorer function. This change is invisible to
userspace, and irrelevant to code compiled using a uClibc toolchain, which
always uses an sa_restorer function.
Because we don't get to remap the vectors in !MMU kuser_helpers are not
in a defined location, and hence aren't usable. This means we don't need to
worry about keeping them accessible from PL0
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CC: Nicolas Pitre <nico@linaro.org>
CC: Catalin Marinas <catalin.marinas@arm.com>
Allows the user to select MPU support when compiling for ARM processors
that support the PMSAv7.
This ensures that CONFIG_SMP depends on the MPU in the case that no MMU
is present.
CONFIG_SMP_ON_UP is not implemented for nommu, so introduce an MMU
dependency there.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
This switches the code using a local remapping of the
system controller to enable the U300 board to be
self-powered over to making the U300-specific syscon
compatible with the MFD generic syscon driver, selecting
the generic syscon driver, and augmenting the board
power code to pick the regmap and manipulate the syscon
from the regmap side of things.
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Enable MMC_UNSAFE_RESUME to be accomplish a proper suspend/resume cycle
for SD/SDIO/(e)MMC.
ARMMMCI host driver supports clock gating through runtime PM, thus
MMC_CLKGATE is not needed. Moreover ARMMMCI can do scatter-gather which
means we can explicity disable MMC_BLOCK_BOUNCE, since it's default
enabled, to skip unnecessary bounce buffer copying.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This deletes the dependency on any platform data for
the COH901 pin controller. There is only one user in the
kernel, and if we at some point want to support more
variants, they shall provide their variant info through
the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the last of the U300 clocks to being probed from
the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the slow, fast, AHB bridge and "rest" clocks on
the U300 system controller over to registration from the
device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the fixed and fixed-factor clocks in the U300
platform to register themselves from the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that the core file is the only one actually using any
of the base addresses, we can delete that header and move
the base address definitions into the one and only core
file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree node for the U300 system controller
and remaps this dynamically instead of using hard-coded
virtual addresses. The board power set-up code is altered
to fetch a reference to the syscon using ampersand <&syscon>
notation. This way of passing a pointer to the syscon will
also be used by the clocks.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Removing some boilerplate by using module_spi_driver instead of calling
register and unregister in the otherwise empty init/exit functions.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Two files remain in <mach/*> for U300: timex.h and
uncompress.h. The former is done away with by using
defaults, the latter is unused in multiplatform.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we removed our dependency on <mach/*> the U300
can be converted to mutliplatform. Remove the invalid restriction
that U300 would not support AUTO_ZRELADDR (it does) and update
the defconfig in the process.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This register base file is now only used in the machine
itself so move it down into mach-u300.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All IRQs are now obtained from the device tree, and this file
is unused, so delete it.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Get rid of the <mach/syscon.h> header as a prerequisite for
multiplatform support. Do this by pushing the registers down
to their respective drivers and deleting the unused remainder.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This rids the dependency to <mach/hardware.h> (which is an
implicit dependency to <mach/u300-regs.h>) from the U300
debug macro. Take this opportunity to update the file
header.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We have now transferred all the U300 peripherals to the device
tree, so we just select USE_OF, and delete all static board data,
then require that this platform shall be booted using the device
tree and nothing else.
This gets rid of the MMCI (PL180), PL022, and serial PL011
platform data entries and more.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the U300 FSMC flash controller from the
device tree, and defines the three partitions. Skip the
BBT scan as in the current platform data.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This probes the U300 dummy-spichip from the device tree
and adds the apropriate node to the tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the PL022 PrimeCell from the U300 device
tree. We make a new copy of the platform data for the
device tree boot path, as the old platform data is in an
older file which will be going away.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the COH 901 318 DMA controller to the U300
device tree. All devices now converted to device tree
so far will start to find their DMA channels.
Note that the U300 is not yet using the device tree
to obtain DMA channels, but this is a first step.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds DMA channel assignments to the MMC/SD-controller
and the two UARTs already in the U300 device tree, as we
have now defined a way to obtain DMA channels from the
device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for the U300 MMC/SD card slot from the device
tree boot. No other changes needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we have enabled board power and the AB3100 regulators,
put the regulator data into the device tree and enable it so
we can start to tie regulators to devices. To begin with we're
only supplying the power to the board itself.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for setting up the board power from the
device tree on the U300. We use a board-specific node in the
device tree for the S365 board and bind a regulator for the
board power to this node.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Make sure hyp-stub.S gets removed during make distclean,
this left over file was introduced in commit:
424e599 ARM: zImage/virt: hyp mode entry support for the zImage loader
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Dave Martin <dave.martin@linaro.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit f8b63c1 made flush_kernel_dcache_page a no-op assuming that
the pages it needs to handle are kernel mapped only. However, for
example when doing direct I/O, pages with user space mappings may
occur.
Thus, continue to do lazy flushing if there are no user space
mappings. Otherwise, flush the kernel cache lines directly.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: <stable@vger.kernel.org> # 3.2+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit fixes the ID and mask for the PJ4B which was too
restrictive and didn't match the CPU of the Armada 370 SoC.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This bug was introduced in commit e651eab0.
Some v4/v5 platforms failed to boot due to this.
Signed-off-by: Po-Yu Chuang <ratbert.chuang@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On Cortex-A9 before version r1p0, the LoUIS bit field of the CLIDR
register returns zero when it should return one. This leads to cache
maintenance operations which rely on this value to not function as
intended, causing data corruption.
The workaround for this errata is to detect affected CPUs and correct
the LoUIS value read.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is an external component and may or may not be there, while the
internal clock always works.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
[ horms+renesas@verge.net.au this is the setup-r8a7790.c
which I somehow miss-applied as part of another patch.
The clock-r8a7790.c portion of this patch has already been merged. ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DT fragment for the Zed Zynq platform and a corresponding
target to the Makefile
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a DT fragment for the zc706 Zynq platform and a corresponding
target to the Makefile.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Set the default status for UARTs to disabled in the zynq-7000.dtsi file
and let board dts files enable the UARTs on demand.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It is not necessary to have board specific compatibility strings
in the platform code. The board dts files can use the more generic
'xlnx,zynq-7000' string.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Bandgap is a device used to measure temperature on electronic
equipments. It is widely used in digital integrated circuits. It is
based on the dependency between silicon voltage and temperature.
This patch introduce HAS_BANDGAP config entry. This config is a boolean
value so that arch code can flag if they feature a bandgap device.
This config entry follows the same idea behind ARCH_HAS_CPUFREQ.
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Fabio Stevam <festevam@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When scheduling an mm on a CPU where it hasn't previously been used, we
flush the icache on that CPU so that any code loaded previously on
a different core can be safely executed.
For cores with hardware broadcasting of cache maintenance operations,
this is clearly unnecessary, since the inner-shareable invalidation in
__sync_icache_dcache will affect all CPUs.
This patch conditionalises the icache flush in switch_mm based on
cache_ops_need_broadcast().
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Albin Tonnerre <albin.tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When zImage is loaded into RAM at a low address but TEXT_OFFSET
is set higher, we risk overwriting ourself with the page table
needed to turn on the cache as it is located relative to the relocation
address. Let's defer the cache setup after relocation in that case.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reported-by: Stephen Boyd <sboyd@codeurora.org>
Tested-by: Stephen Boyd <sboyd@codeurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
An exclusive store instruction may fail for reasons other than lock
contention (e.g. a cache eviction during the critical section) so, in
line with other architectures using similar exclusive instructions
(alpha, mips, powerpc), retry the trylock operation if the lock appears
to be free but the strex reported failure.
Reported-by: Tony Thompson <anthony.thompson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Running an OABI_COMPAT kernel on an SMP platform can lead to fun and
games with page aging.
If one CPU issues a swi instruction immediately before another CPU
decides to mkold the page containing the swi instruction, then we will
fault attempting to load the instruction during the vector_swi handler
in order to retrieve its immediate field. Since this fault is not
currently dealt with by our exception tables, this results in a panic:
Unable to handle kernel paging request at virtual address 4020841c
pgd = c490c000
[4020841c] *pgd=84451831, *pte=bf05859d, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: hid_sony(O)
CPU: 1 Tainted: G W O (3.4.0-perf-gf496dca-01162-gcbcc62b #1)
PC is at vector_swi+0x28/0x88
LR is at 0x40208420
This patch wraps all of the swi instruction loads with the USER macro
and provides a shared exception table entry which simply rewinds the
saved user PC and returns from the system call (without setting tbl, so
there's no worries with tracing or syscall restarting). Returning to
userspace will re-enter the page fault handler, from where we will
probably send SIGSEGV to the current task.
Reported-by: Wang, Yalin <yalin.wang@sonymobile.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the missing VPU devicetree node for i.MX27 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The gpio-ranges properties in vf610.dtsi were written according to an
older version of the GPIO bindings. Unfortunately, these were changed
incompatibly in commit 86853c8 "gpio: add gpio offset in gpio range
cells property". This patch adds the missing required extra cell in each
gpio-ranges property.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10,
so add a regulator controled by GPIO_4_10 for WM8962.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Setting GPIO_0 pad as clko1 clock output to provide MCLK for WM8962.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds name for NOR flash. This keeps compatibility for
commandline partitions parsing from old bootloaders and make name
of device same for DT and non-DT boot.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enable the WEIM NOR for imx6q{dl}-sabreauto boards.
For the pin conflict with SPI NOR, its status is set to "disabled".
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add two pinctrls for WEIM:
one for the weim nor, another for the chipselect.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add two pinctrls for WEIM:
one for the weim nor, another for the chipselect.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add the clock and compatible information for the weim.
Also adds the weim label.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.
In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.
The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
use NO_PAD_CTL / 0x80000000 instead of 0x10000 to prevent misconfigured pads
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
[Steffen: split up patch into tqma53+mba53 part]
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add properties to make use of pca9554 gpio expander.
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enable the sgtl5000 found on MBa53 mainboard.
Also enable audio muxer and ssi, which are needed for sound to work.
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
As the displays are optional and we have more than one, also
set the status of the parallel display and the ldb to disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds the Television Encoder (TVEv2) device tree node
to the i.MX53 dtsi.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
I2S_MCLK is moved from pad GPIO19 to GPIO0, which can be muxed to the
ssi_ext1 clock signal. #SYSTEM_DOWN is moved from pad GPIO0 to GPIO19.
Add #PHY_RESET and LCD_CONTRAST.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
UART1 and UART2 can be unused on some designs with PCM038 module.
Remove these definitions from basic dts and lets choose user only
necessary UARTs in custom designs.
Keep UART0 for using this one as boot console, but since we have
not way to disable usage RTSCTS signals, remove this parameter for UART0.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
PCM038 dts can be used as base for development kit board or any
custom PCB designs. Renames this file to match functionality.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
FEC (KSZ8001L) reset pin is connected to GPIOC30.
Add this definition to dts.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add a group to the fec pinctrl, for use with MII interface.
Signed-off-by: Jonas Andersson <jonas@microbit.se>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Configure the data and tag latency for the L2 cache. This improves the
system performance.
This configuration is taken from Freescale's kernel patch
"ENGR00153601 [MX6]Adjust L2 cache parameter" [1]
which does
writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_TAG_LATENCY_CTRL));
writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_DATA_LATENCY_CTRL));
In this patch we are doing the same via the device tree.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
Since the SPI/NOR has pin conflict with the WEIM NOR,
we disable the spi/nor by default.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The SPI/NOR needs this gpio for CS.
So add this gpio in the hog pinctrl.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The SPI/NOR needs this gpio for CS.
So add this gpio in the hog pinctrl.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The gpmi does not use the MX6Q_PAD_NANDF_CS2__NAND_CE2_B and
MX6Q_PAD_NANDF_CS3__NAND_CE3_B.
Just remove them.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds support for the Ka-Ro TX53 System-On-Module.
As a baseboard is needed to operate it, only a *.dtsi and no Makefile entry.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for the DENX M53EVK board. The board currently supports
NAND, Ethernet, UART, CAN, I2C.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
With device tree clk lookup support in place, we can move audio codec
clk lookup for ssi_ext1 into device tree now, so that imx53_qsb_init()
can be saved.
Since ssi_ext2 lookup is used nowhere, it gets removed together with
ssi_ext1 lookup from clk driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds pinctrl data for NAND on MX53.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds pinctrl data for different mux of I2C2 on MX53.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds pinctrl data for different mux of I2C1 on MX53.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds pinctrl data for different mux of CAN1 on MX53.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds pinctrl data for the AUDMUX4 on MX53.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This allows to order the i2c character devices correctly,
so that /dev/i2c-0 corresponds to i2c1, /dev/i2c-1 corresponds
to i2c2, and so on. Currently they are ordered by register
address.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
These options are useful for controlling backlight contrast via PWM.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
There are ulpi access ops implemented in drivers/usb/phy/phy-ulpi.c.
mxc access ops implement the same access operations within mach-imx. This
patch removes the mxc ulpi file and uses phy-ulpi instead for
imx_otg_ulpi_create.
phy-ulpi successfully tested with i.MX27 Phytec phyCARD-S (pca100).
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add clock support for Vybrid VF610. It uses dtc macro support to
define all clock IDs in vf610-clock.h to keep clock IDs coherence
between kernel and DT.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
commit 84344b43c (ARM: i.MX5: Allow DT clock providers) introduce the following
sparse warning:
arch/arm/mach-imx/clk.c:12:43: warning: Using plain integer as NULL pointer
There is no need to initialize phandle, so remove it.
Cc: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Fix the following sparse warning:
arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'mxc_set_irq_fiq' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of explicitly calling clock initialization functions, we can
declare the functions with CLK_OF_DECLARE() and then call common
of_clk_init() to have them invoked properly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
