Pull locking fixes from Thomas Gleixner:
"The locking department delivers:
- A rather large and intrusive bundle of fixes to address serious
performance regressions introduced by the new rwsem / mcs
technology. Simpler solutions have been discussed, but they would
have been ugly bandaids with more risk than doing the right thing.
- Make the rwsem spin on owner technology opt-in for architectures
and enable it only on the known to work ones.
- A few fixes to the lockdep userspace library"
* 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
locking/rwsem: Add CONFIG_RWSEM_SPIN_ON_OWNER
locking/mutex: Disable optimistic spinning on some architectures
locking/rwsem: Reduce the size of struct rw_semaphore
locking/rwsem: Rename 'activity' to 'count'
locking/spinlocks/mcs: Micro-optimize osq_unlock()
locking/spinlocks/mcs: Introduce and use init macro and function for osq locks
locking/spinlocks/mcs: Convert osq lock to atomic_t to reduce overhead
locking/spinlocks/mcs: Rename optimistic_spin_queue() to optimistic_spin_node()
locking/rwsem: Allow conservative optimistic spinning when readers have lock
tools/liblockdep: Account for bitfield changes in lockdeps lock_acquire
tools/liblockdep: Remove debug print left over from development
tools/liblockdep: Fix comparison of a boolean value with a value of 2
A smaller set of fixes this week, and all regression fixes:
- a handful of issues fixed on at91 with common clock conversion
- a set of fixes for Marvell mvebu (SMP, coherency, PM)
- a clock fix for i.MX6Q.
- ... and a SMP/hotplug fix for Exynos
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTygXeAAoJEIwa5zzehBx3bt0P/2ofpoOuYRV88sHjI9w+0R+F
6t8WIFtTSFypI3zD6cSFBR38wTHI4mJ/jBb0ZnIhGXZE3Bzl/n9Moz7UElxsDD9v
AjMWzyx6XrSJSCATczN/CDMX38QN+0NZW+hdXODGz9g7DrVGT/Z2jqugkaPAkAwy
gVBmCqa+nkksfQCcQF3LDVmCyDUMHKILfUvyQJ217QbIavxO3kU/2wLdgEQpUCrI
YUWAnAj+S/xoxd6OYJr9nMd+M6P9nkRdy+dD56nJtSiZdFwFoI+EgfhUkT3iezPN
q3aYg3GbgiM/Fp8IO58tE2CbbG/xWJH+kwkJ03yl3z1Gx2KqAYeBpy2QMLBR9rUf
F0axul3EeW9Gf7OEEFKQbCW8ETaP2AMEbm11FZkjJxMlNjbG9zkYFnl0oedLXxTA
AcOPB7ABIWU1PsXXTqD9ZxjZmAsKL4CCck0BnWdOyQT5c9gA4ePEGEDMjeT/OiZE
QwlujHFl4M4E1XFJRL6RiBYppNLBKTsrgl+HaoDSW/MbD350WqbOFTzngw9Xy/rO
n7YNxUR2QFfWCNY1Zk8J8oJI/ISxla2bthhIe0+l/kk/zVUM3OMEClp0Fdw/L55X
Md/fc7FzQKV9GPhtSz1RGDN4bjdJuGmitjMrYf+YhbWHa6iKS3XkkHBNpkKhY8Kf
h9MsTmjd0En4BJLUqf0h
=LOtI
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A smaller set of fixes this week, and all regression fixes:
- a handful of issues fixed on at91 with common clock conversion
- a set of fixes for Marvell mvebu (SMP, coherency, PM)
- a clock fix for i.MX6Q.
- ... and a SMP/hotplug fix for Exynos"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
ARM: at91/dt: add missing clocks property to pwm node in sam9x5.dtsi
ARM: at91/dt: fix usb0 clocks definition in sam9n12 dtsi
ARM: at91: at91sam9x5: correct typo error for ohci clock
ARM: clk-imx6q: parent lvds_sel input from upstream clock gates
ARM: mvebu: Fix coherency bus notifiers by using separate notifiers
ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter
ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian
When CPU topology is specified in device tree, cpu_logical_map() does
not return core ID anymore, but rather full MPIDR value. This breaks
existing calculation of PMU register offsets on Exynos SoCs.
This patch fixes the problem by adjusting the code to use only core ID
bits of the value returned by cpu_logical_map() to allow CPU topology to
be specified in device tree on Exynos SoCs.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
It fixes a hard machine hang regression for boards where only pcie is
active but no sata, as the latest imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTyNTvAAoJEFBXWFqHsHzOm6kIAIQnvL429KlsyQAkZTpwHR/l
omETpfgmjTIpGJ4hYE04Kdi8w/O7GrAVUFe0moBETPRshHBJhYGCDgVuM38fA/PB
dd6vkCL1rS1bELaFFfTzFE07BlbZRSXy6PEs8/9wcE8vQOJ/BEKjscNY6PspKDMb
txRnmDUf9R+YdKBAY7CWTXC465Vtfiz8vFf1v73t+URxi/YTAut7s50V1IaXZf1E
g+W8G6SME8j1mOfPrq6hRdxijLsJ0QpKDVZay4Sb19+WMnLXXrc4M3skQsDUScp8
3dfdJBy/fVtFwQlmcK2z78rr6netMTbIVTDJjbJiz2Eb0kIZXgsDW5Jkgr+6uqE=
=S50Z
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.16, 2nd take" from Shawn Guo:
The i.MX fixes for 3.16, 2nd take:
It fixes a hard machine hang regression for boards where only pcie is
active but no sata, as the latest imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
* tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: parent lvds_sel input from upstream clock gates
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix SMP boot on 38x/375 in big endian
- Fix operand list for pmsu on 370/XP
- Fix coherency bus notifiers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZAQAAoJEP45WPkGe8Zn+DIQAIWvUhQ/7rsThFThmlsa4t01
8l4PqWlPznHHfSAfcM5JZtGBpKvqHhf+e6Hn8wPXek4u7v1x2K6dREk2JgsGZQMP
rsA2Ajn8jseFQb+iBnzdr1eV0AkztlGy0pJ4N+S4pogp4pzn6WPPNGz7P9UUzW/U
U2I8NycTqzsq8siODK/AbqLfFfok2M/++QgNOdEli1cQ44NdYyAzVLeqe/C9Ou6K
fn6RdscbvK/jWmrWi9CS4lhnhNkG8HBxxpzF4Rm06dWDU6z+B/HECq8yjHJlX9rx
EsxiJRV6nzUiws+/o19CUsl/lsJP0pfiTDXCoiUUhOovYUukm632ySdG5QfjnYaK
zsRw9hBnHCfHW5QEt6NaY5fVknnQPmJMM7WsW9B7PtQX4Rl38CWhLdq3LAbPVv9V
ze1AllUSmBLTYuQHFMuA602ZzngFcw1c+ZOmfrOpX+QYlyiv1CkqUOXiVGHNb2Nn
NPiCZaDp8d+JvWloOme0aZX+XfgfUOeXxogtYCtFBTGe9C+P6oqzPni3hqcvL7PA
PUo6BRe1KIOaQuUm0Eh/XqWC5Nyo0gcXm1oM8JgovVTT6RQndPIQLfO9isOa5A+b
PaLrAYtzHge+cCU4TJShYzjcVGzz1K2hsINjJ9NlW8172LbC1g5wQWrUVPFHrLuz
WoZYmkmNzNd8EGQwXdkj
=tq91
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu into fixes
Merge "mvebu fixes for v3.16 (round 3)" from Jason Cooper:
- Fix SMP boot on 38x/375 in big endian
- Fix operand list for pmsu on 370/XP
- Fix coherency bus notifiers
* tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Fix coherency bus notifiers by using separate notifiers
ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter
ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian
Signed-off-by: Olof Johansson <olof@lixom.net>
The pwm driver requires a clocks property referencing the pwm peripheral
clk.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Correct the typo error for the second "uhphs_clk".
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The i.MX6 reference manual doesn't make a clear distinction
between the fixed clock divider and the enable gate for the
pcie and sata reference clocks. This lead to the lvds mux
inputs in the imx6q clk driver to be parented from the
ref clock (which is the divider) instead of the actual gate,
which in turn prevents the upstream clock to actually be
enabled when lvds clk out is active.
This fixes a hard machine hang regression in kernel 3.16 for
boards where only pcie is active but no sata, as with this
kernel version the imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
Reported-by: Arne Ruhnau <arne.ruhnau@target-sg.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Arne Ruhnau <arne.ruhnau@target-sg.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The optimistic spin code assumes regular stores and cmpxchg() play nice;
this is found to not be true for at least: parisc, sparc32, tile32,
metag-lock1, arc-!llsc and hexagon.
There is further wreckage, but this in particular seemed easy to
trigger, so blacklist this.
Opt in for known good archs.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Reported-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: David Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: James Bottomley <James.Bottomley@hansenpartnership.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Waiman Long <waiman.long@hp.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: John David Anglin <dave.anglin@bell.net>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Davidlohr Bueso <davidlohr@hp.com>
Cc: stable@vger.kernel.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparclinux@vger.kernel.org
Link: http://lkml.kernel.org/r/20140606175316.GV13930@laptop.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This week's arm-soc fixes:
- Another set of OMAP fixes
* Clock fixes
* Restart handling
* PHY regulators
* SATA hwmod data for DRA7
+ Some trivial fixes and removal of a bit of dead code
- Exynos fixes
* A bunch of clock fixes
* Some SMP fixes
* Exynos multi-core timer: register as clocksource and fix ftrace.
+ a few other minor fixes
There's also a couple more patches, and at91 fix for USB caused by common
clock conversion, and more MAINTAINERS entries for shmobile.
We're definitely switching to only regression fixes from here on out,
we've been a little less strict than usual up until now.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTws/yAAoJEIwa5zzehBx35GQP/jUx/0+qiNkrupcmMoDr9ykP
QSQPWRVBancZ5eO3gBvnde0P/4gaTQZb7s31nCkX7RQfpe4078eR9isrqs7du3rw
BNsdJxtWIBzhnx19GDhjZM2BbYoVlDIETQTKUDPPhMg/I/k4ozLLcC+02uAMG1/g
TiCjOHF968Cq1bCwyvqJgiTDjjAPoHLrnD2aDsAuwYi2QPKNWkv0uHZFQmV2ooja
9Fk3Km32wirTvfjKir0r/BhV5oEdwv3y/HYRNG+bJOkvxDph8i5t2EvLeCl/yctq
KLcHBJjLsF2MgvCpoCfjg8OFyYA7qmZDNVxfiywJnWVUR6w0kOU3MggPopsikoY/
xU3MKJSu/36cNJER3Rl51taD9tq+4hVhKTjiLBkD0MsD9jN5ewvDqI5BKpjL5wlZ
I36eZmQE4yPnd6is1RS7uuTcN/uXBtOAhNjPS42xkW5lo9W7BWOUOlB1dzlcZTky
J6/h9WzODKcgaeTx55ks4wjhQmdzzO3nQk0ion3YEv27RKkSUJy8PNDAfMKAAF3p
OWzqUIfB2mMGQBGXcShXAAyC3S2jGJptlKL3Wno0LkPXBGqlRXHMYBvGoFEdP/iV
F24TDLxJIL/lPbpQEey3J4qZANrpuAm0HYmg+r5KiVHbMkcW2Z000w4kRoO+tIIc
Bxzxrot9PVAFfE1SkVYt
=NB6g
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"This week's arm-soc fixes:
- Another set of OMAP fixes
* Clock fixes
* Restart handling
* PHY regulators
* SATA hwmod data for DRA7
+ Some trivial fixes and removal of a bit of dead code
- Exynos fixes
* A bunch of clock fixes
* Some SMP fixes
* Exynos multi-core timer: register as clocksource and fix ftrace.
+ a few other minor fixes
There's also a couple more patches, and at91 fix for USB caused by
common clock conversion, and more MAINTAINERS entries for shmobile.
We're definitely switching to only regression fixes from here on out,
we've been a little less strict than usual up until now"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
ARM: at91: at91sam9x5: add clocks for usb device
ARM: EXYNOS: Register cpuidle device only on exynos4210 and 5250
ARM: dts: Add clock property for mfc_pd in exynos5420
clk: exynos5420: Add IDs for clocks used in PD mfc
ARM: EXYNOS: Add support for clock handling in power domain
ARM: OMAP2+: Remove non working OMAP HDMI audio initialization
ARM: imx: fix shared gate clock
ARM: dts: Update the parent for Audss clocks in Exynos5420
ARM: EXYNOS: Update secondary boot addr for secure mode
ARM: dts: Fix TI CPSW Phy mode selection on IGEP COM AQUILA.
ARM: dts: am335x-evmsk: Enable the McASP FIFO for audio
ARM: dts: am335x-evm: Enable the McASP FIFO for audio
ARM: OMAP2+: Make GPMC skip disabled devices
ARM: OMAP2+: create dsp device only on OMAP3 SoCs
ARM: dts: dra7-evm: Make VDDA_1V8_PHY supply always on
ARM: DRA7/AM43XX: fix header definition for omap44xx_restart
ARM: OMAP2+: clock/dpll: fix _dpll_test_fint arithmetics overflow
ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss
ARM: DRA7: hwmod: Fixup SATA hwmod
ARM: OMAP3: PRM/CM: Add back macros used by TI DSP/Bridge driver
...
Pull ARM fixes from Russell King:
"Another round of fixes for ARM:
- a set of kprobes fixes from Jon Medhurst
- fix the revision checking for the L2 cache which wasn't noticed to
have been broken"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: l2c: fix revision checking
ARM: kprobes: Fix test code compilation errors for ARMv4 targets
ARM: kprobes: Disallow instructions with PC and register specified shift
ARM: kprobes: Prevent known test failures stopping other tests running
- update the parent for Auudss clock because kernel will be hang
during late boot if the parent clock is disabled in bootloader.
- enable clk handing in power domain because while power domain
on/off, its regarding clock source will be reset and it causes
a problem so need to handle it.
- add mux clocks to be used by power domain for exynos5420-mfc
during power domain on/off and property in device tree also.
- register cpuidle only for exynos4210 and exynos5250 because a
system failure will be happened on other exynos SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTwbTSAAoJEA0Cl+kVi2xqK9UP/3wm1ukMWNekDZ97rTsEN4Uo
qDladKJf54DANuBkbXMWL3AT6O0Ja679Xm3rjvvGGMyuM+Ga/S7RO4Odvq9970HZ
/Auv+MQnU/t7L3UW/4jvPSL5aRTxBJ9ylpcH7HNsvUg51bOuovHcQyafag8tKt1M
/rbRcKK6076KvctT1h677NX4+TYcFMbp08qYlmWaLGSXvijgTErHFdhoB/Mbf1+Q
SKduITGVTmRQ4cB1Dxn1fVoAb8UIJWiWWW2Ndi57gn/blaM4iE/K6oYSV8972HtZ
WMaFcka06FBBuFpKDjQp092altyAJbSwTURJEadI6Nrw+uqs6uMEX9hKeFdYvaKJ
avbhz7YlDK3NSCvriJkdp0faWHxLlr0ZLV3aIye3o7JKa68Bp/Un6Y6L+5dEAdnk
K3BiFxomdtTw5S39qnpttshwStUBCK9FxNuiPaO0FNPCiIEtQsobTCpYZ5vAZZFk
A9lqgdQT1u/gRxn02KPz0CKz5EYhlJvJTxiX83+vv/9DUI4ulBu9oJyDLbKszZ07
XqqAsk9cpBlr2NxnBUeAO8R4lBBjyf16pWRJBxGvlrz97OONS+OOygVufUS8o5Jw
p8Bgf8xeRA0udxj4X2KgyKzM3TNyGUxUD5tSMwvTmWIc7HGzjzL/Fv8NBwUGKMTs
4RtpSqM59UZuVbqXxUeP
=didu
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung fixes-3 for 3.16" from Kukjin Kim:
Samsung fixes-3 for v3.16
- update the parent for Auudss clock because kernel will be hang
during late boot if the parent clock is disabled in bootloader.
- enable clk handing in power domain because while power domain
on/off, its regarding clock source will be reset and it causes
a problem so need to handle it.
- add mux clocks to be used by power domain for exynos5420-mfc
during power domain on/off and property in device tree also.
- register cpuidle only for exynos4210 and exynos5250 because a
system failure will be happened on other exynos SoCs.
* tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Register cpuidle device only on exynos4210 and 5250
ARM: dts: Add clock property for mfc_pd in exynos5420
clk: exynos5420: Add IDs for clocks used in PD mfc
ARM: EXYNOS: Add support for clock handling in power domain
ARM: dts: Update the parent for Audss clocks in Exynos5420
Signed-off-by: Olof Johansson <olof@lixom.net>
Add clocks for usb device, or else switch to CCF, the gadget
won't work.
Reported-by: Jiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Jiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently, the exynos cpuidle driver works correctly only on exynos4210
and 5250. Trying to use it with just one CPU online on any other exynos
SoCs will lead to system failure, due to unsupported AFTR mode on other
SoCs. This patch fixes the problem by registering the driver only on
supported SoCs and letting others simply use default WFI mode until
support for them is added.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adding the optional clock property for the mfc_pd for
handling the re-parenting while pd on/off.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
While powering on/off a local powerdomain in exynos5 chipsets, the
input clocks to each device gets modified. This behaviour is based
on the SYSCLK_SYS_PWR_REG registers.
E.g. SYSCLK_MFC_SYS_PWR_REG = 0x0, the parent of input clock to MFC
(aclk333) gets modified to oscclk
= 0x1, no change in clocks.
The recommended value of SYSCLK_SYS_PWR_REG before power gating any
domain is 0x0. So we must also restore the clocks while powering on
a domain everytime.
This patch adds the framework for getting the required mux and parent
clocks through a power domain device node. With this patch, while
powering off a domain, parent is set to oscclk and while powering back
on, its re-set to the correct parent which is as per the recommended
pd on/off sequence.
Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
restart handling and phy regulators and SATA interconnect data.
Also few build fixes related to the DSP driver in staging, and trivial
stuff like removal of broken and soon to be unused platform data init
for HDMI audio that would be good to get into the -rc series if not
too late.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTvTCLAAoJEBvUPslcq6Vz5J0QAKJJlkjQwpr+nV8yfgPSNASR
yEwRdPYF2k3bxcjusv10OyOFQp+3UcMILATR0hE29khr32Yh3qs4zYgSajs2Fr3Y
ziNVqbknm4WQ5vrQXKN12P1xeb67bX0MrmZBQyqzDPc8bPdlohIkBBE6NQ6jI6Jn
5xXn7auDgSYhIB3w09QZX6yzm3+06qG+Typ9ZgLr/OaF0KUGv5KcwJi/T6/PTbl+
SJMJYJbVZoD1v4yTVGskqolYi7Yy8sMbAGIGKUw40f3aOI5SSctgFynHzy75hyNC
aZ14PtfWFkiJ32xXHMFGJ7dficqSzC5QTrItcP+kjRpktYwaDMMse5rewQ4nToMo
Y6cxBWy3rMT3uX6XSEGkI16PiEjtnOUj02czEO45wLTWIFyZTHkdUtG3j5BMhuDz
IvkDnxCyKjbEt6zCWRZH2L0JTRitIJUaKEeZwgM89T0oBMOvX9y6ikrnS1yeamO6
prWMyPA395wU7M7UWFthI/b2uSS2xHBJ2Lf4yHj2lEKHlai4AKXwgWzctmboiZjx
7T2rCY0/N15EdUuAWdOdDHe4bPl9Dg99peheMs9gUtOM0rQmsSN4stAGwC+VAduj
aFE4mDcPgUcRX9IpYPGSZY3X3PTjESl2t5rDZQVtxw9+VzUfdDiOAIiBHBOZGunG
PDJPg6AJGeBHGKkn+k0K
=paeu
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v3.16-rc4" from Tony Lindgren:
Fixes for omaps for the -rc series. It's mostly fixes for clock rates,
restart handling and phy regulators and SATA interconnect data.
Also few build fixes related to the DSP driver in staging, and trivial
stuff like removal of broken and soon to be unused platform data init
for HDMI audio that would be good to get into the -rc series if not
too late.
* tag 'omap-for-v3.16/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Remove non working OMAP HDMI audio initialization
ARM: dts: Fix TI CPSW Phy mode selection on IGEP COM AQUILA.
ARM: dts: am335x-evmsk: Enable the McASP FIFO for audio
ARM: dts: am335x-evm: Enable the McASP FIFO for audio
ARM: OMAP2+: Make GPMC skip disabled devices
ARM: OMAP2+: create dsp device only on OMAP3 SoCs
ARM: dts: dra7-evm: Make VDDA_1V8_PHY supply always on
ARM: DRA7/AM43XX: fix header definition for omap44xx_restart
ARM: OMAP2+: clock/dpll: fix _dpll_test_fint arithmetics overflow
ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss
ARM: DRA7: hwmod: Fixup SATA hwmod
ARM: OMAP3: PRM/CM: Add back macros used by TI DSP/Bridge driver
ARM: dts: dra7xx-clocks: Fix the l3 and l4 clock rates
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently, the coherency fabric support registers two bus notifiers;
one for platform, one for pci bus types, with the same notifier block.
However, this is illegal and can cause serious issues: the notifier
block is also a link in the notifier list and cannot be inserted twice.
This commit fixes this by using different notifier blocks (with the same
notifier callback) to set the platform and pci bus types notifiers.
Fixes: b0063aad5d ("ARM: mvebu: use hardware I/O coherency also for PCI devices")
Reported-by: Paolo Pisati <p.pisati@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1404826657-6977-1-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In the inline asm part of the function armada_370_xp_pmsu_idle_enter()
the input operand was used. The intent here was to let the compiler
choose this register so it could do the optimization it
needed.
However an input operand is not supposed to be modified by the inline
asm code. This can lead to improper generated instructions.
In some case generated instruction the compiler made the choice to
reuse the same register to store the return value. But in the assembly
part this register was modified, so it can lead to return an wrong
value.
The fix is to use a clobber. Thanks to this the compiler will know
that the value of this register will be modified.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1404483736-16938-1-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This code is not working currently and it can be removed. There is a
conflict in sharing resources with the actual HDMI driver and with
the ASoC HDMI audio DAI driver.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
PRCM code (when DSPBridge is used) for v3.16-rc.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/prcm-a-v3.16-rc/20140706174258/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTusBYAAoJEMePsQ0LvSpL0JgQAKsVXDTh1yeLzU1NT3Np0zJs
rptjUTz3KGdq0ReU5N1Oe0J/cGbz4JFcN/Ug7l2fywKFeqK7QBBzcWL9NBVYKP+v
OndbBi7OARd6iYEYsJwgFERe86ZwpE1KpR4Vnyo9uv3sA2AbbXbwvbjC0d/sktnV
oCC83X2ahYauPj0/6suHtiZamuTvThCmM3hxMH2TFFoPaQKKV5BHp8dRXNjCZ5jg
s/dfCX3dgb9S9HGbgsZBToqTmyMQ09hv0H0m3KAOveJQFgdwBSDgE94chOSdx3Kk
DanBawF1LJmkpFwLUcTIbIkdBjGBBat4b2EVgPjyEFqWqWJgEHs56vSLsSwCkbi5
9tIu67aUP7VJCsibWECAOMtli7uYy/liYY/dUZhqrck6TT1tukhHKjjsuWr/9xY+
TU/Rd8PA5ytp92r2AkdN+Ztz6j1HUQQbGPmmIfOHuBB4WilwSF0Zgx+3c6bc9hMf
36J0qLYowaBYY57UN6joLGiPNcR7TgsEunCzsCxuGGby4rpFqy95Ml2aWFRn32bH
LUgmAgaSNlk+v4E1iG7jJMHoH2xpKw+2+PNkIVC3WE8saE10qjZvebNUVJXb9bY1
VMuLHHrSc148ou0g+rM4ehF3PEbIBPd4SOxFwVsefPbAnpUSC+hj+SptYGWbLPJJ
D+2noXhqssqVlvizxGoj
=CanJ
-----END PGP SIGNATURE-----
Merge tag 'for-v3.16-rc/omap-fixes-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.16/fixes
Some miscellaneous fixes for OMAP clock code, DRA7xx device data, and
PRCM code (when DSPBridge is used) for v3.16-rc.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/prcm-a-v3.16-rc/20140706174258/
Let's say clock A and B are two gate clocks that share the same register
bit in hardware. Therefore they are registered as shared gate clocks
with imx_clk_gate2_shared().
In a scenario that only clock A is enabled by clk_enable(A) while B is
not used, the shared gate will be unexpectedly disabled in hardware.
It happens because clk_enable(A) increments the share_count from 0 to 1,
while clock B is unused to clock core, and therefore the core function
will just disable B by calling clk->ops->disable() directly. The
consequence of that call is share_count is decremented to 0 and the gate
is disabled in hardware, even though clock A is still in use.
The patch fixes the issue by initializing the share_count per hardware
state and returns enable state per share_count from .is_enabled() hook,
in case it's a shared gate.
While at it, add a check in clk_gate2_disable() to ensure it's never
called with a zero share_count.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: f9f28cdf21 ("ARM: imx: add shared gate clock support")
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- fix the check for SMP configuration with using CONFIG_SMP
not just SMP
- fix the number of pwm-cells for exynos4 pwm
- fix ftrace for exynos_mct
- register exynos_mct for stable udely
- fix secondary boot addr for secure mode for exynos SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTuyiZAAoJEA0Cl+kVi2xqDCQQAI59MYn7mOSxQ4egjR65SFXc
5g0yQIGsfWw1+FXDr1X64Okq5HjY8YHTbkyo9nzjNcmABwHK/oJXWVpJuk4b61e6
eKA5hgiSa1grvz4uzW1ZR+pRooEOn7sJe3OYcesPrsbnsXBLzmV+9HJ2x657asCx
Ran010mw+QNfyOikARFIWaVB9REbK1n5mcKAoAeW3iFAp94xCH0d5Qj0IiQxAam9
8zdEogfY3+YcB+frOaZH1OzVCZ1wLjDdmv86SwvcixuvPU7Lcr91vDFbc0cE7DVj
pHZtIoMi8RZk3twtMLhAnJz+fNygUGN7kBMW3P42ULkgMxIQMGfqmWvgBpUJ8XO6
2wVZ6WnW6jN1OXyNsNM/yyDtm+hdryaIP+WdMfrol8gRevilNniyPwd83HSKTJg8
HHAazUAZZTS+04x19aBBO2RU5vhHSimbOOsXIlJen4Tz5BBwebDQ38JnKRSElgm1
5w+8BajzVt5YTaW2NJ7T87wb/ytV8/MNKZ58GOzh2EXIbnohKbs0qM1ip0RztWLA
ZvEyTF86+fA55W5wrSb6qfz428hCWkJ1PnPCXVPvffNGsrdOM+ziC8G1fhDVw5TJ
TVoktLhz7kU+1aB7272NbXVI9GaJ8vTl0pMpcN5sHI4NCq3g+8SylfaJt3aW5zcy
kKsxM4bvZyMXstwAIlVo
=jlRt
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung fixes-2 for v3.16" from Kukjin Kim:
- fix the check for SMP configuration with using CONFIG_SMP
not just SMP
- fix the number of pwm-cells for exynos4 pwm
- fix ftrace for exynos_mct
- register exynos_mct for stable udely
- fix secondary boot addr for secure mode for exynos SoCs
* tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Update secondary boot addr for secure mode
clocksource: exynos_mct: Register the timer for stable udelay
clocksource: exynos_mct: Fix ftrace
ARM: dts: fix pwm-cells in pwm node for exynos4
ARM: EXYNOS: Fix the check for non-smp configuration
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
As per the user manual, it should be CLK_MAU_EPLL.
The problem surfaced when the bootloader in Peach-pit board set
the EPLL clock as the parent of AUDSS mux. While booting the kernel,
we used to get a system hang during late boot if CLK_MAU_EPLL was
disabled.
Signed-off-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Reported-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Almost all Exynos-series of SoCs that run in secure mode don't need
additional offset for every CPU, with Exynos4412 being the only
exception.
Tested on Origen-Quad (Exynos4412) and Arndale-Octa (Exynos5420).
While at it, fix the coding style (space around *).
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Tested-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The revision checking in l2c310_enable() was not correct; we were
masking the part number rather than the revision number. Fix this
to use the correct macro.
Fixes: 4374d64933 ("ARM: l2c: add automatic enable of early BRESP")
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As this board use external clock for RMII interface we should specify 'rmii'
phy mode and 'rmii-clock-ext' to make ethernet working.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The use of FIFO in McASP can reduce the risk of audio under/overrun and
lowers the load on the memories since the DMA will operate in bursts.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The use of FIFO in McASP can reduce the risk of audio under/overrun and
lowers the load on the memories since the DMA will operate in bursts.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently, child nodes of the gpmc node are iterated and probed
regardless of their 'status' property. This means adding 'status =
"disabled";' has no effect.
This patch changes the iteration to only probe nodes marked as
available.
Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Tested-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP platform device for TI DSP/Bridge is currently
created unconditionally whenever CONFIG_TIDSPBRIDGE is
enabled. This device should only be created on OMAP34xx/
OMAP36xx SoCs, and not for other OMAP3 derived SoCs or when
booting multi-arch images on other SoCs. So, add a check for
the SoC family both before creating the device and allocating
the carveout memory for the device.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
After clarification from the hardware team it was found that
this 1.8V PHY supply can't be switched OFF when SoC is Active.
Since the PHY IPs don't contain isolation logic built in the design to
allow the power rail to be switched off, there is a very high risk
of IP reliability and additional leakage paths which can result in
additional power consumption.
The only scenario where this rail can be switched off is part of Power on
reset sequencing, but it needs to be kept always-on during operation.
This patch is required for proper functionality of USB, SATA
and PCIe on DRA7-evm.
CC: Rajendra Nayak <rnayak@ti.com>
CC: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap44xx_restart is defined as a static void inline when DRA7/AM437X is
defined alone, which implies that the restart function is no longer
functional even though it is built in. So, fix the definition of the
same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The divider value provided to the _dpll_test_fint can reach value of
256 with J type DPLLs (USB etc.), which causes an overflow with the u8
datatype. Fix this by changing the parameter to be an int instead.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[paul@pwsan.com: changed type of 'n' to unsigned int]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the sysconfig class bits for the Super Speed USB
controllers
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Get rid of optional clock as that is now managed by the
AHCI platform driver.
Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The commit 7be914f {ARM: OMAP3: PRM/CM: Cleanup unused header} removed
some of the macros used by the TI DSP/Bridge driver. This fixes the
following build errors when trying to build DSP/Bridge driver (disabled
at present), otherwise results in the following build errors:
drivers/staging/tidspbridge/core/tiomap3430.c:531:31: error: 'OMAP3430_AUTO_IVA2_DPLL_SHIFT' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap3430.c:531:31: note: each undeclared identifier is reported only once for each function it appears in
make[3]: *** [drivers/staging/tidspbridge/core/tiomap3430.o] Error 1
make[3]: *** Waiting for unfinished jobs....
drivers/staging/tidspbridge/core/tiomap_io.c: In function 'sm_interrupt_dsp':
drivers/staging/tidspbridge/core/tiomap_io.c:404:31: error: 'OMAP3430_AUTO_IVA2_DPLL_SHIFT' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap_io.c:404:31: note: each undeclared identifier is reported only once for each function it appears in
drivers/staging/tidspbridge/core/tiomap_io.c:414:12: error: 'OMAP3430_IVA2_DPLL_FREQSEL_SHIFT' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap_io.c:415:12: error: 'OMAP3430_EN_IVA2_DPLL_SHIFT' undeclared (first use in this function)
make[3]: *** [drivers/staging/tidspbridge/core/tiomap_io.o] Error 1
drivers/staging/tidspbridge/core/tiomap3430_pwr.c: In function 'dsp_clk_wakeup_event_ctrl':
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:442:19: error: 'OMAP3430_GRPSEL_GPT5_MASK' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:442:19: note: each undeclared identifier is reported only once for each function it appears in
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:455:19: error: 'OMAP3430_GRPSEL_GPT6_MASK' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:468:19: error: 'OMAP3430_GRPSEL_GPT7_MASK' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:481:19: error: 'OMAP3430_GRPSEL_GPT8_MASK' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:494:19: error: 'OMAP3430_GRPSEL_MCBSP1_MASK' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap3430_pwr.c:546:19: error: 'OMAP3430_GRPSEL_MCBSP5_MASK' undeclared (first use in this function)
make[3]: *** [drivers/staging/tidspbridge/core/tiomap3430_pwr.o] Error 1
make[2]: *** [drivers/staging/tidspbridge] Error 2
Fixes: 7be914f (ARM: OMAP3: PRM/CM: Cleanup unused header)
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This week's arm-soc fixes:
- A set of of OMAP patches that we had missed Tony's pull request of:
- Reset fix for am43xx
- Proper OPP table for omap5
- Fix for SoC detection of one of the DRA7 SoCs
- hwmod updates to get SATA and OCP to work on omap5 (drivers merged in 3.16)
- ... plus a handful of smaller fixes
- sunxi needed to re-add machine specific restart code that was removed in
anticipation of a watchdog driver being merged for 3.16, and it didn't make
it in.
- Marvell fixes for PCIe on SMP and a big-endian fix.
- A trivial defconfig update to make my capri test board boot with
bcm_defconfig again.
... and a couple of MAINTAINERS updates, one to claim new Keystone
drivers that have been merged, and one to merge MXS and i.MX (both
Freescale platforms).
The largest diffs come from the hwmod code for omap5 and the re-add of
the restart code on sunxi. The hwmod stuff is quite late at this point
but it slipped through cracks repeatedly while coming up the maintainer
chain and only affects the one SoC so risk is low.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTuFXOAAoJEIwa5zzehBx30dYQAJ2jfunXR0R4BldQw7UzYoob
3ht/tgIRglMcGIGbdvwRznOjjAsZTTssUzZvCvdU/B5ckILg7FCsaHFo6eYhB0NE
bvxpMD1XyfO2JPF1r7jQqQsuwUXWtyAnkxFiuFkeBnriwo69ikbZnPb5g0bcMaXx
HzPZoSoODn9g2vbgEH3jL3+AClWvHgJ7lXQxUSH9xvCqjqQjiwFx8l6QY/+qgkde
QuRfZ0UCBuRFpTdR4jfvTIO4mctD6ObfaRRiQpzIQPa8HDGcWmD2LJm+IeCdclFv
PwINZnf5aICz+CEJa8oo7tyKpEUNQwJL2YPesCXeRnVxcCHMn0UCDuZ3Z2MR3C8I
w21msVS+bxr+tisj7QY3KCi73DMlTjOPj21OaPrpTAjDI/5tZxTCCvCWctg0aF4S
HKKETWtrWhN6qiIpkKalCcr6CHlqf9p7QOz7d4yzE89O3thyg7YrRff7KOCtoaZo
+aJnW7Z3gTuJFWTpAOQL+DeRQsY0ZpYqG6wVc8bIgM+vYYPBJO7mGa2ARBiz4Piw
a+iEOP3ej8uqa60YfehXRS/YTGnOVkUf9Qk4zmyKjyoXSNhasQDHG/ujb7/hxzpd
Lq4X2CkLZTOX+kjlXWD7kk3OBhIxdu38UtWPomd3QVZqEg7dCYxQooXuiidqYQ9x
xquFfKAuIJlvBzVpWIbz
=J9xD
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"This week's arm-soc fixes:
- A set of of OMAP patches that we had missed Tony's pull request of:
* Reset fix for am43xx
* Proper OPP table for omap5
* Fix for SoC detection of one of the DRA7 SoCs
* hwmod updates to get SATA and OCP to work on omap5 (drivers
merged in 3.16)
* ... plus a handful of smaller fixes
- sunxi needed to re-add machine specific restart code that was
removed in anticipation of a watchdog driver being merged for 3.16,
and it didn't make it in.
- Marvell fixes for PCIe on SMP and a big-endian fix.
- A trivial defconfig update to make my capri test board boot with
bcm_defconfig again.
... and a couple of MAINTAINERS updates, one to claim new Keystone
drivers that have been merged, and one to merge MXS and i.MX (both
Freescale platforms).
The largest diffs come from the hwmod code for omap5 and the re-add of
the restart code on sunxi. The hwmod stuff is quite late at this
point but it slipped through cracks repeatedly while coming up the
maintainer chain and only affects the one SoC so risk is low"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
MAINTAINERS: Add few more Keystone drivers
MAINTAINERS: merge MXS entry into IMX one
ARM: sunxi: Reintroduce the restart code for A10/A20 SoCs
ARM: mvebu: fix cpuidle implementation to work on big-endian systems
ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup
ARM: mvebu: move Armada 375 external abort logic as a quirk
ARM: bcm: Fix bcm and multi_v7 defconfigs
ARM: dts: dra7-evm: remove interrupt binding
ARM: OMAP2+: Fix parser-bug in platform muxing code
ARM: DTS: dra7/dra7xx-clocks: ATL related changes
ARM: OMAP2+: drop unused function
ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm
ARM: dts: omap5: Update CPU OPP table as per final production Manual
ARM: DRA722: add detection of SoC information
ARM: dts: Enable twl4030 off-idle configuration for selected omaps
ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
- mvebu
- Fix PCIe deadlock now that SMP is enabled
- Fix cpuidle for big-endian systems
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJTsqLNAAoJEP45WPkGe8ZnERkP/jp3nnz/G1P4308KGFAEp3cs
CKYDM4hSwq/XcHqMrWpVn1UE8XCZWALhG8n5INXMHPprVj1fIzdeUC+VwBRapVXL
QrfMIDbHM8lS88i7rp91rXK87OIpieoBSQ+tZOIAmDO7Xnxj2EB2lkZjOcOUn1RO
YuefnPoxIQzdta8Tnqcmk4dA/60CtBjJG/X9PkXXyn6Poik1aWvF2X+VqtHEp0BN
9xmwA/BVF7CkcoULlOBljlds/42szmTnfUe/XWsEkuO3VPvYWkBYfdy9NFx0UmoL
JiaAKYot0HQJxe6vtqgdD0ZEgcc+Hr/lYba05I5uOLwOVxxsa50NPt+mqKItqzvO
Gslb0v9aRGq1KP7/ba/W9TYMXIltYfi02mO9d8DAi/fUs1Jgm44d8hkM106lkt1S
3Pu8PaPEZOth7deNgdem+RRl0pUvOw3oz2ZI7gr0QnNWobwLH/cycUwQHLwMwai9
S7fSx8ZbrTceyN6uk33KZG5n/NNd/nyXsDH8Sz9np/F1bwsR58/yVzBA60OdEHJk
AwbwoK6EbCUbv9m/FbL9ImQI5RjW1CH2DhNtGv8MSvtfyweI9Gd/OWg0w3B+GodX
aS80BwFPwhzy7nS7YNWR5b7IGYCf9cMwy6M6uEdpTXfFv4HmQ8zGAA0YMlVB9pjF
Avda0qpS++0AGsvqgEEl
=eDSn
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for v3.16 (round #2)
- mvebu
- Fix PCIe deadlock now that SMP is enabled
- Fix cpuidle for big-endian systems
* tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: fix cpuidle implementation to work on big-endian systems
ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup
ARM: mvebu: move Armada 375 external abort logic as a quirk
Signed-off-by: Olof Johansson <olof@lixom.net>
This partly reverts commits 553600502b (ARM: sunxi: Remove reset code from
the platform) and 5e669ec583 (ARM: sunxi: Remove init_machine callback) for
the sun4i, sun5i and sun7i families.
This is needed because the watchdog counterpart of these commits was dropped,
and didn't make it into 3.16. In order to still be able to reboot the board, we
need to reintroduce that code. Of course, the long term view is still to get
rid of that code in mach-sunxi.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
enabling of a few features that had to wait for the driver
dependencies to clear.
The fixes included are:
- Fix am43xx hard reset flags
- Fix SoC detection for DRA722
- Fix CPU OPP table for omap5
- Fix legacy mux parser bug if requested muxname is a prefix of
multiple mux entries
- Fix qspi interrupt binding that relies on the irq crossbar
that has not yet been enabled
- Add missing phy_sel for am43x-epos-evm
- Drop unused gic_init_irq() that is no longer needed
And the enabling of features that had driver dependencies are:
- Change dra7 to use Audio Tracking Logic clock instead of a fixed
clock now that the clock driver for it has been merged
- Enable off idle configuration for selected omaps as all the kernel
dependencies for device tree based booting are finally merged as
this is needed to get the automated PM tests working finally with
device tree based booting
- Add hwmod entry for ocp2scp3 for omap5 to get sata working as
all the driver dependencies are now in the kernel and this patch
fell through the cracks during the merge window
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTn/+wAAoJEBvUPslcq6Vzr1AP/1/HCOmp5B4tP3WhRPDK7nSr
hNjoa3uFhhpc6LoO1PMsbHcusBwrD9/Dr1BM53vltRXGGMFiADRw02N0BMSiDB4y
cWKo6C7d1PEsX7SvH6ehzQV6pB8v8zAhShuuA2sPQRcGsKPfUTCI3rjjvCNvcnmr
fIyLOwZ8MkFkAxrSCNUHULRK4U8Tivxa0k9eTEoPo+y5rkolTwtU9C5ybpUk4Jju
K1yjZOo+hbNENFLS4FqM6Y4IjlJlz49baDoaZXkIhP+UhvdKSLAhNta76vRtnnDE
wX0STSCYbPL/Tj+bfCk3VJa1dpgkHYY9y8H7FOsf0osqbP5j0H49i/+y3+lTu3A3
NzVYZRlu32llCp5pvVVy6ibjme9jRwz/HPtKEXDtbtFG41pvDaHnSF72OOVz6DoN
Yu9tN6vojMaeQeE69mFzy7RI6SWpOVxjHyPG1b2rGoJayY+P2oR43iPAeWF6q7lp
Nz/LWDqNwIj4H1T4KWIhK+mv/+YJDzWnIDczToK0ROZ8JOR3A0MRWwBvYpvHPRnY
rxE2vtRpHUqOPiPtj1sKzUti74xJahCL9oXLRuFbG4z5Le1jelM9dYdjf4wpAoWs
H+1RP20GRos1dNIzoPZieOP+X4jp0m6A1wtcy49Dbivw6Gx7oJecH7zkMvobgy8C
gJ8G86a9R4EXKNJmjqvc
=2HDE
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge OMAP fixes from Tony Lindgren:
Fixes for omaps for issues discovered during the merge window and
enabling of a few features that had to wait for the driver
dependencies to clear.
The fixes included are:
- Fix am43xx hard reset flags
- Fix SoC detection for DRA722
- Fix CPU OPP table for omap5
- Fix legacy mux parser bug if requested muxname is a prefix of
multiple mux entries
- Fix qspi interrupt binding that relies on the irq crossbar
that has not yet been enabled
- Add missing phy_sel for am43x-epos-evm
- Drop unused gic_init_irq() that is no longer needed
And the enabling of features that had driver dependencies are:
- Change dra7 to use Audio Tracking Logic clock instead of a fixed
clock now that the clock driver for it has been merged
- Enable off idle configuration for selected omaps as all the kernel
dependencies for device tree based booting are finally merged as
this is needed to get the automated PM tests working finally with
device tree based booting
- Add hwmod entry for ocp2scp3 for omap5 to get sata working as
all the driver dependencies are now in the kernel and this patch
fell through the cracks during the merge window
* tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra7-evm: remove interrupt binding
ARM: OMAP2+: Fix parser-bug in platform muxing code
ARM: DTS: dra7/dra7xx-clocks: ATL related changes
ARM: OMAP2+: drop unused function
ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm
ARM: dts: omap5: Update CPU OPP table as per final production Manual
ARM: DRA722: add detection of SoC information
ARM: dts: Enable twl4030 off-idle configuration for selected omaps
ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
pwm-cells should be 3. Third cell is optional PWM flags. And This flag
supported by this binding is PWM_POLARITY_INVERTED.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit 1754c42e3db5("ARM: exynos: move sysram info to exynos.c") missed
out the CONFIG_ prefix causing exynos_sysram_init() to get called twice
for SMP configurations.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@samsug.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Without the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
532000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
532000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div # cat clk_rate
532000000
With the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
532000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
266000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div # cat clk_rate
133000000
The l3 clock derived from core DPLL is actually a divider clock,
with the default divider set to 2. l4 then derived from l3 is a fixed factor
clock, but the fixed divider is 2 and not 1. Which means the l3 clock is
half of core DPLLs h12x2 and l4 is half of l3 (as seen with this patch)
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Conditionally compile kprobes test cases for ARMv5 instructions to avoid
compilation errors with ARMv4 targets like:
/tmp/cc7Tx8ST.s:16740: Error: selected processor does not support ARM mode `clz r0,r0'
Signed-off-by: Jon Medhurst <tixy@linaro.org>
