sh73a0 has divisor[12] setting as 1/7 on FRQCRA.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch improves the state of the AG5 clock
framework support. The main clock parent is
automatically detected, but most of the clocks
are not used by any driver or subsystem at this
point. More work is needed for support of multi
media hardware such as FSI and/or LCDC/MIPI-DSI.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch permuted clock arrays in the order of MSTP
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Just add port multiplex settings to enable i2c modules.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This consists of platform device resources/data for the board, and
simple clvdev entry for MSTP bit for keysc module.
This support only 49 of 80 key-switches on the board.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Ag5evm board now uses gpio api to initialize pins and peripherals.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
PFC definitions for sh73a0 to support GPIO and pinmux handling.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the entry macros are all globbed together, this simply splits
them out in to their insular variants. Future work such as the GIC
generalization will replace some of these and tidy the abstraction up
further.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds initial support for Renesas SH-Mobile AG5.
At this point the AG5 CPU support is limited to the ARM
core, SCIF serial and a CMT timer together with L2 cache
and the GIC. The AG5EVM board also supports Ethernet.
Future patches will add support for GPIO, INTCS, CPGA
and platform data / driver updates for devices such as
IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.
The code in entry-macro.S will be cleaned up when the
ARM IRQ demux code improvements have been merged.
Depends on the AG5EVM mach-type recently registered but
not yet present in arch/arm/tools/mach-types.
As the AG5EVM board comes with 512MiB memory it is
recommended to turn on HIGHMEM.
Many thanks to Yoshii-san for initial bring up.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently each one of the CPUs manually selects the same feature set, and
there's a reasonable expectation that none of these will change for
future CPUs in the SH-Mobile / R-Mobile family, so we move those over to
the top-level ARCH_SHMOBILE.
While we're at it, all of the CPUs support optional GPIOs via the PFC,
do not have I/O ports, and expect sparse IRQ, so we bring the
configuration in line across the board.
This more or less brings the ARM-based parts in sync with their SH
counterparts.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
arm: omap1: devices: need to return with a value
OMAP1: camera.h: add missing include
omap: dma: Add read-back to DMA interrupt handler to avoid spuriousinterrupts
OMAP2: Devkit8000: Fix mmc regulator failure
* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: intc: Fix up build failure introduced by radix tree changes.
MAINTAINERS: update the sh git tree entry.
sh: clkfwk: fix up compiler warnings.
sh: intc: Fix up initializers for gcc 4.5.
rtc: rtc-sh - fix a memory leak
* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
ARM: mach-shmobile: ap4evb: add fsib 44100Hz rate
MAINTAINERS: update the ARM SH-Mobile git tree entry.
ARM: mach-shmobile: ap4evb: Mark NOR boot loader partitions read-only.
ARM: mach-shmobile: intc-sh7372: fix interrupt number
* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: GIC: don't disable software generated interrupts
ARM: 6472/1: vexpress ct-ca9x4: only set twd_base if local timers are being used
ARM: arch/arm/kernel/traps.c: Convert sprintf_symbol to %pS
ARM: arch/arm/kernel/hw_breakpoint.c: Convert WARN_ON to WARN
ARM: 6462/1: EP93xx: Document DMA M2P API
ARM: 6470/1: atomic64: use generic implementation for OABI configurations
ARM: 6469/1: perf-events: squash compiler warning
ARM: 6468/1: backtrace: fix calculation of thread stack base
ARM: Fix DMA coherent allocator alignment
ARM: orion5x/kirkwood/mv78xx0: fix MPP configuration corner cases
[ARM] TS-78xxx NAND resource type should be IORESOURCE_MEM
ARM: pxa/saar: fix the building failure caused by typo
ARM: pxa/cm-x2xx: remove duplicate call to pxa27x_init_irq
ARM: pxa: fix the missing definition of IRQ_BOARD_END
ARM: mmp: fix cpuid detection on mmp2
[ARM] Kirkwood: restrict the scope of the PCIe reset workaround
[ARM] Kirkwood: fix timer initialization for LaCie boards
[ARM] Kirkwood: enhance TCLK detection
Software generated interrupts (SGI) are used for IPIs by the kernel.
While previous revisions of the GIC hardware were specified not to
implement enable bits for SGIs, more recent hardware is now permitted
to implement these bits in a per-CPU banked register.
The priority registers for the PPI and SGIs are also per-CPU banked
registers, so ensure that these are also appropriately initialized.
Reported-by: Scott Valentine <svalentine@concentris-systems.com>
Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is a big revert of a lot of -rc1 tidspbridge patches in order to
get the driver back into a working state. It also includes a OMAP patch
that was approved by the OMAP maintainer.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Also, don't be picky about the location, which incidentally fixes the
build since MEMBLOCK_REAL_LIMIT is gone on 2.6.37.
arch/arm/plat-omap/devices.c: In function 'omap_dsp_reserve_sdram_memblock':
arch/arm/plat-omap/devices.c:287: error: 'MEMBLOCK_REAL_LIMIT'
undeclared (first use in this function)
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
In commit bde28b84, I made the assumption that CONFIG_SMP is always set
for the quad-core ct-ca9x4 platform. As it turns out, people who aren't
using the SMP goodness are confronted with a build failure.
This patch fixes this issue by ensure that twd_base is only set if
local timers are being used (and therefore SMP support is configured).
Reported-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Get rid of the following warning:
arch/arm/mach-omap1/devices.c: In function 'omap_init_wdt':
arch/arm/mach-omap1/devices.c:298: warning: 'return' with
no value, in function returning non-void
while at that, also change:
platform_device_register();
return 0;
into:
return platform_device_register();
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This makes the loader and bootenv partitions read-only under MTD for the
on-board NOR flash.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add kernel-doc documentation for the EP93xx DMA memory to
peripheral/peripheral to memory API.
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The old apcs-gnu ABI doesn't guarantee that double words are allocated
to registers with even alignment, causing the 64-bit exclusive memory
operations to be rejected by the assembler.
This patch requires that CONFIG_AEABI is set in order to use the native
atomic operations and falls back to the generic (spinlock) code otherwise.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
armv7_pmnc_counter_has_overflowed can return uninitialised data
if an invalid counter is specified.
This patch fixes the code to return 0 in this case, which squashes
the compiler warning from GCC 4.5.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When unwinding stack frames we must take care not to unwind
areas of memory that lie outside of the known extent of the stack.
This patch fixes an incorrect calculation of the stack base where
THREAD_SIZE is added to the stack pointer after it has already
been aligned to this value. Since the ALIGN macro performs this
addition internally, we end up overshooting the base by 8k.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
An out by one bug meant that the DMA coherent allocator was aligning
to one more bit than it should, causing it to run out of available
memory quicker. Fix this.
Reported-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
#include <media/omap1_camera.h> directive is required to
compile the dependant boards (board-ams-delta for now).
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Flush the writes to IRQSTATUS_L0 register in the DMA interrupt handler by reading the register
directly after write. This prevents the spurious DMA interrupts noted when using VDD_OPP 1
Signed-off-by: Mathias Nyman <mathias.nyman@nokia.com>
Acked-by: Santosh Shilimkar <Santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following error:
>regulator: VMMC1: 1850 <--> 3150 mV at 3000 mV normal standby
>twl_reg twl_reg.6: can't register VMMC1, -22
>twl_reg: probe of twl_reg.6 failed with error -22
Signed-off-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Wrong MPP configuration would cause <cpu>_mpp_conf loop infinitely
because the mpp list iterator would not be incremented.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
The type was IORESOURCE_IO which is not what is expected by
plat_nand_probe(). This device has not worked since 2d098a72
("mtd: plat_nand: request memory resource before doing ioremap").
Signed-off-by: Michael Spang <mspang@csclub.uwaterloo.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
As non-PFC chips are added that may support IRQs, pass through to the
generic helper. This follows the the SH change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
