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Commit Graph

207 Commits

Author SHA1 Message Date
Alexander Aring
a09cd35658 ARM: bcm2835: add rpi power domain driver
This patch adds support for several power domains on Raspberry Pi,
including USB (so it can be enabled even if the bootloader didn't do
it), and graphics.

This patch is the combined work of Eric Anholt (who wrote USB support
inside of the Raspberry Pi firmware driver, and wrote the non-USB
domain support) and Alexander Aring (who separated the original USB
work out from the firmware driver).

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
2015-12-21 20:00:41 -08:00
Paul Gortmaker
e50be5cd0c drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular
The Kconfig currently controlling compilation of this code is:

drivers/soc/mediatek/Kconfig:config MTK_SCPSYS
drivers/soc/mediatek/Kconfig:   bool "MediaTek SCPSYS Support"

...meaning that it currently is not being built as a module by anyone.

Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.

Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.

Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-12-18 09:41:43 +01:00
Sascha Hauer
4688f3856d soc: mediatek: SCPSYS: Add regulator support
The power domains are supplied by regulators. Add support for them so
that the regulators are properly turned on before a domain is powered up
and turned off when a domain is powered down.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-12-18 09:41:42 +01:00
Arnd Bergmann
3081dc9eff mvebu soc for 4.5 (part 1)
- orion5x/mv78xx0 multiplatform conversion
 - legacy dove PMU support conversion
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlZq1uEACgkQCwYYjhRyO9XZ8ACdHuhMhzgLQ3lR/wUj0Eaj6udh
 AuMAn2JdAcBRYkI6B0PkPK5igJugASzQ
 =pkme
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-soc-4.5-1' of git://git.infradead.org/linux-mvebu into next/multiplatform

Merge "mvebu soc for 4.5 (part 1)" from Gregory CLEMENT:

- orion5x/mv78xx0 multiplatform conversion
- legacy dove PMU support conversion

* tag 'mvebu-soc-4.5-1' of git://git.infradead.org/linux-mvebu:
  ARM: dove: convert legacy dove to PMU support
  soc: dove: add legacy support to PMU driver
  ARM: orion5x: multiplatform support
  ARM: orion5x: clean up mach/*.h headers
  ARM: mv78xx0: multiplatform support
  ARM: mv78xx0: clean up mach/*.h headers
  ARM: orion: use SPARSE_IRQ everywhere
  ARM: orion: always use MULTI_IRQ_HANDLER
  ARM: orion: move watchdog setup to mach-orion5x

Conflicts:
	arch/arm/Kconfig
	arch/arm/mach-dove/include/mach/entry-macro.S
	arch/arm/mach-orion5x/include/mach/entry-macro.S
2015-12-16 00:57:08 +01:00
Arnd Bergmann
22ba14f41c The board and infrastructure changes for RealView
multiplatform and extended DT support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWb9LqAAoJEEEQszewGV1z1I4QAIgylTG1hftD5xCtaKsgJv5X
 pcp+eVVCeYjeO3AbknrXzBlty0u3/rDOR6n9aUn7ci63qErGi2GeoZ5glo6y3aOU
 qKo2/M0LOoP3y6SGxMjaPTTpStjKsaj2XLjHLNrSHAKXsvoFB69vnAlQh2jU+ohX
 JEl9wvkugMWicGaiooWQfG7OAf2Gb6AFAKQUfYNVNNXBTD13oQcFRgLwBKDkNlc9
 7N6yzPQDNQiauytr7Ji/49fbkiOLFSB5yllhecb37F/b56XprGvsXJTRwsQhPwbj
 ig28qu/g7LhfnkZUOTwhWH6WdyFarMlpA8oHHKrZBeGySgvdjXBVYH4IQAfhT2N9
 WSh/he+w8T2+oMVj97gLSxKiP4ugUSsBR6daq5X8NESobxFVYzmFIYQxKxOwFif4
 JDWvOKaQsRhx42iAq3CIMkh7yQsBC4tJjtyvVwHuGeC2zRlyODbBCnN4OGKDdYpJ
 +VY4kr48Yld5IxYm6J6fXOEWTcFw2n/hvEVsik5mmgw1rYivJsCcvcVxv04xZYCl
 6d13eCaSh2TfeKYs/Qf2yy3hmps4dWFcd18/xWRyFdnkCs5qGRbtgLiAQtUnQAGm
 bpaI/rYeRnnF80af2dhpZT2i0zBL9uuur7FYZDB9xsQDOkqnCYxKvSW1CfNg5Gtc
 senI3dczeTC3NtwRp4eC
 =Zhx3
 -----END PGP SIGNATURE-----

Merge tag 'realview-base-armsoc-1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/multiplatform

Merge "Realview multiplatform support" from Linus Walleij:

The board and infrastructure changes for RealView
multiplatform and extended DT support.

* tag 'realview-base-armsoc-1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: realview: add an DT SMP boot method
  ARM: realview: select SP810 and ICST for the DT variant
  soc: versatile: add support for the PB11MPCore
  clk: versatile-icst: add device tree support
  clk: versatile-icst: refactor to allocate regmap separately
  clk: versatile-icst: convert to use regmap
  ARM: realview: remove private barrier implementation
  ARM: no longer force unbuffered DMA for realview
  clk/realview: stop using machine headers
  ARM: realview: don't map undefined PCI registers
  ARM: realview: remove sparsemem hack

Conflicts:
	drivers/clk/versatile/Kconfig
2015-12-16 00:56:18 +01:00
Linus Walleij
5d87f7a314 soc: versatile: add support for the PB11MPCore
The SoC driver needs a minor update to display the correct
sysfs information for the PB11MPCore.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-15 09:42:50 +01:00
Andy Gross
1f0947fe3a soc: qcom: smd-rpm: Add existing platform support
This patch adds support for all current Qualcomm platforms which utilize
RPM over SMD.  This includes both MSM8916 and APQ8084.

Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-14 23:58:32 -06:00
Bjorn Andersson
ea7a1f275c soc: qcom: Introduce WCNSS_CTRL SMD client
The WCNSS_CTRL SMD client is used for among other things upload nv
firmware to a newly booted WCNSS chip.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08 13:19:50 -06:00
Arnd Bergmann
d9d6888feb ARM: qcom: select ARM_CPU_SUSPEND for power management
The qcom spm driver uses cpu_resume_arm(), which is not included
in the kernel in all configurations:

drivers/built-in.o: In function `qcom_cpu_spc':
:(.text+0xbc022): undefined reference to `cpu_suspend'
drivers/built-in.o: In function `qcom_cpuidle_init':
:(.init.text+0x610c): undefined reference to `cpu_resume_arm'

This adds a 'select' Kconfig statement to ensure it's always
enabled.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08 13:01:02 -06:00
Arnd Bergmann
10475d592b soc: qcom: enable smsm/smp2p modular build
The newly added smp2p and smsm drivers cannot be loadable modules
but depend on smem, which can be, and that causes a link error:

drivers/built-in.o: In function `qcom_smp2p_intr':
:(.text+0xa6e68): undefined reference to `qcom_smem_get'
drivers/built-in.o: In function `qcom_smp2p_probe':
:(.text+0xa7320): undefined reference to `qcom_smem_alloc'
:(.text+0xa736c): undefined reference to `qcom_smem_get'
drivers/built-in.o: In function `qcom_smsm_probe':
:(.text+0xa7b34): undefined reference to `qcom_smem_get'

This marks all the drivers as 'tristate' to make the Kconfig
dependency resolution work properly.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: dbb04bd7122f ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Fixes: d7387fc6add4 ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08 13:01:02 -06:00
Bjorn Andersson
50e9964141 soc: qcom: smp2p: Qualcomm Shared Memory Point to Point
Introduce the Qualcomm Shard Memory Point to Point driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08 13:01:01 -06:00
Bjorn Andersson
c97c4090ff soc: qcom: smsm: Add driver for Qualcomm SMSM
This driver exposed the Qualcomm Shared Memory State Machine bits.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08 13:01:01 -06:00
Bjorn Andersson
9460ae2ff3 soc: qcom: Introduce common SMEM state machine code
This implements a common API for handling and exposing SMP2P and SMSM
state information.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-12-08 13:01:01 -06:00
Masanari Iida
e3d132d123 treewide: Fix typos in printk
This patch fix multiple spelling typos found in
various part of kernel.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2015-12-08 14:59:19 +01:00
Russell King
67098119ab soc: dove: add legacy support to PMU driver
Add support for legacy non-DT Dove to the PMU driver, so that we can
transition the legacy support over.

[gregory.clement@free-electrons.com: removed pm_genpd_poweroff_unused]
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-08 13:19:29 +01:00
Dave Gerlach
cdd5de500b soc: ti: Add wkup_m3_ipc driver
Introduce a wkup_m3_ipc driver to handle communication between the MPU
and Cortex M3 wkup_m3 present on am335x.

This driver is responsible for actually booting the wkup_m3_rproc and
also handling all IPC which is done using the IPC registers in the control
module, a mailbox, and a separate interrupt back from the wkup_m3. A small
API is exposed for executing specific power commands, which include
configuring for low power mode, request a transition to a low power mode,
and status info on a previous transition.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-12-03 07:24:29 -08:00
Arnd Bergmann
e6b66dfb37 Few Keystone fixes for 4.4-rcx
- Fix the optional PDSP firmware loading
 	- Fix linking RAM setup for QMs
 	- Fix crash with clk_ignore_unused
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWU1+DAAoJEHJsHOdBp5c/CioP/2vx9Gj/UPRKhxdCkzPeGymr
 9FB6YnNhFNN3iKQSGXBTvbQd177bXtgRruzRuYEZDenoJKHL13FXt4zybZSKgN5m
 jeJ79M/ZCeXnh/oXHdxRekabaxpOhv3tGjp+J4dVkd9v66iTsSzh/6aAsFb+pU/Z
 fyvSUrrxL76O22d4QzeHp20C1dgjLI95HN9vrDY79xeIGbC3T1xzUNP/ljAWIfqJ
 72OkyZ+CGpiqV16o4mzSUmTCrOa7ZyDLPOJqQceZvcSFdnIjYdSK2nIgz8rIDdt6
 W4J/2TmrAwbf60xoY9X/16GjTiloHeq6vlSBEn3Tdz+zSc1x6uSUSmSXsnxEPz+C
 ss8KRd6flTNrKdhA94yWJvwotm+rpb9d2PhBbuIkw5aGxcvNtlrZANxB6Br6mXyo
 P2wapqY4k0z8xR8ZzTE7ZIXHFwZJhzeqfcBaiUkVEnaaZcUh2fJG1INZ9pLImU/m
 KBnPE9xRTfw/7tvZgR9eOIJRETtUKrsE5oMTmEWCsoyGySCy70ElPvcBdMW5Ur3O
 bB9fPcMzYadK0teuy+w6TeGQX4D0aMciE81qbeMJ7Vztp8gs/dxT6p898NhALSlC
 gf9qp0HYdc3w405aq1i0/V/8bh3W0MxVYb6+yfuVu/5v2zUrCj1ebE/2Bky6GluK
 i1LSknADk9bv8iEIeCbf
 =OC3C
 -----END PGP SIGNATURE-----

Merge tag 'keystone-fixes-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into fixes

Merge "Few Keystone fixes for 4.4-rcx" from Santosh Shilimkar:
	- Fix the optional PDSP firmware loading
	- Fix linking RAM setup for QMs
	- Fix crash with clk_ignore_unused

* tag 'keystone-fixes-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone: k2l: fix kernel crash when clk_ignore_unused is not in bootargs
  soc: ti: knav_qmss_queue: Fix linking RAM setup for queue managers
  soc: ti: use request_firmware_direct() as acc firmware is optional
2015-11-25 23:48:12 +01:00
Eddie Huang
627b655336 soc: Mediatek: Enable SCPSYS power domain driver by default
If enable Mediatek 8173 SoC, it should also enable power domain
driver. Otherwise access clk subsystem register will fail.

Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-11-24 10:15:38 -08:00
Arnd Bergmann
a262e87ff3 ARM: tegra: select USB_ULPI from EHCI rather than platform
For historic reasons, the tegra platform selects USB_ULPI from architecture
code, but that hasn't really made sense for a long time, as the only
user of that code is the Tegra EHCI driver that has its own Kconfig
symbol.

This removes the 'select' statements from mach-tegra and drivers/soc/tegra
and adds them with the device driver that actually needs them.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:47:26 +01:00
Thierry Reding
9544595262 soc/tegra: Add Tegra210 support
Also known as Tegra X1, the Tegra210 has four Cortex-A57 cores paired
with four Cortex-A53 cores in a switched configuration. It features a
GPU using the Maxwell architecture with support for DX11, SM4, OpenGL
4.5, OpenGL ES 3.1 and providing 256 CUDA cores. It supports hardware
accelerated en- and decoding of various video standards including
H.265, H.264 and VP8 at 4K resolutions and up to 60 fps.

Besides the multimedia features it also comes with a variety of I/O
controllers such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
name only a few.

Add a Kconfig option for Tegra210 to allow SoC-specific support to be
enabled for this new generation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:47:24 +01:00
Thierry Reding
099a6644f5 soc/tegra: Provide per-SoC Kconfig symbols
Move per-SoC generation Kconfig symbols to drivers/soc/tegra/Kconfig to
gather them all in a single place. This directory is a natural location
for these options since it already contains the drivers that are shared
across 32-bit and 64-bit ARM architectures.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:47:24 +01:00
Michal Morawiec
f7f2bccd1f soc: ti: knav_qmss_queue: Fix linking RAM setup for queue managers
Configure linking RAM for both queue managers also in case
when only linking RAM 0 is specified in device tree.

Currently hwqueue driver configures linking RAM(s) to be used
cooperatively by the QMs (shared mode). Therefore if both
queue managers are used then both must be configured with
exactly the same linking RAM info (base address and size)
independent of the number of linking RAM(s) specified in the
device tree.
For proper operation only one linking RAM is required and in most
cases this can be internal one as long as it is able to handle
the number of descriptors used in the system.
Current driver code however skips configuration of second
queue manager if second linking RAM is not specified.
If the configuration for the QM2 is missing there will be
a crash when it tries to push/pop descriptors from its queues.

Signed-off-by: Michal Morawiec <michal.1.morawiec.ext@nokia.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-11-23 10:36:27 -08:00
Murali Karicheri
6af1a07316 soc: ti: use request_firmware_direct() as acc firmware is optional
When firmware image for PDSP firmware is absent in the file system
the kernel boot with ramfs/nfs is stuck for 60 seconds being the
the default timeout. request_firmware_direct() is to take care of
such optional firmware loading and hence replace the call in the
driver with this API.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-11-23 10:32:44 -08:00
Linus Torvalds
b44a3d2a85 ARM: SoC driver updates for v4.4
As we've enabled multiplatform kernels on ARM, and greatly done away with
 the contents under arch/arm/mach-*, there's still need for SoC-related
 drivers to go somewhere.
 
 Many of them go in through other driver trees, but we still have
 drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
 that might be shared between ARM and ARM64 (or just in general makes
 sense to not have under the architecture directory).
 
 This branch contains mostly such code:
 
 - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate
   with power management blocks on these SoCs for use by clock, regulator and
   bus frequency drivers.
 - Allwinner Reduced Serial Bus driver, again used to communicate with PMICs.
 - Drivers for ARM's SCPI (System Control Processor). Not to be confused with
   PSCI (Power State Coordination Interface). SCPI is used to communicate with
   the assistant embedded cores doing power management, and we have yet to see
   how many of them will implement this for their hardware vs abstracting in
   other ways (or not at all like in the past).
 - To make confusion between SCPI and PSCI more likely, this release also
   includes an update of PSCI to interface version 1.0.
 - Rockchip support for power domains.
 - A driver to talk to the firmware on Raspberry Pi.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQC+cAAoJEIwa5zzehBx3jEUP/0GpxfDVanEUkudVLLe7J0RH
 CNlRan107Cw6hXRUJo7elEsuCALjccXjc1CAH4+RnNpOAeBKW97n+WU7trTv+wUZ
 sQX4SkBPKFBlgwGF2qhsi5q74gms/BrgtCa4kNb9joOYso039tlfIOPzK80DMkOm
 TkyIJdUCgFJMjCQLhX6kGT0PDcrbIjb6aA2cF3FAVeaJA7uz8lNe/eHJr3oHxIEY
 CvC651yJ2mIHQUU4BJx/AJo+wXg3dRUXNCAtBjwLRPEAzduYZXYm1ZTVIby/1q9r
 dR2KDFEuibODXmXrDBzKNJwCu/TLJEwo/1oPaEIVfY91XLKfiWUhgVqa1o1I+d9U
 XoGPibCW461qFahjQW87MfInALpCOA7/RbTNjFp+MVyipCYvkaYq7KFiYEldgFDx
 z4Qx/J4hYc2TlDWrpNiUCZMfmhwi7y+Ib+tnenYTO1eyMuw0e9mfnVdjk5iU3Pvk
 Ye4qPqpYclJruyHbYi164878+1lLaW2NCUgC3rkBO/GWPAzp7d9iLWoZ3PuyD5i5
 PEjs668UcRdZYbI4rdrhGHL8Eq9Gnuc4Rthu7HxPOK+DG0XgP8r97PhM8aYGYVDO
 +yikBtjWRsA9fPj3rMKA3UsQ61DAeR9LmZ0XPGjWFMCjCG0JlUoIMaA+Uu0i8fr8
 95qxBVxbO7rhL39r1rhV
 =dm+I
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "As we've enabled multiplatform kernels on ARM, and greatly done away
  with the contents under arch/arm/mach-*, there's still need for
  SoC-related drivers to go somewhere.

  Many of them go in through other driver trees, but we still have
  drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
  that might be shared between ARM and ARM64 (or just in general makes
  sense to not have under the architecture directory).

  This branch contains mostly such code:

   - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
     communicate with power management blocks on these SoCs for use by
     clock, regulator and bus frequency drivers.

   - Allwinner Reduced Serial Bus driver, again used to communicate with
     PMICs.

   - Drivers for ARM's SCPI (System Control Processor).  Not to be
     confused with PSCI (Power State Coordination Interface).  SCPI is
     used to communicate with the assistant embedded cores doing power
     management, and we have yet to see how many of them will implement
     this for their hardware vs abstracting in other ways (or not at all
     like in the past).

   - To make confusion between SCPI and PSCI more likely, this release
     also includes an update of PSCI to interface version 1.0.

   - Rockchip support for power domains.

   - A driver to talk to the firmware on Raspberry Pi"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
  soc: qcom: smd-rpm: Correct size of outgoing message
  bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
  bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
  ARM: bcm2835: add mutual inclusion protection
  drivers: psci: make PSCI 1.0 functions initialization version dependent
  dt-bindings: Correct paths in Rockchip power domains binding document
  soc: rockchip: power-domain: don't try to print the clock name in error case
  soc: qcom/smem: add HWSPINLOCK dependency
  clk: berlin: add cpuclk
  ARM: berlin: dts: add CLKID_CPU for BG2Q
  ARM: bcm2835: Add the Raspberry Pi firmware driver
  soc: qcom: smem: Move RPM message ram out of smem DT node
  soc: qcom: smd-rpm: Correct the active vs sleep state flagging
  soc: qcom: smd: delete unneeded of_node_put
  firmware: qcom-scm: build for correct architecture level
  soc: qcom: smd: Correct SMEM items for upper channels
  qcom-scm: add missing prototype for qcom_scm_is_available()
  qcom-scm: fix endianess issue in __qcom_scm_is_call_available
  soc: qcom: smd: Reject send of too big packets
  soc: qcom: smd: Handle big endian CPUs
  ...
2015-11-10 15:00:03 -08:00
Linus Torvalds
56e0464980 ARM: SoC platform updates for v4.4
New and/or improved SoC support for this release:
 
  - Marvell Berlin:
    * Enable standard DT-based cpufreq
    * Add CPU hotplug support
  - Freescale:
    * Ethernet init for i.MX7D
    * Suspend/resume support for i.MX6UL
  - Allwinner:
    * Support for R8 chipset (used on NTC's $9 C.H.I.P board)
  - Mediatek:
    * SMP support for some platforms
  - Uniphier:
    * L2 support
    * Cleaned up SMP support, etc.
 
 + A handful of other patches around above functionality, and a few other
 smaller changes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQCmaAAoJEIwa5zzehBx3F/0QAKIYmvmJM3sUanNEEwhRilx+
 3xhSgld7e25suLGwrNapTkd8VzVB4b8GnJhNShNk+l5WqfqICHCB4Aru2NmJHY8V
 yPj5vBrgJTVMnIiH7CRDPz9IlwAkWM4MmWi4PgFuhrk1T/0wPKPNMc40OWOloTeD
 gA5YmbbX1hNOqKoI/z+DK7CEdp1lHrEjeYIbnQ0SldFzkY9NKhrI784gtcz3si6E
 19pFQ9LA7EtEv7aRcFOA0sazeooa2wiJ9P9L31Mn5APZBJj5H8HjyKdvOmJ8neQn
 +b77Tya11Q70U57uDq69l0rl58fpy650uTwYaLNGWmUdTgOiGMWN05lvIVNrQd/R
 gP+VEQDGsTH6kqOCy9gyLCmn9q9I7l0t9lwcu5TP52Xy9vqVq9rb388MkcPcsWk8
 cYPvD8RcSaywZUV3YJgbYozBfVuf5rLVus6D54pMXe3N12KGaNBt8kk4co4jBwvh
 b//1urA82cdlEAZ/kiqHXjRMq/ht+dxtb6sSVOJ9frxPLuc7g1z4ORC+Z0PTS5WC
 zB0hMzPnTwXeqHcYpV4wP/vGtgZGpLevBkK7pKVdqKZykV8BS4FiT4HFp6Rghxs3
 dxAz7JjQUle6KOX7YfuHdpLnyZFWQvLYyTn946xGKpw2QH/iWLwECpet2I87QzVs
 QkEkGygPhK4QcGccxz9N
 =h5xk
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "New and/or improved SoC support for this release:

  Marvell Berlin:
     - Enable standard DT-based cpufreq
     - Add CPU hotplug support

  Freescale:
     - Ethernet init for i.MX7D
     - Suspend/resume support for i.MX6UL

  Allwinner:
     - Support for R8 chipset (used on NTC's $9 C.H.I.P board)

  Mediatek:
     - SMP support for some platforms

  Uniphier:
     - L2 support
     - Cleaned up SMP support, etc.

  plus a handful of other patches around above functionality, and a few
  other smaller changes"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits)
  ARM: uniphier: rework SMP operations to use trampoline code
  ARM: uniphier: add outer cache support
  Documentation: EXYNOS: Update bootloader interface on exynos542x
  ARM: mvebu: add broken-idle option
  ARM: orion5x: use mac_pton() helper
  ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned
  ARM: sunxi: Add R8 support
  ARM: digicolor: select pinctrl/gpio driver
  arm: berlin: add CPU hotplug support
  arm: berlin: use non-self-cleared reset register to reset cpu
  ARM: mediatek: add smp bringup code
  ARM: mediatek: enable gpt6 on boot up to make arch timer working
  soc: mediatek: Fix random hang up issue while kernel init
  soc: ti: qmss: make acc queue support optional in the driver
  soc: ti: add firmware file name as part of the driver
  Documentation: dt: soc: Add description for knav qmss driver
  ARM: S3C64XX: Use PWM lookup table for mach-smartq
  ARM: S3C64XX: Use PWM lookup table for mach-hmt
  ARM: S3C64XX: Use PWM lookup table for mach-crag6410
  ARM: S3C64XX: Use PWM lookup table for smdk6410
  ...
2015-11-10 14:56:23 -08:00
Linus Torvalds
64fd8c8a0f ARM: SoC non-urgent fixes for v4.4
A handful of fixes that came in and didn't seem warranted to go in through
 the 4.3-rc cycle.
 
  - MAINTAINERS updates for one of the Broadcom platforms and lpc18xx
  - A couple of non-critical Davinci bugfixes
  - A fix to reset irq affinity for TI platforms (silences a warning at reboot)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWP7juAAoJEIwa5zzehBx3EVAP/AuoUkuWA/4G+ilDybXmbWls
 DDeIosQOXIriAqW9Um1aoHOTtyP2WxznoYk73xiyyR92PJkXUc/9slFU6rB6b9La
 3UZzGy6bo7jbjNOt6YI2yKrXWW2zCWhNIjfbcXeDC4+avnlYQjUKlKF/iXp26gG+
 rRs23cIBXc2lm5vxdwu/NvqpUUcxMN577RVFdW8nTqNGCZaP/buFYzm1P8dI5N0N
 KqXsJF62XbHtb911/URRLtLex3YvRqj25Jpxi2GsjzrPFALvgsW8voOKJSo3G3cH
 aXYc8b0n8i+pB1oOLBICIKpNXzcnPbnPs2gNBp63/X5Dw4oVVoaU1onQxyj08TFq
 PsQAqg5V0ym38tSnDmBa7p2sv6xoqrvXmOzx43/1JOjGVq991AlBMTJ4C4Vi8SCa
 R0+1l/YQcj9N4omDuxhyI3M9UQrDEDyxRWsOENMDh8AZ+/07uUCK5h7mHsSInPyS
 fXlORGVcAK1lIEYnOt5k8rarp+KFc+oifpaLFIIbTBhZZaDG/uT52aXkB7kj24oo
 4NFpNah8bHYzriXUkHDasZIDCS39T0otYNAXlK9hesYr0Ly0+0yQG8l+CcRbG/Mk
 07ZhEYDJvVvSb3uDi9VXLWmbAKqX5BHmBrYXPc0eP3lVPTeNkm5VYimYZeoBz/4e
 zr+W2uM8QMxVZmGEm4iH
 =iRbU
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-urgent fixes from Olof Johansson:
 "A handful of fixes that came in and didn't seem warranted to go in
  through the 4.3-rc cycle.

   - MAINTAINERS updates for one of the Broadcom platforms and lpc18xx
   - A couple of non-critical Davinci bugfixes
   - A fix to reset irq affinity for TI platforms (silences a warning at
     reboot)"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  MAINTAINERS: update lpc18xx entry with more drivers
  soc: ti: reset irq affinity before freeing irq
  ARM: cns3xxx: pci: avoid potential stack overflow
  ARM: davinci: clock: Correct return values for API functions
  ARM: davinci: re-use %*ph specifier
  MAINTAINERS: add entry for the Broadcom Northstar Plus SoCs
2015-11-10 14:45:05 -08:00
Bjorn Andersson
d13a5c8c4c soc: qcom: smd-rpm: Correct size of outgoing message
With the removal of VLAIS the size was incorrectly changed to only cover
the headers of the packet, resulting in "empty" requests being sent to
the RPM. Correct this so the entire message is transfered.

Fixes: 50e1b29b44 ("soc: qcom: smd: Remove use of VLAIS")
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-31 01:51:20 +00:00
Olof Johansson
00b24d4454 Do the initial setting of the pmic wrap interrupt before requesting the interrupt.
This fixes the corner-case where the pmic is initialized by the bootloader, but
 not the pmic watchdog.
 
 Add support for active wakeup to the scpsys. This allows to keep the power of
 a scpsys domain  during suspend state.
 
 With version v4.3 new subsystem clocks are added to the clock dirver. In late
 init the kernel turns off all unused clocks. This can provoke a hang if
 the kernel tries to access the venc and venc_lt power domain registers.
 Add the necessary parent clocks for this power domains to
 the scpsys so that no random hang happens.
 
 The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
 As there is no opensource bootloader in the near future for this architectures
 we enable the arch timer at kernel boot. We need the arch timer for SMP boot.
 
 Add support for SMP on mt6589, mt8127 and mt8135.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWI4fcAAoJELQ5Ylss8dNDANYP/1hhCHTT3ssT0eURn+gGJX/e
 f5J0dgX9KfJK7Ds0fznD6iMMHgp+EgK7WXI6vsO0VcbvokfS2KowS3NbeRKTnbTS
 gmPOWvbFooHVIhzTom3serxyc9AgpnAG7WaRNxVD0CgaufeOlgbFtmOIdxze2cdE
 S1ucq3JWJcpiCUaI3S9zRc3kkY9W/wpTEKNY98S4K3blKnWWT0sHSQxSGjoKy3wk
 f1qhVjX82FeFizVSf5Ca6iqyXSFiO9gXQWvfVnS2kZE+gO/sh4df8tg8psxVqfqK
 //3INxXhqkgkN4O3W+y3nUfSAQ5fElknnhiHaxAsl0PXFGMHROT3xtNR21syVkDh
 dge/Eu34KyROPj68UbE2MnqnQbbSl2KbHsapT4ls8LiDWJPisjhhOmWL459eIS5X
 +ycQniAxOpTgSIjYJnBwCBesru8OdfGNWRqm+SpGHyrClNtJt66/pK4AWEN2fgX4
 eI8CeZ13uiuiQNmROOKRmTzSoG7ZBQMFK4g5Cy1Dl5bkGiJaednv6HnZoWqPZ4PG
 isiOdsmiPsGB5GgvTpue996Nfc2kfHx2emr8+kxM8wejRWQJqmwLwTkX9bZ3dpFQ
 7RGK46qN34tbJH/bgrck99Zgfg7OxChTQqVL0oTEjCCABK41clDFbguJiCV8SENw
 uxtnI++cVFcUwxv7Qz0t
 =iuHl
 -----END PGP SIGNATURE-----

Merge tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc

Do the initial setting of the pmic wrap interrupt before requesting the interrupt.
This fixes the corner-case where the pmic is initialized by the bootloader, but
not the pmic watchdog.

Add support for active wakeup to the scpsys. This allows to keep the power of
a scpsys domain  during suspend state.

With version v4.3 new subsystem clocks are added to the clock dirver. In late
init the kernel turns off all unused clocks. This can provoke a hang if
the kernel tries to access the venc and venc_lt power domain registers.
Add the necessary parent clocks for this power domains to
the scpsys so that no random hang happens.

The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
As there is no opensource bootloader in the near future for this architectures
we enable the arch timer at kernel boot. We need the arch timer for SMP boot.

Add support for SMP on mt6589, mt8127 and mt8135.

* tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek:
  ARM: mediatek: add smp bringup code
  ARM: mediatek: enable gpt6 on boot up to make arch timer working
  soc: mediatek: Fix random hang up issue while kernel init
  soc: mediatek: add scpsys support active_wakeup
  soc: mediatek: Move the initial setting of pmic wrap interrupt before requesting irq.

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-23 10:22:05 -07:00
Olof Johansson
fe9990f9fd Some fixes for the new power-domain driver, including restricting
Rockchip Kconfig options, fixing a possible null-pointer and a
 typo in the dt-bindings.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWIlknAAoJEPOmecmc0R2BrTkH/3w+1ZZuvtfQmzBkPwJGJ9vJ
 zZFZLZqD0NADib8sOhFnJxTfxrhoE/Bfijqk4wPfjdKta2GABfljGbLDanQB8Yr9
 Ip+fyflQ6cd925dEuPccHMbumZep+QuSIGYjOGFIuRbbjCdOY5MB+I2Yhvognwus
 Xh4FtjS7CL6ruotmyOcMtnpNDCAvc8NSwO7xBqxYRPcgd+DY8+86cD/dUpvmD4Kr
 pGtUXkfQpAjBhV9P6RuP63gO42JD1VMb7c6idd+B/tzbJxI08CTDolwqvyujVkHf
 KeRvu7g8qKKUwL5ffOImR4tR/T2o1wDLwfxuUJXW+mIVJa72qA+h90aNOhM2iC8=
 =Qk94
 -----END PGP SIGNATURE-----

Merge tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Some fixes for the new power-domain driver, including restricting
Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.

* tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: Correct paths in Rockchip power domains binding document
  soc: rockchip: power-domain: don't try to print the clock name in error case
  soc: rockchip: Restrict to ARCH_ROCKCHIP

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-23 10:18:34 -07:00
Heiko Stuebner
c3ce5b3768 soc: rockchip: power-domain: don't try to print the clock name in error case
When we never got the the clock-reference, i.e. when IS_ERR(clk) is true,
don't try to print the clock name via %pC as this of course produces a
null-pointer-dereference in __clk_get_name().

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
2015-10-16 09:23:59 +02:00
Arnd Bergmann
73ebb85444 soc: qcom/smem: add HWSPINLOCK dependency
This fixes a build error when smem is enabled without hwspinlock:

drivers/built-in.o: In function `qcom_smem_alloc':
rockchip-efuse.c:(.text+0x7a3e4): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7a568): undefined reference to `__hwspin_unlock'
drivers/built-in.o: In function `qcom_smem_remove':
rockchip-efuse.c:(.text+0x7a5cc): undefined reference to `hwspin_lock_free'
drivers/built-in.o: In function `qcom_smem_probe':
rockchip-efuse.c:(.text+0x7a960): undefined reference to `hwspin_lock_request_specific'
rockchip-efuse.c:(.text+0x7a988): undefined reference to `of_hwspin_lock_get_id'
drivers/built-in.o: In function `qcom_smem_get':
rockchip-efuse.c:(.text+0x7aa24): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7aafc): undefined reference to `__hwspin_unlock'

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-15 23:04:11 +02:00
Arnd Bergmann
ead67421a9 Qualcomm ARM Based SoC Updates for 4.4
* Implement id_table driver matching in SMD
 * Avoid NULL pointer exception on remove of SMEM
 * Reorder SMEM/SMD configs
 * Make qcom_smem_get() return a pointer
 * Handle big endian CPUs correctly in SMEM
 * Represent SMD channel layout in structures
 * Use __iowrite32_copy() in SMD
 * Remove use of VLAIs in SMD
 * Handle big endian CPUs correctly in SMD/RPM
 * Handle big endian CPUs corretly in SMD
 * Reject sending SMD packets that are too large
 * Fix endianness issue in SCM __qcom_scm_is_call_available
 * Add missing prototype for qcom_scm_is_available()
 * Correct SMEM items for upper channels
 * Use architecture level to build SCM correctly
 * Delete unneeded of_node_put in SMD
 * Correct active/slep state flagging in SMD/RPM
 * Move RPM message ram out of SMEM DT node
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJWHrOuAAoJEFKiBbHx2RXVam0QAIgXhMTuXLNZlJaJ1bFiRqiy
 mAmGpCJl7aN9DPCYXjTzOrPHny0707fZ8lvow7KsjA0OU6JUKP2oD7uSJC9eHyRU
 Mp6B/D2LKjgURozrFsjmfOLT4M+zMtuxk9GyYiBVFT8jqTsyYnlJKbWZVP2PsbMt
 /1HMCuQj7Fe28Qv833P3DMgARRvT0tp32wvpfoVd91GSp2R1BfpDPN6jlaAX5fVz
 8AGMHBoeNSVDDA9J1+3+RZMGKB3Isx5gVodKIkopDQiJSY15Dl32nGKG/6muLdCE
 VMELu1Lsn0e5rFg6Sh8wrtSa/K3ujw929xknikM7sh3+q7bVSowJk8l8Bi/+YfvA
 uL7sjXnhXypXSi45hii+81piScxkRn9o6N7ioj9KIV4Nuciky6YNN8Zr3Ycr2Z2x
 heRz2Ln3A73Cmx4vxEq61lKNIx1qArY+171vsXy0PFQ9Qut4f3UuK6fwnPDL+csC
 ivPPuhGwKicQ2YsvmPMGxj650H7RYALTwstKBGl58y+nhmXnCBt1Ftz7u/btWwHH
 ifk7Q1qPBsxlN1RJzMOSkjJtiaHuiJY132dRROE63P4uWMGUGEWt2iHwwyJL7D0D
 qefh+j4+5/EnYExfgh/lTfNt063qV0wklrHrkvD2q/iG4jAECn1mDNBmA6cLelc5
 3f/27CR6w/XEUMXY6mQ2
 =hprv
 -----END PGP SIGNATURE-----

Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers

Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:

* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node

* tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
  soc: qcom: smem: Move RPM message ram out of smem DT node
  soc: qcom: smd-rpm: Correct the active vs sleep state flagging
  soc: qcom: smd: delete unneeded of_node_put
  firmware: qcom-scm: build for correct architecture level
  soc: qcom: smd: Correct SMEM items for upper channels
  qcom-scm: add missing prototype for qcom_scm_is_available()
  qcom-scm: fix endianess issue in __qcom_scm_is_call_available
  soc: qcom: smd: Reject send of too big packets
  soc: qcom: smd: Handle big endian CPUs
  soc: qcom: smd_rpm: Handle big endian CPUs
  soc: qcom: smd: Remove use of VLAIS
  soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
  soc: qcom: smd: Represent channel layout in structures
  soc: qcom: smem: Handle big endian CPUs
  soc: qcom: Make qcom_smem_get() return a pointer
  soc: qcom: Reorder SMEM/SMD configs
  soc: qcom: smem: Avoid NULL pointer exception on remove
  soc: qcom: smd: Implement id_table driver matching
2015-10-15 23:03:24 +02:00
Arnd Bergmann
cfd96d3e74 ARM Keystone SOC driver updates for 4.4
Documentation and support to be able to load the PDSP
 	firmware necessary for accumulator operation.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWHW8iAAoJEHJsHOdBp5c/9ywP/3Qpvy+kcnwMvwrnq/jxLlGk
 qc+gQTAMMguenYGZmIqnyLVHG9B4UUNZ6e/uiukzCxMP1SWx8KmgKNFSQonJuFVV
 wLufo+wYBTH4P8VIM5OJNkJVPqZ8YXwtVJ09LhVxYNh1vF/l6aOEQ/kaEC22f5sD
 jycgKdKx3yRn67VrWiuXS1MGXIDkGR3ABCxv6iJHSKyP15HArQ6fAhyrkfP/mNkr
 9YXIrX+vmMdsICfXG19R2z/lCuM+JadXz9Rjo9yMQwvUw+3QAHYy8m4JXb9cZFZq
 jNZnzWQj5azuxaGnLVS1UNggsEXuxmd0S1PJvdF1N2ISHVYqwCtFuLjQ2r+z4WQm
 uzo9DyPTaYtASO6iSq9MQVzKKW0r0a5dPlAJIYTJHR11xi8kOpu04KUkJUR4c1ly
 X5I9zJ7ishV1VxFUZaMJtl/nX7B18WiKZyHhtO4MqRLPFA1fjH1psA/s8vRk6l6e
 unawCOM5oT8KvuSyijTNq2sQlxgRJJW7S4F1P1iUxsA6nocaPdTV+Oi/aECt8mFQ
 Q9gFVgCTEMWBYPuVqVisfU/mmZFPRDiotknMAeM+mUF6D/DkA0NSPvNWH0LP4rrA
 kIGRHQWtJMBTdxdBhjKoCsEEk1DR0wOCTUqow77SR/H3wl1FL1EYDB2J15JD7vzM
 lVTrZzd1wRXSsHINdnY6
 =T5UX
 -----END PGP SIGNATURE-----

Merge tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc

Merge "ARM Keystone SOC driver updates for 4.4" from Santosh Shilimkar:

	Documentation and support to be able to load the PDSP
	firmware necessary for accumulator operation.

* tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: qmss: make acc queue support optional in the driver
  soc: ti: add firmware file name as part of the driver
  Documentation: dt: soc: Add description for knav qmss driver
2015-10-15 22:22:26 +02:00
Arnd Bergmann
d72b712824 Merge tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux into next/soc
Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli:

This pull request contains the following Broadcom SoC platform and driver changes:

- Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific
  code which is coming next

- Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit
  with their specific write-pairing setting, which must be saved and restored during
  system-wide suspend/resume, and consequently updates the brcmstb machine code to
  initialize the BIU

- Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine
  descriptor matching their compatible string and setting up the PL310 L2 cache and
  enabling the relevant ARM errata for their Cortex-A9

* tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux:
  ARM: brcmstb: Setup BIU control registers during boot
  soc: brcmstb: Add Bus Interface Unit control setup
  soc: add stubs for brcmstb SoC's
  ARM: NSP: Add basic support for Broadcom Northstar Plus SoC
2015-10-15 22:09:07 +02:00
Stephen Boyd
d0bfd7c9b1 soc: qcom: smem: Move RPM message ram out of smem DT node
SMEM is a software construct built on top of a DDR reserved region
and sometimes a device memory region called RPM message ram. Having
the RPM message ram in the smem DT node's reg property leads to the
smem node being located in different places depending on if the
message ram is being used or not. Let's add a qcom specific
property, qcom,rpm-msg-ram, and point to the device memory from
the SMEM node via a phandle.  As SMEM is a software construct, it
really needs to reside at the root of the DT regardless of whether
it's using the message ram or not.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:40 -05:00
Bjorn Andersson
a8ddd1b998 soc: qcom: smd-rpm: Correct the active vs sleep state flagging
The BIT() was incorrectly inherited from family A and should not be used
on family B where the state is denoted by an enum.

Reported-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:22 -05:00
Julia Lawall
6083096d96 soc: qcom: smd: delete unneeded of_node_put
Device node iterators perform an of_node_put on each iteration, so putting
an of_node_put before a continue results in a double put.

A simplified version of the semantic match that finds this problem is as
follows (http://coccinelle.lip6.fr):

// <smpl>
@@
expression root,e;
local idexpression child;
iterator i;
@@

 i(..., child, ...) {
   ... when != of_node_get(child)
*  of_node_put(child);
   ...
*  continue;
}
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:22 -05:00
Bjorn Andersson
ea4683e0b6 soc: qcom: smd: Correct SMEM items for upper channels
Update the SMEM items for the second set of SMD channels, as these where
incorrect.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:22 -05:00
Bjorn Andersson
a208ca98ff soc: qcom: smd: Reject send of too big packets
Attempting to find room for a packet that's bigger than the fifo will
never succeed and the calling process will be sleeping forever in the
loop, waiting for enough room. So fail early instead.

Reported-by: Courtney Cavin <courtney.cavin@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:21 -05:00
Stephen Boyd
24f60e3776 soc: qcom: smd: Handle big endian CPUs
The smd structures are always in little endian, but the smd
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:21 -05:00
Stephen Boyd
30b7ea5eda soc: qcom: smd_rpm: Handle big endian CPUs
The smd rpm structures are always in little endian, but this
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:21 -05:00
Stephen Boyd
50e1b29b44 soc: qcom: smd: Remove use of VLAIS
Usage of VLAIS prevents clang from compiling this file, and it
also opens us to the possibility of allocating a large structure
on the stack to the point that we blow past the limit of the
kernel stack. Remove the VLAIS and allocate a structure on the
heap with kmalloc so that we're safer and more clang friendly.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:21 -05:00
Stephen Boyd
3b781e55c6 soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
We already have a function to do this and it silences some sparse
warnings along the way.

Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:21 -05:00
Stephen Boyd
f02dc82523 soc: qcom: smd: Represent channel layout in structures
The rx and tx channel info are laid out in memory next to each
other, and there are two types of channel info structures, byte
based and word based. We have 4 pointers to these info
structures, when we really only need two to point to the
different types of structures. Encapsulate the byte based and
word based tx/rx structures in a "channel pair" structure that
describes the layout of memory and reduces the number of pointers
in the smd channel structure by two.

Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:20 -05:00
Stephen Boyd
9806884d8c soc: qcom: smem: Handle big endian CPUs
The contents of smem are always in little endian, but the smem
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:20 -05:00
Stephen Boyd
1a03964dec soc: qcom: Make qcom_smem_get() return a pointer
Passing a void ** almost always requires a cast at the call site.
Instead of littering the code with casts every time this function
is called, have qcom_smem_get() return a void pointer to the
location of the smem item. This frees the caller from having to
cast the pointer.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:20 -05:00
Stephen Boyd
7d0c8beea6 soc: qcom: Reorder SMEM/SMD configs
When I make nconfig, having the SMEM option after the SMD option
causes the configurator to get confused when I'm enabling and
disabling these options. Let's move SMEM before SMD so there's a
clear indented dependency chain.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:20 -05:00
Stephen Boyd
f8c67df71b soc: qcom: smem: Avoid NULL pointer exception on remove
Don't set a pointer to NULL and then dereference it in the next
line.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:20 -05:00
Bjorn Andersson
1a7caca20e soc: qcom: smd: Implement id_table driver matching
Implement a id_table based driver maching mechanism for drivers that
binds to fixed channels and doesn't need any additional configuration,
e.g. IPCRTR and DIAG.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-14 14:51:20 -05:00
James Liao
41b3e0f067 soc: mediatek: Fix random hang up issue while kernel init
In kernel late init, it turns off all unused clocks, which
needs to access subsystem registers such as VENC and VENC_LT.

Accessing MT8173 VENC registers needs two top clocks, mm_sel and
venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel.
So we need to keep these clocks on before accessing their registers.

This patch keeps venc_sel / venclt_sel clock on when
VENC / VENC_LT's power is on, to prevent system hang up while
accessing its registeres.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-10-14 15:34:43 +02:00
Murali Karicheri
045016902b soc: ti: qmss: make acc queue support optional in the driver
acc channels are available only if accumulator PDSP is loaded and
running in the SoC. As this requires firmware and user may not have
firmware in the file system, make the accumulator queue support
available in qmss driver optional. To use accumulator queus user needs
to add firmware to the file system and boot up kernel.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-10-13 13:49:04 -07:00
Murali Karicheri
96ee19becc soc: ti: add firmware file name as part of the driver
Currently firmware file name is included in the DTS. This is not scalable
as user has to change the DTS if they need upgrade to a new firmware.
Instead, add the firmware file name in the driver itself. As long as there
is no API change, new firmware upgrade is easy and require no driver
change. User is expected to copy the firmware image to the file system
and add a sym link to the new firmware for doing an upgrade. Driver add
a array of firmware file names to search for the available firmware blobs.
This scheme also prepare the driver for future changes to API if ever
happens. In such case it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.

Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-10-13 13:49:04 -07:00
Ulf Hansson
2376692416 soc: dove: Let genpd deal with disabling of unused PM domains
Genpd tries from a late_initcall to disable unused PM domains, which makes
it unnecessary to also manage this from any earlier phase when for example
initializing a genpd.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-12 23:27:01 +02:00
Thierry Reding
0cc598915f soc: rockchip: Restrict to ARCH_ROCKCHIP
By definition this directory contains drivers that are specific to the
Rockchip architecture. All Kconfig options should therefore depend on
ARCH_ROCKCHIP to avoid exposing these symbols on other architectures.
For example, this options currently shows up as new when doing an
incremental build on PowerPC.

Signed-off-by: Thierry Reding <treding@nvidia.com>

[add COMPILE_TEST alternative condition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-11 11:58:08 +02:00
Florian Fainelli
9a764234ee soc: brcmstb: Add Bus Interface Unit control setup
Broadcom STB SoCs (brcmstb) require an early setup of their Bus
Interface Unit control register, this needs to happen before SMP is
brought up because it affects how the CPU complex will be interfaced to
the memory controller.

Add support code which properly initializes the BIU registers based on
whether "brcm,write-pairing" is present in Device Tree, and take care of
saving and restoring credit register settings during system-wide
suspend/resume operations.

Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-10-09 13:42:16 -07:00
Arnd Bergmann
273395f0c2 Add the power-domain base-driver which currently contains
support for the rk3288 powerdomain layout but can be easily
 extended for the socs (including arm64) later on.
 A big thanks to Ceasar Wang for pulling through on this
 during 18 revisions.
 Also included is a fix to the pm-clock handling in the generic
 powerdomains to adapt it to the per-user clock handling we now
 do, Acked by Rafael Wysocki.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWFNeQAAoJEPOmecmc0R2BgHQH/RR/YS0IUPaeYhLr3FMVc47o
 GrObw1uaNaykGSV8XYIxoxQaP+MwoW7Mw6ipfw+FLmqVGRjz8ljTIcnFrgz7hly1
 CHmG6yCMjAeLh2ZMu3ge/VSQ7BdB7U690Coj5JnnfpO+Rufvu8Pp9sV+q4AH0qH2
 bEfsoBoHQldTXCA5vlvH9C0CAqLDOBXWimgLRVi5TGCJjEsQINoeqJOWTl+hHnsi
 arJs1sKBi71jFygsYXSZKIUnoZ1JUZofattPH8YgLeXNGUncEUYJsTTWYxm78ORt
 3/iP0/mnqXnoFEqrY9Whi3IVpW60gnKUdUuAD4KK9vx1feT0bwLtVf/0lpCNXf8=
 =txXq
 -----END PGP SIGNATURE-----

Merge tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Merge "Rockchip power-domain drivers for 4.4" from Heiko Stuebner:

Add the power-domain base-driver which currently contains
support for the rk3288 powerdomain layout but can be easily
extended for the socs (including arm64) later on.
A big thanks to Ceasar Wang for pulling through on this
during 18 revisions.
Also included is a fix to the pm-clock handling in the generic
powerdomains to adapt it to the per-user clock handling we now
do, Acked by Rafael Wysocki.

* tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: power-domain: Add power domain driver
  dt-bindings: add document of Rockchip power domains
  PM / clk: Do not __clk_get passed in clock-references
  dt-bindings: add power-domain header for RK3288 SoCs
2015-10-09 17:08:28 +02:00
Murali Karicheri
72affdecdd soc: ti: reset irq affinity before freeing irq
When using accumulator queue for rx side for network driver, following
warning is seen when doing a reboot command from Linux console. This
is because, affinity value is not reset before calling free_irq(). This
patch fixes this.

Deconfiguring network interfaces...
 ------------[ cut here ]-----------
 WARNING: CPU: 0 PID: 2081 at kernel/irq/manage.c:1370
__free_irq+0x208/0x214
 Modules linked in:
 CPU: 0 PID: 2081 Comm: ifconfig Not tainted 4.1.5-00908-g1049e206-dirty #1
 Hardware name: Keystone
 Backtrace:
 [<c0012b98>] (dump_backtrace) from [<c0012dbc>] (show_stack+0x18/0x1c)
 r7:c005d0a8 r6:c06e2184 r5:c06e2184 r4:00000000
 [<c0012da4>] (show_stack) from [<c04e7168>] (dump_stack+0x8c/0xcc)
 [<c04e70dc>] (dump_stack) from [<c0025944>] (warn_slowpath_common+0x88/0xb8)
 r7:c005d0a8 r6:0000055a r5:00000009 r4:0000000
 [<c00258bc>] (warn_slowpath_common) from [<c0025a18>] (warn_slowpath_null+0x
24/0x2c)
 r8:0000006c r7:ee513f60 r6:ee513f00 r5:ee611010 r4:cc873a00
 (warn_slowpath_null) from [<c005d0a8>] (__free_irq+0x208/0x214)
 [<c005cea0>] (__free_irq) from [<c005d158>] (free_irq+0x54/0xac)
 r10:00000002 r9:00000000 r8:00000000 r7:ee611010
r6:0000006c r5:00000000
  r4:ee513f00 r3:00000000
  [<c005d104>] (free_irq) from [<c02a81b0>] (knav_range_setup_acc_irq+0xb0/0x1
28)
  r7:00000001 r6:0000006c r5:ee611010 r4:00000001
  [<c02a8100>] (knav_range_setup_acc_irq) from [<c02a8248>] (knav_acc_close_qu
eue+0x20/0x24)
  r8:edd1a4c8 r7:00001000 r6:eed89980 r5:ee616650 r4:edf9d990
  [<c02a8228>] (knav_acc_close_queue) from [<c02a6160>] (knav_queue_close+0xb4
/0xb8)
  [<c02a60ac>] (knav_queue_close) from [<c0336270>] (netcp_free_navigator_reso
urces+0x1d4/0x2c0)
 r5:edd1a480 r4:00000400
 [<c033609c>] (netcp_free_navigator_resources) from
 [<c033657c>] (netcp_ndo_stop+0x220/0x230)
 r10:00008914 r9:edf34400 r8:00000000 r7:edd1a5d8 r6:edd1a480 r5:00000400
 r4:edd1a000
 [<c033635c>] (netcp_ndo_stop) from [<c03d9c80> (__dev_close_many+0x90/0xd8)
 r7:00001003 r6:00001042 r5:edb0de20 r4:edd1a000
 [<c03d9bf0>] (__dev_close_many) from [<c03d9df4>] (__dev_close+0x30/0x48)
  r5:00000001 r4:edd1a000
 [<c03d9dc4>] (__dev_close) from [<c03e175c>] (__dev_change_flags+0x9c/0x14c)
 [<c03e16c0>] (__dev_change_flags) from [<c03e182c>] (dev_change_flags+0x20/0

  r9:edf34400 r8:00000000 r7:00000000 r6:00001003 r5:edd1a138 r4:edd1a000
 [<c03e180c>] (dev_change_flags) from [<c0446f94>] (devinet_ioctl+0x680/0x754

  r9:edf34400 r8:bef6af3c r7:00000000 r6:bef6ac64 r5:edf3440c r4:00000000
 [<c0446914>] (devinet_ioctl) from [<c0448760>] (inet_ioctl+0x1a8/0x1d0)
  r10:00000000 r9:edb0c000 r8:bef6ac64 r7:00000003 r6:bef6ac64 r5:bef6ac64
  r4:00008914
 [<c04485b8>] (inet_ioctl) from [<c03c72fc>] (sock_ioctl+0x1d0/0x2a8)
 [<c03c712c>] (sock_ioctl) from [<c00eb608>] (do_vfs_ioctl+0x414/0x604)
  r7:00000003 r6:ed8b60c0 r5:bef6ac64 r4:ccc88f20
 [<c00eb1f4>] (do_vfs_ioctl) from [<c00eb834>] (SyS_ioctl+0x3c/0x64)
  r9:edb0c000 r8:bef6ac64 r7:00008914 r6:ed8b60c0 r5:00000003 r4:ed8b60c0
 [<c00eb7f8>] (SyS_ioctl) from [<c000f780>] (ret_fast_syscall+0x0/0x3c)
  r9:edb0c000 r8:c000f924 r7:00000036 r6:0007e77c r5:bef6ac64 r4:0007e7d0
 ---[ end trace f565594c905af0b4 ]---

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-08 21:29:11 +02:00
Caesar Wang
7c696693a4 soc: rockchip: power-domain: Add power domain driver
This driver is found on RK3288 SoCs.

In order to meet high performance and low power requirements, a power
management unit is designed or saving power when RK3288 in low power
mode.
The RK3288 PMU is dedicated for managing the power of the whole chip.

PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON
register. After setting the register, PMU would enter the Low Power mode.
In the low power mode, pmu will auto power on/off the specified power
domain, send idle req to specified power domain, shut down/up pll and
so on. All of above are configurable by setting corresponding registers.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>

[replace dsb() with dsb(sy) for arm64 buildability; sy is the default,
so no functional change; adapt to per-user clocks in genpd]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-06 09:53:28 +02:00
Eddie Huang
47e90154fa soc: mediatek: add scpsys support active_wakeup
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-09-27 15:18:33 +02:00
Henry Chen
bbe379fc7c soc: mediatek: Move the initial setting of pmic wrap interrupt before requesting irq.
The watchdog may not be initialized by the bootloader, even if the rest
of the pwrap is. Move the watchdog initialization out of pwrap_init() to
make sure the watchdog is always initialized and not only when the pwrap
is uninitialized.

Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-09-27 13:56:08 +02:00
Thomas Gleixner
bd0b9ac405 genirq: Remove irq argument from irq flow handlers
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-16 15:47:51 +02:00
Brian Norris
d52fad2620 soc: add stubs for brcmstb SoC's
Used on BCM7xxx Set-Top Box chips (e.g., BCM7445).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-09-14 15:44:18 -07:00
Thomas Gleixner
b838c950b3 soc: dove: Prepare irq handler for irq argument removal
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
    
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
    
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-09-14 10:30:05 +02:00
Thomas Gleixner
5230347ea7 soc: dove: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc
Search and replace done with coccinelle

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-14 10:30:05 +02:00
Linus Torvalds
d71fc239b6 ARM: SoC: late fixes and dependencies
This is a collection of a few late fixes and other misc. stuff that
 had dependencies on things being merged from other trees.
 
 The bulk of the changes are for samsung/exynos SoCs for some changes
 that needed a few minor reworks so ended up a bit late.  The others
 are mainly for qcom SoCs: a couple fixes and some DTS updates.
 
 There's one conflict with drivers/cpufreq/exynos-cpufreq.c because
 it's now been completely removed, but there were some fixes that hit
 mainline in the meantime.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIbBAABAgAGBQJV8fkAAAoJEFk3GJrT+8Zllf8P9jj3+TnvbJS/8bWoQoB7BRUZ
 LZPgi2+sBXylrBV60uQdyodiTHQUMZhbL7GvgEVG0z6yyin7nyijqNkulTbQbWmg
 WhumLNCNcs8vlZegA/corbwgcVC7FkjOP97HveTe2mgwZ+GaXj9qMRQzBsMqSXEo
 4890ZeP1nWBTP42oXOQHkNyKWFBjuERK0dTw2MXj7WE0/Ag8i7ERp76uJQdQ7V5O
 BpNRwxp3vSCky8rxbpD/avWdlspv1yZGBQyLeIreVq2YQFojvT36K8wHcf6iWBT/
 pzGGV/uZM7MnrGZdqSfVEMDHl7Z2s7Ls+sv5F6Md7ErnVDerHGRjw/6lJDjbeH7u
 trucpsuhz5yhTjpZssGHH2NT8pWxxh8M+AaNOiiH8PuYESAbPAmWLpWkn+648bIn
 P++Z90DIyfNEqnNSMHkcQYpVt8zc4g75gZfTIIsXLB+DLgzgSK8ergrfyRN/O0zj
 oFY35g3wHdgisnGve+BAW30zTZtP19TMT36OltWjIkjuRZC29PS2vkH8eTETdVXx
 01f/qcpbB1L1rXfIBjNkjx81j89XPd68JIBfctTF5QBOAGm/Dix6tj2mU/N7TNu5
 TrBmD3CXdOQbCPaoK/qWX7/b11IN/XOlGL06hhYwbSdvCVy7rNccApXvfnrDWziK
 Ly923FP1OB7h0Kk1cmo=
 =85Ck
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull late ARM SoC updates from Kevin Hilman:
 "This is a collection of a few late fixes and other misc stuff that had
  dependencies on things being merged from other trees.

  The bulk of the changes are for samsung/exynos SoCs for some changes
  that needed a few minor reworks so ended up a bit late.  The others
  are mainly for qcom SoCs: a couple fixes and some DTS updates"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
  ARM: multi_v7_defconfig: Enable PBIAS regulator
  soc: qcom: smd: Correct fBLOCKREADINTR handling
  soc: qcom: smd: Use correct remote processor ID
  soc: qcom: smem: Fix errant private access
  ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path
  ARM: dts: qcom: msm8960-cdp: Use stdout-path
  ARM: dts: qcom: msm8660-surf: Use stdout-path
  ARM: dts: qcom: ipq8064-ap148: Use stdout-path
  ARM: dts: qcom: apq8084-mtp: Use stdout-path
  ARM: dts: qcom: apq8084-ifc6540: Use stdout-path
  ARM: dts: qcom: apq8074-dragonboard: Use stdout-path
  ARM: dts: qcom: apq8064-ifc6410: Use stdout-path
  ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path
  ARM: dts: qcom: Label serial nodes for aliasing and stdout-path
  reset: ath79: Fix missing spin_lock_init
  reset: Add (devm_)reset_control_get stub functions
  ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12
  cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o
  ARM: dts: add iommu property to JPEG device for exynos4
  ARM: dts: enable SPI1 for exynos4412-odroidu3
  ...
2015-09-10 17:59:04 -07:00
Bjorn Andersson
208487a8f6 soc: qcom: smd: Correct fBLOCKREADINTR handling
fBLOCKREADINTR is masking the notification from the remote and should
hence be cleared while we're waiting the tx fifo to drain. Also change
the reset state to mask the notification, as send is the only use case
where we're interested in it.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-09-09 15:58:04 -05:00
Andy Gross
93dbed9121 soc: qcom: smd: Use correct remote processor ID
This patch fixes SMEM addressing issues when remote processors need to use
secure SMEM partitions.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
2015-09-09 15:57:09 -05:00
Andy Gross
18912806bb soc: qcom: smem: Fix errant private access
This patch corrects private partition item access.  Instead of falling back to
global for instances where we have an actual host and remote partition existing,
return the results of the private lookup.

Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-09-09 15:56:52 -05:00
Linus Torvalds
102178108e ARM: SoC driver updates for v4.3
Some releases this branch is nearly empty, others we have more stuff. It
 tends to gather drivers that need SoC modification or dependencies such
 that they have to (also) go in through our tree.
 
 For this release, we have merged in part of the reset controller tree
 (with handshake that the parts we have merged in will remain stable),
 as well as dependencies on a few clock branches.
 
 In general, new items here are:
 
 - Qualcomm driver for SMM/SMD, which is how they communicate with the
   coprocessors on (some) of their platforms
 - Memory controller work for ARM's PL172 memory controller
 - Reset drivers for various platforms
 - PMU power domain support for Marvell platforms
 - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV5Ou9AAoJEIwa5zzehBx3/k4P/jA5CVNiDvIs0GoTR3uGOuec
 MYd19oKf76reV1oL5bBSpg9uryJd3fPzK0JC/qU3pYfsCVFp2TWZD7liNpitqHyt
 2xL02gzJQgjHzL3QrxTQrOFJDO6P8Vm2k/5pI0KX1beoulHvI+iHejNryXGjSKSx
 9vbs1GPXU9IV831YOHSaMmHz727J65bbZE8Up113ctT+WbEIc1g/ihKzUgi/8xXW
 RniMxGsX8HynE3VH+UBDMbY6XkOmzZa1Wabgll735MXwIUFG1+TsvHNuGehXUski
 ySwqk67en25i0F/Q7oobLSZwCPbA6Ylxk9aOfr0AnAqOEKwgKWS+K7HkEiNMz7yh
 nt22b5SVkQ80sTCbNEkdJajOZ8oRalUae19CGxvMfVh77LmQ2sRI9iJrwXcxkt8W
 ASs6uDDAUNC5pIWfjeJE50vsDr//Hed/WtsIjenYOtb+RI1kru5iTTgp4oLPBiy5
 OeHxOfiL7gPvyZQbuPgMKAGdoGBsa/7wTM7KWJCMP6mPGHpShO8XUUsuljqKHm4w
 nBV7eZRMiIuWkjRKw4bjp7R0NVKR5sOfAkZhjCsXB0aqA/NU2zyNbViWcGCh6yj8
 3beZ93SdEdrKX6N8pPiAhGTMFA6eev8YeUHO7kM4IhC91ILjHlPpCs1pYk3pwEkO
 ABC7GyMY6Olg1pZJweEa
 =B6jn
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Some releases this branch is nearly empty, others we have more stuff.
  It tends to gather drivers that need SoC modification or dependencies
  such that they have to (also) go in through our tree.

  For this release, we have merged in part of the reset controller tree
  (with handshake that the parts we have merged in will remain stable),
  as well as dependencies on a few clock branches.

  In general, new items here are:

   - Qualcomm driver for SMM/SMD, which is how they communicate with the
     coprocessors on (some) of their platforms

   - memory controller work for ARM's PL172 memory controller

   - reset drivers for various platforms

   - PMU power domain support for Marvell platforms

   - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller
     per-SoC support"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
  ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
  ARM: tegra: Disable cpuidle if PSCI is available
  soc/tegra: pmc: Use existing pclk reference
  soc/tegra: pmc: Remove unnecessary return statement
  soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
  memory: tegra: Add Tegra210 support
  memory: tegra: Add support for a variable-size client ID bitfield
  clk: shmobile: rz: Add CPG/MSTP Clock Domain support
  clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
  clk: shmobile: Add CPG/MSTP Clock Domain support
  ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
  reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
  docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
  MIPS: ath79: Add the reset controller to the AR9132 dtsi
  reset: Add a driver for the reset controller on the AR71XX/AR9XXX
  devicetree: Add bindings for the ATH79 reset controller
  reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
  doc: dt: add documentation for lpc1850-rgu reset driver
  ...
2015-09-01 13:00:04 -07:00
Olof Johansson
5378e4665f ARM: tegra: Core SoC changes for v4.3-rc1
This contains a bit more of Tegra210 support, which is shaping up pretty
 nicely. Other than that there are a couple of cleanup patches here, too.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJVzfFHAAoJEN0jrNd/PrOhvF0QAK6TZ/mSuK5sWsF2LWY/yCk1
 sbS5NpOkP0Js+39CZFfRJXOeAlopyeA8UEAnmobyUIprYQWoK0iE4y0q+Iy6nn72
 tZdsZlz87dUM/CYjT+AyPK7aUILB1s3dLjul+Lua5mAhUCwju+HHdHgm6OI5c/GN
 4W5T3ysfF7aDy+o8a85YLPaPwhP36yTy6x3cx9lLvmFIKVgwWIn+cuOJOpaziy3W
 frh7v26Vjl5Ja8Ml1LZd5TQhWJBzsSAIr81PJnk8nNliKspASw6a+hWvTkd2vMll
 4qN9sekg55xeGk9lDJeesOmc2dmE4m1r0kg1aVcnpno/oy1k3VicHXfrI/AoN96w
 cwRPHwAny9V5wW9vR5WojyGEuGojr/tbHVPGVMAhv+nw1Vod2A9iO5yNJyOs5a96
 G6+YZNWwKJRecvQu+3SbhKKjSJoe66Ac36qTlTYjCiwVdcBceBMiqHl4sEslxLd9
 pzrI6xjBlyqBcxdBeunKi6CoSeXRVv8HqO7lKLSBDMeMJQD3utYBhGgR59B0sI6P
 sSyzPmPpv91YuXXJ2xhtRkFmBrW3KmN9ot8JgsfmzCxgef3zUa6vxOVrSGIbmWGB
 qzB4V0X8GOVoZNejFLx+LGLHXeW6wdOJ3n6vqvZjaFTTeYz9kDm9Y3EUBXxX6hzs
 ULBUWV18Nh/YDUIZIaV8
 =xo46
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

ARM: tegra: Core SoC changes for v4.3-rc1

This contains a bit more of Tegra210 support, which is shaping up pretty
nicely. Other than that there are a couple of cleanup patches here, too.

* tag 'tegra-for-4.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
  ARM: tegra: Disable cpuidle if PSCI is available
  soc/tegra: pmc: Use existing pclk reference
  soc/tegra: pmc: Remove unnecessary return statement
  soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
  soc/tegra: fuse: Add spare bit offset for Tegra210
  soc/tegra: fuse: Add spare bit offset for Tegra124
  soc/tegra: fuse: Add spare bit offset for Tegra114
  soc/tegra: fuse: Rename core_* to soc_*
  soc/tegra: fuse: Add Tegra210 support
  soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers
  soc/tegra: fuse: Restrict legacy code to 32-bit ARM
  soc/tegra: pmc: Add Tegra210 support
  soc/tegra: pmc: Restrict legacy code to 32-bit ARM
  soc/tegra: pmc: Avoid usage of uninitialized variable
  soc/tegra: Add Tegra210 support
  soc/tegra: Add Tegra132 support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-20 18:43:15 -07:00
Thierry Reding
592431b036 soc/tegra: pmc: Use existing pclk reference
The driver requests the pclk clock at probe time already and stores its
reference to it in struct tegra_pmc, so there is no need to look it up
everytime it is needed. Use the existing reference instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 16:49:58 +02:00
Thierry Reding
4a4466a6a4 soc/tegra: pmc: Remove unnecessary return statement
Functions returning no value don't need an explicit return statement.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 16:49:43 +02:00
Masahiro Yamada
7c9fd23ff1 soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
Kbuild descends into drivers/soc/tegra/ only when CONFIG_ARCH_TEGRA
is enabled. (see drivers/soc/Makefile)

$(CONFIG_ARCH_TEGRA) in drivers/soc/tegra/Makefile always evaluates
to 'y'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 16:17:40 +02:00
Olof Johansson
0bf413558e Qualcomm ARM Based SoC Updates for 4.3
* Add SMEM driver
 * Add SMD driver
 * Add RPM over SMD driver
 * Select QCOM_SCM by default
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVuSZxAAoJEFKiBbHx2RXVtmsP/i7em4uhfDnj7cwoJ0pYbCRx
 ZkbuBFPC6OdUut9Lq7Wj9b9/cGtZIKhDptyvVic0eWE26u39o2JctnqKQ2bw/uu/
 MwhTWBll6jPguY4Xb8kM0dbccPkq2vKWLu1VWwqeW4VhlB7QYYLOKaNELhW3nfPv
 y5q9qp+ykko0I7VUXNRSxI3kzbIhDKNaKlS4KupTdLRA6d7xl8PAc9O6/qEZAcK0
 S7vBlpvsAyLiGXW35bg6Oi+mGOqgfFFi1z4L9oW1UgXeMcslJ5EBWg4CvJMjb48y
 PTSlMZ+2QZTbJj7fcc7Sj/FgKrWXiFpcsxfXaSdeywlIQvvZcPAf6vuXTVHcHx32
 0AoWpsm9vW0N1tWtstoj0Lvs2A8ewQxkQyflYX+J1G0+JCZ22PbPiG7lUAVLV17u
 fTOAPp2Vcw/5v5jnpAzECp5CH9SGUuv/3yfwoN7spb+ODOOWqzYGFRCnycTTeuxo
 QYkjrUr4i/fbPsJiK3TZalZzm7X6ZI3Y1FZyiCGN/1b8XmZm7PfSB7Uf/YLFbQXM
 WuEepT3GoR17SMyApN09uV0kJXA+TSFBpY5A89QgfzjkBbOyK+dsZ3GnUuoWyjof
 G/swXEVzk7SX8LBXwBg7/BIHVWVARiedTLzvn383C/7BShO9ME/pdGHaYAjVHq8r
 BCTszTpelZ9p1qkI5hlN
 =ic0y
 -----END PGP SIGNATURE-----

Merge tag 'qcom-soc-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers

Qualcomm ARM Based SoC Updates for 4.3

* Add SMEM driver
* Add SMD driver
* Add RPM over SMD driver
* Select QCOM_SCM by default

* tag 'qcom-soc-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm:
  devicetree: soc: Add Qualcomm SMD based RPM DT binding
  soc: qcom: Driver for the Qualcomm RPM over SMD
  soc: qcom: Add Shared Memory Driver
  soc: qcom: Add device tree binding for Shared Memory Device
  drivers: qcom: Select QCOM_SCM unconditionally for QCOM_PM
  soc: qcom: Add Shared Memory Manager driver

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 15:05:06 +02:00
Russell King
44e259ac90 ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
The PMU device contains an interrupt controller, power control and
resets.  The interrupt controller is a little sub-standard in that
there is no race free way to clear down pending interrupts, so we try
to avoid problems by reducing the window as much as possible, and
clearing as infrequently as possible.

The interrupt support is implemented using an IRQ domain, and the
parent interrupt referenced in the standard DT way.

The power domains and reset support is closely related - there is a
defined sequence for powering down a domain which is tightly coupled
with asserting the reset.  Hence, it makes sense to group these two
together, and in order to avoid any locking contention disrupting this
sequence, we avoid the use of syscon or regmap.

This patch adds the core PMU driver: power domains must be defined in
the DT file in order to make use of them.  The reset controller can
be referenced in the standard way for reset controllers.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-05 18:36:49 +02:00
Matthias Brugger
9dd068a4b8 soc: mediatek: Fix SCPSYS compilation
SCPSYS driver misses the module.h include which makes it fail
when compiling with allmodconf.

This patch fixes this.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 11:12:44 +02:00
Bjorn Andersson
936f14cf4e soc: qcom: Driver for the Qualcomm RPM over SMD
Driver for the Resource Power Manager (RPM) found in Qualcomm 8974 based
devices.
The driver exposes resources that child drivers can operate on; to
implementing regulator, clock and bus frequency drivers.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-07-29 14:13:48 -05:00
Bjorn Andersson
f2ab3298fb soc: qcom: Add Shared Memory Driver
This adds the Qualcomm Shared Memory Driver (SMD) providing
communication channels to remote processors, ontop of SMEM.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-07-29 14:13:48 -05:00
Lina Iyer
23b38ceb81 drivers: qcom: Select QCOM_SCM unconditionally for QCOM_PM
Enable QCOM_SCM for QCOM power management driver

Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-07-28 15:50:17 -05:00
Bjorn Andersson
4b638df4c9 soc: qcom: Add Shared Memory Manager driver
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-07-28 15:50:16 -05:00
Thierry Reding
1dad36cdd5 soc/tegra: fuse: Add spare bit offset for Tegra210
The offset of the first spare bit register on Tegra210 is 0x380, but
account for the fixed offset of 0x100 in the fuse accessor.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:31 +02:00
Thierry Reding
82df0e5e78 soc/tegra: fuse: Add spare bit offset for Tegra124
The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:31 +02:00
Thierry Reding
b23083a9c6 soc/tegra: fuse: Add spare bit offset for Tegra114
The offset of the first spare bit register on Tegra114 is 0x280, but
account for the fixed offset of 0x100 in the fuse accessor.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:30 +02:00
Thierry Reding
03b3f4c8b7 soc/tegra: fuse: Rename core_* to soc_*
There's a mixture of core_* and soc_* prefixes for variables storing
information related to the VDD_CORE rail. Choose one (soc_*) and use it
more consistently.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:29 +02:00
Thierry Reding
0dc5a0d836 soc/tegra: fuse: Add Tegra210 support
Add Tegra210 support to the fuses driver and add Tegra210-specific
speedo definitions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:29 +02:00
Thierry Reding
7e939de1b2 soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers
Unifying the drivers makes it easier to restrict the legacy probing
paths to 32-bit ARM. This in turn will come in handy as support for
new 64-bit ARM SoCs is added.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:28 +02:00
Thierry Reding
297c4f3dcb soc/tegra: fuse: Restrict legacy code to 32-bit ARM
For backwards-compatibility with old device trees, if no APBMISC node
exists this driver hard-codes the I/O memory region. All 64-bit ARM
device tree files are recent enough that they can be required to have
this node, and therefore the legacy code path is not required.

Based on work done by Paul Walmsley <pwalmsley@nvidia.com>.

Cc: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:28 +02:00
Thierry Reding
c2fe4694d8 soc/tegra: pmc: Add Tegra210 support
Tegra210 uses a power management controller that is compatible with
earlier SoC generations but adds a couple of power partitions for new
hardware blocks.

Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:27 +02:00
Thierry Reding
7d71e90377 soc/tegra: pmc: Restrict legacy code to 32-bit ARM
For backwards-compatibility with old device trees, if no PMC node exists
this driver hard-codes the I/O memory region. All 64-bit ARM device tree
files are recent enough that they can be required to have this node, and
therefore the legacy code path is not required on 64-bit ARM.

Based on work done by Paul Walmsley <pwalmsley@nvidia.com>.

Cc: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:26 +02:00
Thierry Reding
95169cd23b soc/tegra: pmc: Avoid usage of uninitialized variable
Make sure to only drop the reference to the OF node after it's been
successfully obtained.

Fixes: 3568df3d31 ("soc: tegra: Add thermal reset (thermtrip) support to PMC")
Cc: <stable@vger.kernel.org> # v4.0+
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:20 +02:00
Thierry Reding
3a369982b8 soc/tegra: Add Tegra210 support
Add Tegra210 to the matching table for NVIDIA Tegra SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:47:59 +02:00
Thierry Reding
ad09c8c23e soc/tegra: Add Tegra132 support
Add Tegra132 to the matching table for NVIDIA Tegra SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:47:57 +02:00
Krzysztof Kozlowski
3fd4079fe2 soc: mediatek: Drop owner assignment from platform_driver
platform_driver does not need to set an owner because
platform_driver_register() will set it.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-10 16:38:44 +02:00
Sascha Hauer
c84e358718 soc: Mediatek: Add SCPSYS power domain driver
This adds a power domain driver for the Mediatek SCPSYS unit.

The System Control Processor System (SCPSYS) has several power
management related tasks in the system. The tasks include thermal
measurement, dynamic voltage frequency scaling (DVFS), interrupt
filter and lowlevel sleep control. The System Power Manager (SPM)
inside the SCPSYS is for the MTCMOS power domain control.

For now this driver only adds power domain support, the more
advanced features are not yet supported. The driver implements
the generic PM domain device tree bindings, the first user will
most likely be the Mediatek AFE audio driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-06 18:36:32 +02:00
Sascha Hauer
16a624a9c8 soc: mediatek: Add infracfg misc driver support
This adds support for some miscellaneous bits of the infracfg controller.
The mtk_infracfg_set/clear_bus_protection functions are necessary for
the scpsys power domain driver to handle the bus protection bits which
are contained in the infacfg register space.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-06 18:36:31 +02:00
Linus Torvalds
d4113f2f17 ARM: SoC: late fixes and dependencies
This is a collection of a few late fixes and other misc. stuff that
 had dependencies on things being merged from other trees.
 
 Other than the fixes, the primary feature being added is the
 conversion of some OMAP drivers to the new generic wakeirq interface.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVlXl/AAoJEFk3GJrT+8ZlDccQAJ5vxvImNvJmoqeCv+6Tkshm
 UOGtoTBWKu+1wVgvYvYWXbNL06NKtS1c/CP8CZE0V6XdLQ+EHd4RWsHyRLHi4xwS
 6qqtwVfqYwFLli++87NKqzizl01a0eImPiHl5Rwo9oFy0u81+lsivwWbCBk+Dh0n
 HtkmuKzWnKSYL3rgnApq1USL4dhbc6SbNYo0pwvZXNDTK57FrQN/2Z2Pl1FZS9RQ
 BQgnqDSdhvF5PD/fWJ5KHs2k2WDtjMMN2TgVMtMjMg2x5kSMAN6fBwi49wYgcwUz
 ndHtuHosX4BkPgDHvzIv7jRCYHeRaHOYxbPG+tzYXci4gXUUEn3i8jte91Hb3+ri
 tDcgAnod+R1SoBmSRdj/nqM7Y8Qw7Pnjo2tuKYfb1NFaX5KtjrjaaDx/09G7PD+U
 fw400HKPi4r2h11n96Y5MZUbLv9XgB9BAePmIdNLuQZabFc1DcsUOG9JbRsMArRT
 5g6Sk+Lar9FGH32fLk5sGEAroFs52YmGmLviHKiAsbBSOV751SN2AcA8NDXBuKI1
 L+hC41NslENztHTgLsmEt6YY4H/4+jW66du5GYc4ZkPd1scO2+esXDzPZ864vxo+
 rIIMnRNQHb2hGiNvImyzEt2NgelSk/xKQR5Dl6MNiKCmiyw2XHlR5UTkRRBZXDd+
 5T1KnOvKE2THuxWyWARH
 =bhUU
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late fixes and dependencies from Kevin Hilman:
 "This is a collection of a few late fixes and other misc stuff that had
  dependencies on things being merged from other trees.

  Other than the fixes, the primary feature being added is the
  conversion of some OMAP drivers to the new generic wakeirq interface"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: multi_v7_defconfig: Enable BRCMNAND driver
  ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND
  ARM: at91/dt: update udc compatible strings
  ARM: at91/dt: trivial: fix USB udc compatible string
  arm64: dts: Add APM X-Gene standby GPIO controller DTS entries
  soc: qcom: spm: Fix idle on THUMB2 kernels
  ARM: dove: fix legacy dove IRQ numbers
  ARM: mvebu: fix suspend to RAM on big-endian configurations
  ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename
  serial: 8250_omap: Move wake-up interrupt to generic wakeirq
  serial: omap: Switch wake-up interrupt to generic wakeirq
  mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
2015-07-02 14:40:49 -07:00
Linus Torvalds
75462c8a87 Replace module_platform_driver with builtin_platform driver in non modules.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVkO9lAAoJEOvOhAQsB9HWRV4P/jYrQm/S14ZfbwzqwV2w5xh+
 E1SHk+kjcLyIvG6JXknp8mlNFGFhsIZNhTq8wvYBmFHlkop9jlMqT3IwaV7y9baV
 NmxltPHVIgFhnPMBF6+nvMJVFe0oBXh3adwc02h/LcXauEPK98Na/BtAfX5nxmoy
 DO/9R+R3SxqShSHvQqM6JNu3M/xAxU7RRSMsthF3nZJfZEm5i7Sl9w6Zcmu67gEn
 KbAPmthHSzDvJZGPt6xQiR2OPvhdA2Ddxjey0/cLyl/IVd2DdUTUUHDY0lUpPd3A
 Ba6C6OaWoHbCoAVzGvXEJLP1CfuF5upTmo53FZ2+1fERzX7Co4E2xInq6qkpWK5+
 cLcqCZaxHXvmvmidrfTaJQ52dLseGAH5KsiDoR8m5RcsCMrK367V6ja5/A2UG+xW
 FVJzU7/1LRHzw17si/AcrD0Q3hFR0n6klEGS3E964fsyOuCYlSc77IspxZ7nF4QW
 cFKKweyAUdrmrlduS7rKxX4z/ne4ljbR1M82YxFVPWqg/n2cqQ4e9RQFeK8ogBe6
 ASXu6pmz03X5xoD7xPQEsVzjDDGPzGFdD/601j9cRJ0+TR9udECP776gXt+5Ml0L
 jWlhVGbt7BN64UFZ/kInGo1h6cS+JjlrBfNq6eZVQP78bZ5UWdyiupGzcLcixefN
 bnkl2MHHY/d6yk2Rs7zh
 =WLBw
 -----END PGP SIGNATURE-----

Merge tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux

Pull module_platform_driver replacement from Paul Gortmaker:
 "Replace module_platform_driver with builtin_platform driver in non
  modules.

  We see an increasing number of non-modular drivers using
  modular_driver() type register functions.  There are several downsides
  to letting this continue unchecked:

   - The code can appear modular to a reader of the code, and they won't
     know if the code really is modular without checking the Makefile
     and Kconfig to see if compilation is governed by a bool or
     tristate.

   - Coders of drivers may be tempted to code up an __exit function that
     is never used, just in order to satisfy the required three args of
     the modular registration function.

   - Non-modular code ends up including the <module.h> which increases
     CPP overhead that they don't need.

   - It hinders us from performing better separation of the module init
     code and the generic init code.

  So here we introduce similar macros for builtin drivers.  Then we
  convert builtin drivers (controlled by a bool Kconfig) by making the
  following type of mapping:

    module_platform_driver()       --->  builtin_platform_driver()
    module_platform_driver_probe() --->  builtin_platform_driver_probe().

  The set of drivers that are converted here are just the ones that
  showed up as relying on an implicit include of <module.h> during a
  pending header cleanup.  So we convert them here vs adding an include
  of <module.h> to non-modular code to avoid compile fails.  Additonal
  conversions can be done asynchronously at any time.

  Once again, an unused module_exit function that is removed here
  appears in the diffstat as an outlier wrt all the other changes"

* tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
  drivers/clk: convert sunxi/clk-mod0.c to use builtin_platform_driver
  drivers/power: Convert non-modular syscon-reboot to use builtin_platform_driver
  drivers/soc: Convert non-modular soc-realview to use builtin_platform_driver
  drivers/soc: Convert non-modular tegra/pmc to use builtin_platform_driver
  drivers/cpufreq: Convert non-modular s5pv210-cpufreq.c to use builtin_platform_driver
  drivers/cpuidle: Convert non-modular drivers to use builtin_platform_driver
  drivers/platform: Convert non-modular pdev_bus to use builtin_platform_driver
  platform_device: better support builtin boilerplate avoidance
2015-07-02 10:42:13 -07:00
Stephen Boyd
498f09bce4 soc: qcom: spm: Fix idle on THUMB2 kernels
The ifc6410 firmware always enters the kernel in ARM state from
deep idle. Use the cpu_resume_arm() wrapper instead of
cpu_resume() to property switch into the THUMB2 state when we
wake up from idle.

This fixes a problem reported by Kevin Hilman on next-20150601
where the ifc6410 fails to boot a THUMB2 kernel because the
platform's firmware always enters the kernel in ARM mode from
deep idle states.

Reported-by: Kevin Hilman <khilman@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-07-01 12:16:30 -07:00
Linus Torvalds
f5dcb68086 ARM: SoC: driver updates for v4.2
Some of these are for drivers/soc, where we're now putting
 SoC-specific drivers these days. Some are for other driver subsystems
 where we have received acks from the appropriate maintainers.
 
 Some highlights:
 
 - simple-mfd: document DT bindings and misc updates
 - migrate mach-berlin to simple-mfd for clock, pinctrl and reset
 - memory: support for Tegra132 SoC
 - memory: introduce tegra EMC driver for scaling memory frequency
 - misc. updates for ARM CCI and CCN busses
 
  Conflicts:
 	arch/arm64/boot/dts/arm/juno-motherboard.dtsi
 
  Trivial add/add conflict with our dt branch.
  Resolution: take both sides.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVi4RRAAoJEFk3GJrT+8ZljIcQAIsqxM/o0drd90xTJ6ex9h0B
 RmqVLTDgesHmBacJ+SBsa9/ybFIM1uErByftc1dmKankEQVXW3wcH7keQnoStPT2
 zTEjadHgZ/ARYjV/oG5oohjfDZpO1kECVHL8O8RmcWxgzRB3az1IW2eD+dzrga/Y
 R7K6D8rDHMADIUmv0e0DzvQEbSUYdCx3rBND1qZznwZDP3NoivLkOG5MTraccLbQ
 ouCRoZtyNYD5Lxk+BHLBepnxAa0Ggc6IjEmiUv8fF2OYdu0OruMliT4rcAtOSmzg
 2Y7pP85h8u0CxbJDkOyc+2BELyKo7Hv97XtDNNbRYABTMXdskRIadXt4Sh4mwFtM
 nvlhB4ovbIX7noECJToEkSAgmStLSUwA3R6+DVdLbeQY4uSuXuTRhiWHMyQB6va9
 CdjJDk2RE0dZ77c5ZoUnUDtBe4cULU/n4agpYkKMf/HcpnqMUwZzP4KZbbPMBpgL
 0CVTt3YrEcjoU7g0SFHhOGPSgl4yIXKU2eHEscokyFYLrS5zRWepmUEmlSoaWn+W
 p7pJE65TvOGf2xbaWI+UBeK/3ZG7XAP8qUfhsi7NS4bV6oFCk/foqsWAuru0H7OW
 2Gk8fuF0qLgE1eFWQp8BHZ4IUeytoWbnGhhHXh8zH39SKAVncOiAGDNfuEP9CyXJ
 fZFfruYrnz2emOwj2v9m
 =02Gm
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Kevin Hilman:
 "Some of these are for drivers/soc, where we're now putting
  SoC-specific drivers these days.  Some are for other driver subsystems
  where we have received acks from the appropriate maintainers.

  Some highlights:

   - simple-mfd: document DT bindings and misc updates
   - migrate mach-berlin to simple-mfd for clock, pinctrl and reset
   - memory: support for Tegra132 SoC
   - memory: introduce tegra EMC driver for scaling memory frequency
   - misc. updates for ARM CCI and CCN busses"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  drivers: soc: sunxi: Introduce SoC driver to map SRAMs
  arm-cci: Add aliases for PMU events
  arm-cci: Add CCI-500 PMU support
  arm-cci: Sanitise CCI400 PMU driver specific code
  arm-cci: Abstract handling for CCI events
  arm-cci: Abstract out the PMU counter details
  arm-cci: Cleanup PMU driver code
  arm-cci: Do not enable CCI-400 PMU by default
  firmware: qcom: scm: Add HDCP Support
  ARM: berlin: add an ADC node for the BG2Q
  ARM: berlin: remove useless chip and system ctrl compatibles
  clk: berlin: drop direct of_iomap of nodes reg property
  ARM: berlin: move BG2Q clock node
  ARM: berlin: move BG2CD clock node
  ARM: berlin: move BG2 clock node
  clk: berlin: prepare simple-mfd conversion
  pinctrl: berlin: drop SoC stub provided regmap
  ARM: berlin: move pinctrl to simple-mfd nodes
  pinctrl: berlin: prepare to use regmap provided by syscon
  reset: berlin: drop arch_initcall initialization
  ...
2015-06-26 11:54:29 -07:00
Linus Torvalds
4aa705b18b ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and
 other core platform code. Some highlights from this round:
 
 - sunxi: SMP support for A23 SoC
 - socpga: big-endian support
 - pxa: conversion to common clock framework
 - bcm: SMP support for BCM63138
 - imx: support new I.MX7D SoC
 - zte: basic support for ZX296702 SoC
 
  Conflicts:
 	arch/arm/mach-socfpga/core.h
 
 Trivial remove/remove conflict with our cleanup branch.
 Resolution: remove both sides
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
 0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
 CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
 O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
 AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
 KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
 kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
 17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
 hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
 ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
 UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
 GPeeJrJaYQsDvTrO8wjU
 =ZtPK
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform support updates from Kevin Hilman:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  Some highlights from this round:

   - sunxi: SMP support for A23 SoC
   - socpga: big-endian support
   - pxa: conversion to common clock framework
   - bcm: SMP support for BCM63138
   - imx: support new I.MX7D SoC
   - zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
  ARM: socfpga: fix build error due to secondary_startup
  MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
  ARM: ep93xx: simone: support for SPI-based MMC/SD cards
  MAINTAINERS: update Shawn's email to use kernel.org one
  ARM: socfpga: support suspend to ram
  ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
  ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
  ARM: EXYNOS: register power domain driver from core_initcall
  ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
  ARM: SAMSUNG: Constify platform_device_id
  ARM: EXYNOS: Constify irq_domain_ops
  ARM: EXYNOS: add coupled cpuidle support for Exynos3250
  ARM: EXYNOS: add exynos_get_boot_addr() helper
  ARM: EXYNOS: add exynos_set_boot_addr() helper
  ARM: EXYNOS: make exynos_core_restart() less verbose
  ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
  ...
2015-06-26 11:34:35 -07:00