KVM core expects arch code to acquire the srcu lock when calling
gfn_to_memslot and similar functions.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
The previous patch made 64-bit booke KVM build again, but Altivec
support is still not complete, and we can't prevent the guest from
turning on Altivec (which can corrupt host state until state
save/restore is implemented). Disable e6500 on KVM until this is
fixed.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Interrupt numbers defined for Book3E follows IVORs definition. Align
BOOKE_INTERRUPT_ALTIVEC_UNAVAIL and BOOKE_INTERRUPT_ALTIVEC_ASSIST to this
rule which also fixes the build breakage.
IVORs 32 and 33 are shared so reflect this in the interrupts naming.
This fixes a build break for 64-bit booke KVM.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
This patch makes legacy code on suspend/resume path being executed
conditionally, on non-DT platforms only, to fix suspend/resume of
DT-enabled systems, for which the code is inappropriate.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[olof: add #include <linux/of.h>]
Signed-off-by: Olof Johansson <olof@lixom.net>
The API requires that the GET_ONE_REG and SET_ONE_REG ioctls have this
extra information encoded in the register identifiers.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
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Merge tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM-based SoC updates for v3.11
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
* tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (27 commits)
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate
ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
ARM: shmobile: sh73a0: add CPUFreq support
ARM: shmobile: sh73a0: add support for adjusting CPU frequency
ARM: shmobile: r8a7790: add TPU PWM support
ARM: shmobile: r8a7790: Make private clock arrays static
ARM: shmobile: r8a7790: add div6 clocks
ARM: shmobile: r8a7790: add div4 clocks
ARM: shmobile: r8a7790: add main clock
ARM: shmobile: r8a7778: Register SDHI device
ARM: shmobile: r8a7778: add SDHI clock support
ARM: shmobile: r8a7778: use fixed ratio clock
ARM: shmobile: r8a7779: Add PCIe clocks
ARM: shmobile: r8a73a4: add div6 clocks
ARM: shmobile: r8a73a4: add div4 clocks
ARM: shmobile: r8a73a4: add pll clocks
ARM: shmobile: r8a73a4: add main clock
ARM: shmobile: r8a7740: add TPU PWM support
ARM: shmobile: r8a7740: Add I2C DT clock names
...
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
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Merge tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC pinmux and GPIO update for v3.11
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
* tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (132 commits)
ARM: shmobile: marzen: Use RCAR_GP_PIN macro
ARM: shmobile: lager: Initialize pinmux
ARM: shmobile: bockw: add pinctrl support
ARM: shmobile: kzm9g: tidyup FSI pinctrl
ARM: shmobile: r8a7740 pinmux platform device cleanup
ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
Revert "ARM: shmobile: Disallow PINCTRL without GPIOLIB"
pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
sh-pfc: r8a7778: add MMCIF pin groups
sh-pfc: r8a7778: add HSPI pin groups
sh-pfc: r8a7778: add I2C pin groups
pinctrl: sh-pfc: fix a typo in pfc-r8a7790
pinctrl: sh-pfc: fix r8a7790 Function Select register tables
sh-pfc: r8a7778: fixup IRQ1A settings
sh-pfc: r8a7779: add Ether pin groups
sh-pfc: r8a7778: add Ether pin groups
sh-pfc: r8a7778: add VIN pin groups
sh-pfc: sh73a0: Remove function GPIOs
sh-pfc: r8a7790: Add TPU pin groups and functions
...
Register the USB PHY device from bockw_init(), passing the platform data to it.
Set machine's init_late() method to r8a7778_init_late() in order for [EO]HCI to
get registered too...
Don't forget to add USB PENC0/1 pins to bockw_pinctrl_map[].
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In prima2, some functions of checking DT is registered in initcall
level. If it doesn't match the compatible name of sirf, kernel
will panic. It blocks the usage of multiplatform on other verndor.
The error message is in below.
Knic - not syncing: unable to find compatible pwrc node in dtb
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86
[<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1)
[<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8)
[<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x)
[<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal)
[<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab)
[<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0)
[<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c)
Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add USB clock and EHCI, OHCI, and USB PHY platform devices for R8A7778 SoC; add
a function to register PHY device with board-specific platform data and register
EHCI and OHCI platfrom devices from the init_late() board method.
Also, don't forget to enable CONFIG_ARCH_HAS_[EO]HCI options for R8A7778 SoC in
Kconfig...
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since we're now going to setup the USBPCTRL0 register using the USB PHY device's
platform data, we now need a way to pass those platform data from the board file
to the device which is situated in setup-r8a7779.c -- and what I'm suggesting is
r8a7779_add_usb_phy_device() that will register USB PHY platform device with the
passed platform data using platform_device_register_resndata() call; creating
this function involves deletion of 'usb_phy_device' from r8a7779_devices_dt[],
so that it will no longer be registered for the generic R8A7779 machine (where
we can't provide the platform data anyway), hence EHCI/OHCI drivers will fail
to load as well.
For the Marzen board, this new function will be called from marzen_init() to
register the USB PHY device early enough.
Note that the board and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The memory region that is used by the driver overlaps EHCI and OHCI register
regions for absolutely no reason now -- fix it by adding offset of 0x800 to
the base address, changing the register #define's accordingly. This has extra
positive effect that we now can use devm_ioremap_resource()...
Note that the driver and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that 'drivers/usb/phy/phy-rcar-usb.c' doesn't require the second memory
resource anymore, we can remove it from the R8A7779's USB PHY platform device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Setup the EHCI internal buffer (before EHCI driver has a chance to touch the
registers) using the pre_setup() method in 'struct usb_ehci_pdata'.
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
USB EHCI, OHCI, and common PHY are the SoC devices but are wrongly defined and
registered in the Marzen board file. Move the data and code to their proper
place in setup-r8a7779.c; while at it, we have to rename r8a7779_late_devices[]
to r8a7779_standard_devices[] -- this seems legitimate since they are registered
from r8a7779_add_standard_devices() anyway.
Note that I'm deliberately changing the USB PHY platform device's 'id' field
from (previously just omitted) 0 to -1 as the device is a single of its kind.
Note also that the board and SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit 524219146a (ARM: shmobile:
R8A7778: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit dace48d04d (ARM: shmobile:
R8A7779: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This branch acts as a base for adding USB support to
r8A7778/BOCK-W and r8A7779/Marzen.
It includes the soc branch to provide dependencies in
the r8A7778 clock code.
It includes pinmux to provide pinmux initialisation for Bock-W
which is a dependency.
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
This patch reworks the UEFI anti-bricking code, including an effective
reversion of cc5a080c and 31ff2f20. It turns out that calling
QueryVariableInfo() from boot services results in some firmware
implementations jumping to physical addresses even after entering virtual
mode, so until we have 1:1 mappings for UEFI runtime space this isn't
going to work so well.
Reverting these gets us back to the situation where we'd refuse to create
variables on some systems because they classify deleted variables as "used"
until the firmware triggers a garbage collection run, which they won't do
until they reach a lower threshold. This results in it being impossible to
install a bootloader, which is unhelpful.
Feedback from Samsung indicates that the firmware doesn't need more than
5KB of storage space for its own purposes, so that seems like a reasonable
threshold. However, there's still no guarantee that a platform will attempt
garbage collection merely because it drops below this threshold. It seems
that this is often only triggered if an attempt to write generates a
genuine EFI_OUT_OF_RESOURCES error. We can force that by attempting to
create a variable larger than the remaining space. This should fail, but if
it somehow succeeds we can then immediately delete it.
I've tested this on the UEFI machines I have available, but I don't have
a Samsung and so can't verify that it avoids the bricking problem.
Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
Signed-off-by: Lee, Chun-Y <jlee@suse.com> [ dummy variable cleanup ]
Cc: <stable@vger.kernel.org>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
- xen/tmem stopped working after a certain combination of modprobe/swapon was used
- cpu online/offlining would trigger WARN_ON.
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Merge tag 'stable/for-linus-3.10-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen
Pull xen fixes from Konrad Rzeszutek Wilk:
"Two bug-fixes for regressions:
- xen/tmem stopped working after a certain combination of
modprobe/swapon was used
- cpu online/offlining would trigger WARN_ON."
* tag 'stable/for-linus-3.10-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
xen/tmem: Don't over-write tmem_frontswap_poolid after tmem_frontswap_init set it.
xen/smp: Fixup NOHZ per cpu data when onlining an offline CPU.
arch_ftrace_update_code and ftrace_modify_all_code are only
available if CONFIG_DYNAMIC_FTRACE is selected.
Fixes the following build problem on MIPS randconfig:
arch/mips/kernel/ftrace.c: In function 'arch_ftrace_update_code':
arch/mips/kernel/ftrace.c:31:2: error: implicit declaration of function
'ftrace_modify_all_code' [-Werror=implicit-function-declaration]
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5435/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The kvm_* symbols are only available if KVM is selected.
Fixes the following linking problem on a randconfig:
arch/mips/built-in.o: In function `local_flush_tlb_mm':
(.text+0x18a94): undefined reference to `kvm_local_flush_tlb_all'
arch/mips/built-in.o: In function `local_flush_tlb_range':
(.text+0x18d0c): undefined reference to `kvm_local_flush_tlb_all'
kernel/built-in.o: In function `__schedule':
core.c:(.sched.text+0x2a00): undefined reference to `kvm_local_flush_tlb_all'
mm/built-in.o: In function `use_mm':
(.text+0x30214): undefined reference to `kvm_local_flush_tlb_all'
fs/built-in.o: In function `flush_old_exec':
(.text+0xf0a0): undefined reference to `kvm_local_flush_tlb_all'
make: *** [vmlinux] Error 1
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5437/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Only an interrupt can wake the core from 'wait', enable interrupts
locally before executing 'wait'.
[ralf@linux-mips.org: This leave the race between an interrupt that's
setting TIF_NEED_RESCHEd and entering the WAIT status. but at least it's
going to bring Alchemy back from the dead, so I'm going to apply this
patch.]
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5408/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
All architectures must implement IRQ functions. Since various
dependencies on !S390 were removed, there are various drivers that can
be selected but will fail to link. Provide a dummy implementation of
these functions for the !PCI case.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org # 3.9
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
As part of the transition to DT, no board files will be used
for OMAP5. The hwmod data is gradually being transitioned
away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
has been moved to DT. Hopefully the dev_attr and clock role
data will be the next step.
Basic test logs are available here, although not for OMAP5,
since I don't have an OMAP5 board:
http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/
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Merge tag 'omap-devel-a-for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.11/omap5
Add support for the OMAP5 SoC family.
As part of the transition to DT, no board files will be used
for OMAP5. The hwmod data is gradually being transitioned
away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
has been moved to DT. Hopefully the dev_attr and clock role
data will be the next step.
Basic test logs are available here, although not for OMAP5,
since I don't have an OMAP5 board:
http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/
Pull powerpc fixes from Benjamin Herrenschmidt:
"This is purely regressions (though not all recent ones) or stable
material"
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Partial revert of "Context switch more PMU related SPRs"
powerpc/perf: Fix deadlock caused by calling printk() in PMU exception
powerpc/hw_breakpoints: Add DABRX cpu feature to fix 32-bit regression
powerpc/power8: Update denormalization handler
powerpc/pseries: Simplify denormalization handler
powerpc/power8: Fix oprofile and perf
powerpc/eeh: Don't check RTAS token to get PE addr
powerpc/pci: Check the bus address instead of resource address in pcibios_fixup_resources
Pull ARM fixes from Russell King:
"The biggest two fixes are fixing a compilation error with the
decompressor, and a problem with our __my_cpu_offset implementation.
Other changes are very trivial and small, which seems to be the way
for most -rc stuff."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier()
ARM: 7750/1: update legacy CPU ID in decompressor cache support jump table
ARM: 7743/1: compressed/head.S: work around new binutils warning
ARM: 7742/1: topology: export cpu_topology
ARM: 7737/1: fix kernel decompressor compilation error with CONFIG_DEBUG_SEMIHOSTING
In commit 59affcd I added context switching of more PMU SPRs, because
they are potentially exposed to userspace on Power8. However despite me
being a smart arse in the commit message it's actually not correct. In
particular it interacts badly with a global perf record.
We will have to do something more complicated, but that will have to
wait for 3.11.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
In commit bc09c21 "Fix finding overflowed PMC in interrupt" we added
a printk() to the PMU exception handler. Unfortunately that is not safe.
The problem is that the PMU exception may run even when interrupts are
soft disabled, aka NMI context. We do this so that we can profile parts
of the kernel that have interrupts soft-disabled.
But by calling printk() from the exception handler, we can potentially
deadlock in the printk code on logbuf_lock, eg:
[c00000038ba575c0] c000000000081928 .vprintk_emit+0xa8/0x540
[c00000038ba576a0] c0000000007bcde8 .printk+0x48/0x58
[c00000038ba57710] c000000000076504 .perf_event_interrupt+0x2d4/0x490
[c00000038ba57810] c00000000001f6f8 .performance_monitor_exception+0x48/0x60
[c00000038ba57880] c0000000000032cc performance_monitor_common+0x14c/0x180
--- Exception: f01 (Performance Monitor) at c0000000007b25d4 ._raw_spin_lock_irq
+0x64/0xc0
[c00000038ba57bf0] c00000000007ed90 .devkmsg_read+0xd0/0x5a0
[c00000038ba57d00] c0000000001c2934 .vfs_read+0xc4/0x1e0
[c00000038ba57d90] c0000000001c2cd8 .SyS_read+0x58/0xd0
[c00000038ba57e30] c000000000009d54 syscall_exit+0x0/0x98
--- Exception: c01 (System Call) at 00001fffffbf6f7c
SP (3ffff6d4de10) is in userspace
Fix it by making sure we only call printk() when we are not in NMI
context.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Cc: <stable@vger.kernel.org> # 3.9
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
When introducing support for DABRX in 4474ef0, we broke older 32-bit CPUs
that don't have that register.
Some CPUs have a DABR but not DABRX. Configuration are:
- No 32bit CPUs have DABRX but some have DABR.
- POWER4+ and below have the DABR but no DABRX.
- 970 and POWER5 and above have DABR and DABRX.
- POWER8 has DAWR, hence no DABRX.
This introduces CPU_FTR_DABRX and sets it on appropriate CPUs. We use
the top 64 bits for CPU FTR bits since only 64 bit CPUs have this.
Processors that don't have the DABRX will still work as they will fall
back to software filtering these breakpoints via perf_exclude_event().
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reported-by: "Gorelik, Jacob (335F)" <jacob.gorelik@jpl.nasa.gov>
cc: stable@vger.kernel.org (v3.9 only)
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
POWER8 can take a denormalisation exception on any VSX registers.
This does the extra 32 VSX registers we don't currently handle.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
The following simplifies the denorm code by using macros to generate the long
stream of almost identical instructions.
This patch results in no changes to the output binary, but removes a lot of
lines of code.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
In 2ac6f42 powerpc/cputable: Fix oprofile_cpu_type on power8
we broke all power8 hw events.
This reverts this change and uses oprofile_type instead. Perf now works
on POWER8 again and oprofile will revert to using timers on POWER8.
Kudos to mpe this fix.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
RTAS token "ibm,get-config-addr-info" or ibm,get-config-addr-info2"
are used to retrieve the PE address according to PCI address, which
made up of domain/bus/slot/function. If we don't have those 2 tokens,
the domain/bus/slot/function would be used as the address for EEH
RTAS operations. Some older f/w might not have those 2 tokens and
that blocks the EEH functionality to be initialized. It was introduced
by commit e2af155c ("powerpc/eeh: pseries platform EEH initialization").
The patch skips the check on those 2 tokens so we can bring up EEH
functionality successfully. And domain/bus/slot/function will be
used as address for EEH RTAS operations.
Cc: <stable@vger.kernel.org> # v3.4+
Reported-by: Robert Knight <knight@princeton.edu>
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Tested-by: Robert Knight <knight@princeton.edu>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
If a BAR has the value of 0, we would assume that it is unset yet and
then mark the resource as unset and would reassign it later. But after
commit 6c5705fe (powerpc/PCI: get rid of device resource fixups)
the pcibios_fixup_resources is invoked after the bus address was
translated to linux resource. So the value of res->start is resource
address. And since the resource and bus address may be different, we
should translate it to the bus address before doing the check.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
EHRPWM module requires explicit clock gating of TBCLK from control
module. Hence add TBCLK clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
[bigeasy: remove CK_AM33XX]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We don't need multiple aliases for the OMAP USB host clocks and neither
the dummy clocks so remove them.
CC: Paul Walmsley <paul@pwsan.com>
CC: Rajendra Nayak <rnayak@ti.com>
CC: Benoit Cousson <b-cousson@ti.com>
CC: Mike Turquette <mturquette@linaro.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
[paul@pwsan.com: updated against v3.10-rc4]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
GFX has a reset status register (PRM_GFX.RM_GFX_RSTST),
so update the GFX hwmod data with .rstst_off and .st_shift
information.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Another week, another batch of fixes for arm-soc platforms.
Nothing controversial here, a handful of fixes for regressions and/or
serious problems across several of the platforms. Things are slowing
down nicely on fix rates for 3.10.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another week, another batch of fixes for arm-soc platforms.
Nothing controversial here, a handful of fixes for regressions and/or
serious problems across several of the platforms. Things are slowing
down nicely on fix rates for 3.10"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
ARM: mxs: icoll: Fix interrupts gpio bank 0
ARM: imx: clk-imx6q: AXI clock select index is incorrect
ARM: bcm2835: override the HW UART periphid
ARM: mvebu: Fix bug in coherency fabric low level init function
ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
ARM: ux500: Only configure wake-up reasons on ux500 based platforms
ARM: dts: imx: fix clocks for cspi
ARM i.MX6q: fix for ldb_di_sels
Pull MIPS fixes from Ralf Baechle:
"MIPS fixes across the field. The only area that's standing out is the
exception handling which received it's dose of breakage as part of the
microMIPS patchset"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: ralink: add missing SZ_1M multiplier
MIPS: Compat: Fix cputime_to_timeval() arguments in compat binfmt_elf.
MIPS: OCTEON: Improve _machine_halt implementation.
MIPS: rtlx: Fix implicit declaration of function set_vi_handler()
MIPS: Trap exception handling fixes
MIPS: Quit exposing Kconfig symbols in uapi headers.
MIPS: Remove duplicate definition of check_for_high_segbits.
Pull m68knommu fix from Greg Ungerer:
"A single fix for compilation breakage to many of the ColdFire CPU
targets"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
m68k: only use local gpio_request_one if not using GPIOLIB
Include the OMAP5 data files in build. Initialise the voltage, power,
clock domains.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add voltagedomain related data for OMAP54XX SOCs. OMAP4 OPP data is
used for now. OMAP5 OPP data will be added as part of OMAP5 DVFS
support.
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Adding the hwmod data for OMAP54xx SOCs.
Additional changes done on top of initial SOC data files.
- The IO resource information like dma request lines, irq number and
ocp address space can be populated via dt blob. So such data is stripped
from OMAP5 SOC hwmod data file.
- SDMA IO resource information is still kept since dmaengine work
is till ongoing. Once the legacy dma platform driver becomes obsolete,
SDMA io space information can be removed.
- The devices like dss, aess, usb which are missing the device tree bindings,
hwmod data is not added since OMAP5 is DT only build. When such devices add
the dt bindings, respective hwmod data can be added along with it.
With above update, we now need about ~2000 loc vs ~6000 loc with previous
version of the patch for OMAP5 hwmod data file. Ofcourse with addition of
few more drivers it can go upto ~2400 loc which is still better than the
earlier version.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the data file to describe all power domains inside the OMAP54XX soc.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[santosh.shilimkar@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the data file to describe all clock domains inside the OMAP54XX soc.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[santosh.shilimkar@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 reuses OMAP4 MPU PRCM IP block which lets us re-use functions.
So move the function prototypes from prcm_mpu44xx.h to prcm_mpu_44xx_54xx.h
header. The suggestion came from Paul Walmsley as part of the
OMAP5 data file review.
This is preparatory patch to add OMAP5 MPU PRCM data file.
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 reuses OMAP4 CM IP block which lets us re-use CM1/CM2 functions.
So move the function prototypes from cm1_44xx.h, cm2_44xx.h to
cm_prm44xx_54xx.h header. The suggestion came from Paul Walmsley
as part of the OMAP5 data file review.
This is preparatory patch to add OMAP5 CM data file.
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 reuses OMAP4 PRM IP block which lets us re-use PRM functions.
So move the function prototypes from prm44xx.h to prm44xx_54xx.h
header. The suggestion came from Paul Walmsley as part of the
OMAP5 data file review.
This is preparatory patch to add OMAP5 PRM data file.
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
- One device tree fix for all spi node to have per clock added.
The clock is needed by spi driver to calculate bit rate divisor.
The spi node in the current device trees either does not have the
clock or is defined as dummy clock, in which case the driver probe
will fail or spi will run at a wrong bit rate.
- Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.
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Merge tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.10, take 2:
- One device tree fix for all spi node to have per clock added.
The clock is needed by spi driver to calculate bit rate divisor.
The spi node in the current device trees either does not have the
clock or is defined as dummy clock, in which case the driver probe
will fail or spi will run at a wrong bit rate.
- Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.
* tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: clk-imx6q: AXI clock select index is incorrect
ARM: dts: imx: fix clocks for cspi
ARM i.MX6q: fix for ldb_di_sels
Signed-off-by: Olof Johansson <olof@lixom.net>
If the early MMU mapping of the UART happens to get booted out of the
TLB between the start of paging_init() and when we finally re-add the
UART at the very end of s3c_init_cpu(), we'll get a hang at bootup if
we've got early_printk enabled. Avoid this hang by calling
debug_ll_io_init() early.
Without this patch, you can reliably reproduce a hang when early
printk is enabled by adding flush_tlb_all() at the start of
exynos_init_io(). After this patch the hang goes away.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
This avoids conflicts when the USB_OVCn pins are used by another function.
This has been observed to be a problem in v3.10-rc1.
* Update CMT clock rating for sh73a0 SoC to resolve boot failure
on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
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Merge tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
This avoids conflicts when the USB_OVCn pins are used by another function.
This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
Signed-off-by: Olof Johansson <olof@lixom.net>
Printing low-level debug messages make an assumption that the specified
UART port has been preconfigured by the bootloader. Incorrectly
specified UART port results in system getting stalled while printing the
message "Uncompressing Linux... done, booting the kernel"
This UART port number is specified through S3C_LOWLEVEL_UART_PORT. Since
the UART port might different for different board, it is not possible to
specify it correctly for every board that use a common defconfig file.
Calling this print subroutine only when DEBUG_LL fixes the problem. By
disabling DEBUG_LL in default config file, we would be able to boot
multiple boards with different default UART ports.
With this current approach, we miss the print "Uncompressing Linux...
done, booting the kernel." when DEBUG_LL is not defined.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS
at the very least.
Basic test logs for this branch are here:
http://www.pwsan.com/omap/testlogs/fixes_b_v3.10-rc/20130606093449/
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Merge tag 'omap-fixes-b-for-3.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/fixes
More OMAP hwmod and clock fixes for v3.10-rc. Fixes the AM33xx UART2.
Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS
at the very least.
Basic test logs for this branch are here:
http://www.pwsan.com/omap/testlogs/fixes_b_v3.10-rc/20130606093449/
According to the datasheet, it is not allowed to change div4 clock rates
if an earlier rate change operation is still in progress, as indicated by
a set kick bit.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
frequency" intended to replace some clock operations only for the Z-clock,
instead it replaced them for all div4 clocks, since all div4 clocks share
the same copy of clock operations. Fix this by using a separate clock
operations structure for Z-clock.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Break out the function sh73a0_init_delay() that now
gets called both for the C version of the code and
the DT -reference boards. This way we handle both
cases in the same way.
Allows us to boot with TWD only in the kernel configuration
for C board code. TWD is not yet enabled in the case of
DT -reference - this due to a dependency on CCF.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the use of the generic cpufreq-cpu0 driver on sh73a0.
Providing a regulator, a list of OPPs in DT, combined with a virtual
cpufreq-cpu0 platform device and a clock, attached to it is everything,
the cpufreq-cpu0 driver needs. The first sh73a0 platform, implementing
such CPUFreq support is kzm9g-reference.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
voltages and thus reduce power consumption.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds SDHI register function which needs id number (= 0/1/2)
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV6 clocks control each core clocks.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV4 clocks control each core clocks.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
PLL clocks are basis clock for other clock.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a73a4.
This patch adds it, and, set parent clock via CKSCR register.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add clock association for i2c0 and i2c1 for the new DT names.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When we use the ethernet device via DT setup, we need to add it
to a lookup list until this is properly handled later in a DT-only
fashion.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ether setup code position was scattering.
This patch fixes it up
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SH_CLK_SET_RATIO() will be trouble without this patch
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
PCI ROM from EFI
x86/PCI: Map PCI setup data with ioremap() so it can be in highmem
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Merge tag 'pci-v3.10-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:
"This fixes a crash when booting a 32-bit kernel via the EFI boot stub.
PCI ROM from EFI
x86/PCI: Map PCI setup data with ioremap() so it can be in highmem"
* tag 'pci-v3.10-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
x86/PCI: Map PCI setup data with ioremap() so it can be in highmem
The ranges DT entry needed by the PCIe controller is defined at the
SoC .dtsi level. However, some boards have a NOR flash, and to support
it, they need to override the SoC-level ranges property to add an
additional range. Since PCIe and NOR support came separately, some
boards were not properly changed to include the PCIe range in their
ranges property at the .dts level.
This commit fixes those platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
MPP_F6281_MASK would be previously be returned when on mv88f6282,
which would disallow some valid MPP configurations.
Commit 830f8b91 (arm: plat-orion: fix printing of "MPP config
unavailable on this hardware") made this problem visible as an invalid
MPP configuration is now correctly detected and not applied.
Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Cc: <stable@vger.kernel.org> # v3.9.x
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
omap36xx_pwrdn_clk_enable_with_hsdiv_restore expects the parent hw of
the clock to be a clk_hw_omap. However, looking at cclock3xxx_data.c,
all concerned clock have parent defined as clk_divider. Fix the
function to use clk_divider. Tested with 3.9 on dm3730.
Signed-off-by: Jean-Philippe François <jp.francois@cynove.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
On RT5350 the memory size is set to Bytes and not MegaBytes due to a missing
multiplier.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5378/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
cputime_to_timeval() takes a struct timeval *as its second argument but
a struct compat_timeval * will be passed resulting in:
CC arch/mips/kernel/binfmt_elfn32.o
In file included from arch/mips/kernel/binfmt_elfn32.c:122:0:
arch/mips/kernel/../../../fs/binfmt_elf.c: In function ‘fill_prstatus’:
arch/mips/kernel/../../../fs/binfmt_elf.c:1330:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfn32.c:55:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfn32.c:122:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1331:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfn32.c:55:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfn32.c:122:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1336:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfn32.c:55:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfn32.c:122:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1337:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfn32.c:55:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfn32.c:122:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1339:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfn32.c:55:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfn32.c:122:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1340:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfn32.c:55:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
AS arch/mips/kernel/scall64-n32.o
CC arch/mips/kernel/signal_n32.o
CC arch/mips/kernel/binfmt_elfo32.o
In file included from arch/mips/kernel/binfmt_elfo32.c:165:0:
arch/mips/kernel/../../../fs/binfmt_elf.c: In function ‘fill_prstatus’:
arch/mips/kernel/../../../fs/binfmt_elf.c:1330:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfo32.c:78:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfo32.c:165:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1331:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfo32.c:78:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfo32.c:165:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1336:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfo32.c:78:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfo32.c:165:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1337:3: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfo32.c:78:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfo32.c:165:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1339:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfo32.c:78:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
In file included from arch/mips/kernel/binfmt_elfo32.c:165:0:
arch/mips/kernel/../../../fs/binfmt_elf.c:1340:2: warning: passing argument 2 of ‘cputime_to_timeval’ from incompatible pointer type [enabled by default]
In file included from include/asm-generic/cputime.h:12:0,
from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/cputime.h:4,
from include/linux/sched.h:28,
from include/linux/ptrace.h:5,
from include/uapi/linux/elfcore.h:7,
from include/linux/elfcore.h:7,
from arch/mips/kernel/binfmt_elfo32.c:78:
include/asm-generic/cputime_nsecs.h:92:91: note: expected ‘struct timeval *’ but argument is of type ‘struct compat_timeval *’
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
As noted by Wladislav Wiebe:
$ halt
..
Sent SIGKILL to all processes
Requesting system halt
[66.729373] System halted.
[66.733244]
[66.734761] =====================================
[66.739473] [ BUG: lock held at task exit time! ]
[66.744188] 3.8.7-0-sampleversion-fct #49 Tainted: G O
[66.750202] -------------------------------------
[66.754913] init/21479 is exiting with locks still held!
[66.760234] 1 lock held by init/21479:
[66.763990] #0: (reboot_mutex){+.+...}, at: [<ffffffff801776c8>] SyS_reboot+0xe0/0x218
[66.772165]
[66.772165] stack backtrace:
[66.776532] Call Trace:
[66.778992] [<ffffffff805780a8>] dump_stack+0x8/0x34
[66.783972] [<ffffffff801618b0>] do_exit+0x610/0xa70
[66.788948] [<ffffffff801777a8>] SyS_reboot+0x1c0/0x218
[66.794186] [<ffffffff8013d6a4>] handle_sys64+0x44/0x64
This is an alternative fix to the one sent by Wladislav. We kill the
watchdog for each CPU and then spin in WAIT with interrupts disabled.
This is the lowest power mode for the OCTEON. If we were to spin with
interrupts enabled, we would get a continual stream of warning messages
and backtraces from the lockup detector, so I chose to disable
interrupts.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Maxim Uvarov <muvarov@gmail.com>
Cc: Wladislav Wiebe <wladislav.kw@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/5324/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Convert code to use DEFINE_RES_MEM*() macros.
These macros were already used in this file,
this change makes their usage consistent throughout the file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The correct model name is R-Car M1A or R8A77781; R8A77780 corresponds to R-Car
M1S which is a SH based SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
To avoid further similar issues, also define the main_clks as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since the introduction of preemptible mmu_gather TLB fast mode has been
broken. TLB fast mode relies on there being absolutely no concurrency;
it frees pages first and invalidates TLBs later.
However now we can get concurrency and stuff goes *bang*.
This patch removes all tlb_fast_mode() code; it was found the better
option vs trying to patch the hole by entangling tlb invalidation with
the scheduler.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Reported-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
__my_cpu_offset is non-volatile, since we want its value to be cached
when we access several per-cpu variables in a row with preemption
disabled. This means that we rely on preempt_{en,dis}able to hazard
with the operation via the barrier() macro, so that we can't end up
migrating CPUs without reloading the per-cpu offset.
Unfortunately, GCC doesn't treat a "memory" clobber on a non-volatile
asm block as a side-effect, and will happily re-order it before other
memory clobbers (including those in prempt_disable()) and cache the
value. This has been observed to break the cmpxchg logic in the slub
allocator, leading to livelock in kmem_cache_alloc in mainline kernels.
This patch adds a dummy memory input operand to __my_cpu_offset,
forcing it to be ordered with respect to the barrier() macro.
Cc: <stable@vger.kernel.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The previous mask values for the legacy ARM CPU IDs were conflicting
with the CPU ID assignments for late-generation CPUs (like the
Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change
corrects the legacy ARM CPU ID value so that the jump table can
fall-through to the appropriate cache maintenance / MMU functions.
Signed-off-by: Marc C <marc.ceeeee@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In August 2012, Matthew Gretton-Dann checked a change into binutils
labelled "Error on obsolete & warn on deprecated registers", apparently as
part of ARMv8 support. Apparently, this was supposed to emit the message
"Warning: This coprocessor register access is deprecated in ARMv8" when
using certain mcr/mrc instructions and building for ARMv8. Unfortunately,
the message that is actually emitted appears to be '(null)', which is
less helpful in comparison.
Even more unfortunately, this is biting us on every single kernel
build with a new gas, because arch/arm/boot/compressed/head.S and some
other files in that directory are built with -march=all since kernel
commit 80cec14a8 "[ARM] Add -march=all to assembly file build in
arch/arm/boot/compressed" back in v2.6.28.
This patch reverts Russell's nice solution and instead marks the head.S
file to be built for armv7-a, which fortunately lets us build all
instructions in that file without warnings even on the broken binutils.
Without this patch, building anything results in:
arch/arm/boot/compressed/head.S: Assembler messages:
arch/arm/boot/compressed/head.S:565: Warning: (null)
arch/arm/boot/compressed/head.S:676: Warning: (null)
arch/arm/boot/compressed/head.S:698: Warning: (null)
arch/arm/boot/compressed/head.S:722: Warning: (null)
arch/arm/boot/compressed/head.S:726: Warning: (null)
arch/arm/boot/compressed/head.S:957: Warning: (null)
arch/arm/boot/compressed/head.S:996: Warning: (null)
arch/arm/boot/compressed/head.S:997: Warning: (null)
arch/arm/boot/compressed/head.S:1027: Warning: (null)
arch/arm/boot/compressed/head.S:1035: Warning: (null)
arch/arm/boot/compressed/head.S:1046: Warning: (null)
arch/arm/boot/compressed/head.S:1060: Warning: (null)
arch/arm/boot/compressed/head.S:1092: Warning: (null)
arch/arm/boot/compressed/head.S:1094: Warning: (null)
arch/arm/boot/compressed/head.S:1095: Warning: (null)
arch/arm/boot/compressed/head.S:1102: Warning: (null)
arch/arm/boot/compressed/head.S:1134: Warning: (null)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: stable@vger.kernel.org
Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cpu_topology symbol is required by any driver using the topology
interfaces, which leads to a couple of build errors:
ERROR: "cpu_topology" [drivers/net/ethernet/sfc/sfc.ko] undefined!
ERROR: "cpu_topology" [drivers/cpufreq/arm_big_little.ko] undefined!
ERROR: "cpu_topology" [drivers/block/mtip32xx/mtip32xx.ko] undefined!
The obvious solution is to export this symbol.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Cc: Nicolas Pitre <nico@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Selecting this option produces:
AS arch/arm/boot/compressed/debug.o
arch/arm/boot/compressed/debug.S:4:33: fatal error: mach/debug-macro.S: No such file or directory
compilation terminated.
make[3]: *** [arch/arm/boot/compressed/debug.o] Error 1
The semihosting support cannot be modelled into a senduart macro as
it requires memory space for argument passing. So the
CONFIG_DEBUG_LL_INCLUDE may not have any sensible value and the include
directive should be omitted.
While at it, let's add proper semihosting output support to the
decompressor.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
tegra_{set,clear}_cpu_in_lp2 can easily determine which CPU ID they are
running on; there is no need to pass the CPU ID into those functions.
So, remove their CPU ID function parameter.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Clean up the Tegra CPUidle init function by using IS_ENABLED for multi
SoCs management in the init function.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The tegra_tear_down_cpu was used to cut off the CPU rail for various Tegra
SoCs. Hooking it in the PM suspend init function and making the CPUidle
driver more generic.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
One of the state of CPUidle on Tegra can power gate the CPU and the
vdd_cpu rail. But it depends on some configurations from DT and a common
hook function for different Tegra SoCs to power gate the CPU rail. And
these stuffs are initialized after common Tegra suspend init function. So
we move the CPUidle init behind the suspend init function. And making the
CPUidle driver more generic.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The ifdef was originally added with the intent that the runtime SoC
detection code, and code to support SoCs other than Tegra20, was only
included if the kernel supported SoCs other than Tegra20. However,
the condition was somewhat backwards and did not achieve this goal.
Simply remove the ifdef to solve this, rather than creating a much more
complex version.
We also fix a typo that caused a build error due to cpu_to_csr_req being
undefined.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: rewrote commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
f9a37be0f0 ("x86: Use PCI setup data") added support for using PCI ROM
images from setup_data. This used phys_to_virt(), which is not valid for
highmem addresses, and can cause a crash when booting a 32-bit kernel via
the EFI boot stub.
pcibios_add_device() assumes that the physical addresses stored in
setup_data are accessible via the direct kernel mapping, and that calling
phys_to_virt() is valid. This isn't guaranteed to be true on x86 where the
direct mapping range is much smaller than on x86-64.
Calling phys_to_virt() on a highmem address results in the following:
BUG: unable to handle kernel paging request at 39a3c198
IP: [<c262be0f>] pcibios_add_device+0x2f/0x90
...
Call Trace:
[<c2370c73>] pci_device_add+0xe3/0x130
[<c274640b>] pci_scan_single_device+0x8b/0xb0
[<c2370d08>] pci_scan_slot+0x48/0x100
[<c2371904>] pci_scan_child_bus+0x24/0xc0
[<c262a7b0>] pci_acpi_scan_root+0x2c0/0x490
[<c23b7203>] acpi_pci_root_add+0x312/0x42f
...
The solution is to use ioremap() instead of phys_to_virt() to map the
setup data into the kernel address space.
[bhelgaas: changelog]
Tested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: Seth Forshee <seth.forshee@canonical.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@vger.kernel.org # v3.8+
When printing multi-line text using sclp_print, line endings are not
correctly handled. The routine is expecting an EBCDIC new line character
as line terminator while the input text is encoded in ASCII format.
Fix this problem by modifying sclp_print to scan for ASCII new line
characters.
Signed-off-by: Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Getting and Releasing the pgste lock has lock semantics. Make the
code an explicit barrier.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
In modify_prot_start we update the pgste value but never store it back
into the original location. Lets save the calculated result, since
modify_prot_commit will use the value of the pgste.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
git commit dc7ee00d47 "s390: lowcore stack pointer offsets"
introduced a regression in regard to show_stack(). The stack pointer
for the asynchronous and the panic stack in the lowcore now have an
additional offset applied to them. This offset needs to be taken into
account in the calculation for the low and high address for the stacks.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
When doing the transition invalid->valid in the host page table for
a guest, then the guest view of C/R is in the pgste. After validation
the view is pgste OR real key. We must zero out the real key C/R to
avoid guest over-indication for change (and reference).
Touching the real key is ok also for the host: The change bit is
tracked via write protection and the reference bit is also ok
because set_pte_at was called and the page will be touched anyway
soon. Furthermore architecture defines reference as "substantially
accurate", over- and underindication are ok.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Replace hardcoded pin numbers with the RCAR_GP_PIN macro to make the
code match the documentation.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Initialize r8a7790 pinmuxing and register mappings for the two debug
serial ports.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use DEFINE_RES_MEM() and platform_device_register_simple()
to save a couple of lines of code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"gpio-rcar: Support IRQ_TYPE_EDGE_BOTH" adds support to the R-Car GPIO
driver for IRQ_TYPE_EDGE_BOTH. As hardware support for this feature is
not universal for all SoCs a flag, has_both_edge_trigger, has been
added to the platform data of the driver to allow this feature to be
enabled.
As the r8a7790 SoC hardware supports this feature enable it.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
GPIOLIB dependency handling was added to the PINCTRL core by
commit 2afe822968
Author: Haojian Zhuang <haojian.zhuang@linaro.org>
Date: Thu Mar 28 07:34:19 2013 +0800
pinctrl: core: add dependence of GPIOLIB
There is not need to handle that dependency at the SH Mobile level
anymore. Revert
commit 6722f6cb76
Author: Magnus Damm <damm@opensource.se>
Date: Mon Mar 18 22:58:18 2013 +0900
ARM: shmobile: Disallow PINCTRL without GPIOLIB
Modify mach-shmobile to only select PINCTRL in case of
ARCH_WANT_OPTIONAL_GPIOLIB is set.
This fixes a build error triggered when adding a new SoC
lacking GPIO software support (ARCH_WANT_OPTIONAL_GPIOLIB=n):
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VCCQ MC0 power gate is now controlled by a regulator registered by
the PFC driver. Remove the corresponding function GPIO.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VCCQ MC0 power gate is now controlled by a regulator registered by
the PFC driver. Remove the corresponding function GPIO.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use DEFINE_RES_MEM() to save a couple of lines of code.
Signed-off-by: Magnus Damm <damm@opensource.se>
[lp: Don't declare r8a7779_pfc_resources as const]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move GPIOs handling from the PFC device to separate GPIO devices.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch was tested on Bock-W board
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We use the new pinctrl framework now.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull kvm bugfixes from Gleb Natapov:
"The bulk of the fixes is in MIPS KVM kernel<->userspace ABI. MIPS KVM
is new for 3.10 and some problems were found with current ABI. It is
better to fix them now and do not have a kernel with broken one"
* 'fixes' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: Fix race in apic->pending_events processing
KVM: fix sil/dil/bpl/spl in the mod/rm fields
KVM: Emulate multibyte NOP
ARM: KVM: be more thorough when invalidating TLBs
ARM: KVM: prevent NULL pointer dereferences with KVM VCPU ioctl
mips/kvm: Use ENOIOCTLCMD to indicate unimplemented ioctls.
mips/kvm: Fix ABI by moving manipulation of CP0 registers to KVM_{G,S}ET_ONE_REG
mips/kvm: Use ARRAY_SIZE() instead of hardcoded constants in kvm_arch_vcpu_ioctl_{s,g}et_regs
mips/kvm: Fix name of gpr field in struct kvm_regs.
mips/kvm: Fix ABI for use of 64-bit registers.
mips/kvm: Fix ABI for use of FPU.
Pull microblaze fixes from Michal Simek:
"One is fixing warning reported by sparse and the second warning was
reported by Geert in his build regressions/improvements status update
for -rc4."
* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Use static inline functions in cacheflush.h
microblaze: Fix sparse warnings
The xen_play_dead is an undead function. When the vCPU is told to
offline it ends up calling xen_play_dead wherin it calls the
VCPUOP_down hypercall which offlines the vCPU. However, when the
vCPU is onlined back, it resumes execution right after
VCPUOP_down hypercall.
That was OK (albeit the API for play_dead assumes that the CPU
stays dead and never returns) but with commit 4b0c0f294
(tick: Cleanup NOHZ per cpu data on cpu down) that is no longer safe
as said commit resets the ts->inidle which at the start of the
cpu_idle loop was set.
The net effect is that we get this warn:
Broke affinity for irq 16
installing Xen timer for CPU 1
cpu 1 spinlock event irq 48
------------[ cut here ]------------
WARNING: at /home/konrad/linux-linus/kernel/time/tick-sched.c:935 tick_nohz_idle_exit+0x195/0x1b0()
Modules linked in: dm_multipath dm_mod xen_evtchn iscsi_boot_sysfs
CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.10.0-rc3upstream-00068-gdcdbe33 #1
Hardware name: BIOSTAR Group N61PB-M2S/N61PB-M2S, BIOS 6.00 PG 09/03/2009
ffffffff8193b448 ffff880039da5e60 ffffffff816707c8 ffff880039da5ea0
ffffffff8108ce8b ffff880039da4010 ffff88003fa8e500 ffff880039da4010
0000000000000001 ffff880039da4000 ffff880039da4010 ffff880039da5eb0
Call Trace:
[<ffffffff816707c8>] dump_stack+0x19/0x1b
[<ffffffff8108ce8b>] warn_slowpath_common+0x6b/0xa0
[<ffffffff8108ced5>] warn_slowpath_null+0x15/0x20
[<ffffffff810e4745>] tick_nohz_idle_exit+0x195/0x1b0
[<ffffffff810da755>] cpu_startup_entry+0x205/0x250
[<ffffffff81661070>] cpu_bringup_and_idle+0x13/0x15
---[ end trace 915c8c486004dda1 ]---
b/c ts_inidle is set to zero. Thomas suggested that we just add a workaround
to call tick_nohz_idle_enter before returning from xen_play_dead() - and
that is what this patch does and fixes the issue.
We also add the stable part b/c git commit 4b0c0f294 is on the stable
tree.
CC: stable@vger.kernel.org
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
LCDC routing is configured automatically in the PFC driver, don't
configure it manually in board code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based BSC pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based INTC pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The core devices array is empty, passing it to platform_add_devices() is
a no-op. Remove it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The PFC GPIO API implementation moved to using port numbers. Replace all
GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
enum values are identical to the port number on this platform.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
LCDC routing is configured automatically in the PFC driver, don't
configure it manually in board code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based CEU0 pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based GETHER pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based INTC pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based USBHS pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based TSC2007 pinmux configuration by a pinctrl
mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The pen state is retrieved by reading the state of a pin used as an IRQ.
There's no need to reconfigure the pin as a pure GPIO, as the IRQ pin
state can be read.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based SMSC911x pinmux configuration by a pinctrl
mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based LCD pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based KEYSC pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based CEU pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based USBHS pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based TCA6416 pinmux configuration by a pinctrl
mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based ST1232 pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based SMSC911x pinmux configuration by a pinctrl
mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based SDHI0 IRQ pinmux configuration by a pinctrl
mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based LCD pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based FLCTL pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based CEU pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the GPIO-based ADXL34X pinmux configuration by a pinctrl
mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial PFC support for the r8a7790 SoC.
At this point only GPIO interface is supported, move to
newer interfaces planned as incremental changes.
Original authors is Koji Matsuoka-san, thanks for him
and his team for the heavy lifting. Adjusted by Magnus
to work together with updated code in drivers/pinctrl.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car series gpio_rcar driver can control GPIO IRQ today.
It needs base IRQ number for gpio_rcar_config :: .irq_base
This patch adds macro for GPIO IRQ.
This patch was tested on Bock-W board
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the CMT clockevent rating from 125 to 80.
This resolves a boot-failure regression for kzm9g-reference in v3.10-rc1
introduced by f7db706b13 ("ARM: 7674/1: smp:
Avoid dummy clockevent being preferred over real").
The patch noted above reduces the rating of dummy clockevent from 400 to 100.
This patch reduces the rating of CMT so that it is once again less than that
of the dummy clockevent.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM.
The PWM capability property is missing from the node definitions of
couple of timers.
Add ti,timer-pwm attribute for timer 5, 6, 8 and 11.
Signed-off-by: Suman Anna <s-anna@ti.com>
[benoit.cousson@linaro.org: Update changelog and subject to highlight
the fix]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Earlier commits ensured proper muxing of pins related to proper
TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure
sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM:
OMAP4: TWL: mux sys_drm_msecure as output for PMIC).
However these only fixed legacy boot and not DT boot. For DT boot,
the default mux values need to be set properly in DT.
Special thanks to Nishanth Menon for the review and catching some
major flaws in earlier versions.
Tested on OMAP4430/Panda and OMAP4460/Panda-ES.
Cc: Nishanth Menon <nm@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
[benoit.cousson@linaro.org: Slightly change the subject to align
board name with file name]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The gpmc driver is actually looking for "gpmc,num-cs" and
"gpmc,num-waitpins" properties in DT. The binding doc also states
this.
Correct the properties in the dts to provide the right values for the
gpmc driver.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Using static inline functions ensure proper type checking
which also remove compilation warning for no MMU
Compilation warning:
arch/microblaze/include/asm/cacheflush.h: warning: 'addr'
may be used uninitialized in this function [-Wmaybe-uninitialized]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The UART2 hwmod structure is pointing to the EDMA channels of UART1,
which doesn't look right. This patch fixes this by making the UART2
hwmod structure to a new structure that lists the EDMA channels to be
used by the UART2.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Pull m68k fix from Geert Uytterhoeven:
"A boot lock-up on Mac, also destined for stable"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k/mac: Fix unexpected interrupt with CONFIG_EARLY_PRINTK
Pull s390 fixes from Martin Schwidefsky:
"Recent bug fixes, one of them touches a common code file.
It adds two #ifndef/#endif pairs to asm-generic/io.h to be able to
override xlate_dev_kmem_ptr and xlate_dev_mem_ptr."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
s390/pgtable: Fix gmap notifier address
s390/dasd: fix handling of gone paths
s390/pgtable: Fix check for pgste/storage key handling
arch: s390: appldata: using strncpy() and strnlen() instead of sprintf()
s390/smp: lost IPIs on cpu hotplug
kernel: Fix s390 absolute memory access for /dev/mem
s390/dma: do not call debug_dma after free
arch/microblaze/include/asm/uaccess.h:101:3:
warning: cast removes address space of expression
arch/microblaze/include/asm/uaccess.h:107:2:
warning: cast removes address space of expression
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
apic->pending_events processing has a race that may cause INIT and
SIPI
processing to be reordered:
vpu0: vcpu1:
set INIT
test_and_clear_bit(KVM_APIC_INIT)
process INIT
set INIT
set SIPI
test_and_clear_bit(KVM_APIC_SIPI)
process SIPI
At the end INIT is left pending in pending_events. The following patch
fixes this by latching pending event before processing them.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
The x86-64 extended low-byte registers were fetched correctly from reg,
but not from mod/rm.
This fixes another bug in the boot of RHEL5.9 64-bit, but it is still
not enough.
Cc: <stable@vger.kernel.org> # 3.9
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
This is encountered when booting RHEL5.9 64-bit. There is another bug
after this one that is not a simple emulation failure, but this one lets
the boot proceed a bit.
Cc: <stable@vger.kernel.org> # 3.9
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
The KVM/ARM MMU code doesn't take care of invalidating TLBs before
freeing a {pte,pmd} table. This could cause problems if the page
is reallocated and then speculated into by another CPU.
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Some ARM KVM VCPU ioctls require the vCPU to be properly initialized
with the KVM_ARM_VCPU_INIT ioctl before being used with further
requests. KVM_RUN checks whether this initialization has been
done, but other ioctls do not.
Namely KVM_GET_REG_LIST will dereference an array with index -1
without initialization and thus leads to a kernel oops.
Fix this by adding checks before executing the ioctl handlers.
[ Removed superflous comment from static function - Christoffer ]
Changes from v1:
* moved check into a static function with a meaningful name
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
The Linux Way is to return -ENOIOCTLCMD to the vfs when an
unimplemented ioctl is requested. Do this in kvm_mips instead of a
random mixture of -ENOTSUPP and -EINVAL.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Sanjay Lal <sanjayl@kymasys.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism.
Now unused code and definitions are removed.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Sanjay Lal <sanjayl@kymasys.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Also we cannot set special zero register, so force it to zero.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Sanjay Lal <sanjayl@kymasys.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Sanjay Lal <sanjayl@kymasys.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
