This patch adds register definitions, clocks and IRQs to the platform devices.
Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch enables CPU frequency scaling for AT32AP devices. This will
enable the CPU to scale between the speed of the high speed bus and
the master clock and thus save some power.
The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to
enable changing the CPU clock divider in a sane way.
The driver does not check if the given rate is 0, thus resulting in a
div by 0. I think this check should be go into the clk_set_rate
framework, and not here.
Tested on AT32AP7000/ATSTK1000.
Hardware documentation can be found in the AT32AP7000 datasheet.
Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Split the SM platform device into separate platform devices for PM,
RTC, WDT and EIC. This is more correct according to the documentation
and allows us to simplify the code a little.
Also turn the EIC driver into a real platform driver.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
The current at32ap7000 platform devices aren't declared as supporting DMA,
so that layered drivers can't tell whether they need to manage DMA.
This patch makes all those platform devices report that they support DMA.
Most do, but in a few cases this is inappropriate.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This modifies and extends the existing lcdc platform code to support
the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use
the on-board Samsung LTV350QV LCD panel.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Bring the code that sets the initial PM clock masks in line with the
comment preceding it by only enabling clocks that have users != 0.
Fix SM clock definition and avr32_hpt_init() so that the SM and TC0
clocks keep ticking.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Due to limitation of the count-compare system timer (not able to
count when CPU is in sleep), the system timer had to be changed to
use a peripheral timer/counter.
The old COUNT-COMPARE code is still present in time.c as weak
functions. The new timer is added to the architecture directory.
This patch sets up TC0 as system timer The new timer has been tested
on AT32AP7000/ATSTK1000 at 100 Hz, 250 Hz, 300 Hz and 1000 Hz.
For more details about the timer/counter see the datasheet for
AT32AP700x available at
http://www.atmel.com/dyn/products/product_card.asp?part_id=3903
Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This adds register and clock definitions for the High-speed bus Matrix
(HMATRIX) as well as a function that can be used to configure special
EBI functionality like CompactFlash and NAND flash support.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Set up one spi_board_info array per controller and pass this to
at32_add_device_spi so that it can set up any GPIO pins for chip
selects based on this information.
Extracted from a patch by David Brownell and adapted slightly.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Initialize the parent field of each generic clock by looking at the
PM registers. This means that the genclock operations can always
assume that the parent field is non-null, so they don't have to
check. Also remove a few unnecessary BUG_ON()s.
Extracted from a patch by David Brownell.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Move stuff in spi.c into ATSTK1002 board code and update SPI
platform device definitions according to the new GPIO API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The PIOE device was left out before because it muxes SDRAM pins (and
is therefore a bit dangerous to mess with) and because no existing
drivers had any use for it.
It is needed for CompactFlash, however, and now that we have a way
to protect the SDRAM pins, it can be safely added.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Fixes to USART setup on the stk-1000 ... don't configure USART 2, since
its TXD/RXD are used for INT-A and INT-B buttons; and configure USART 0
(for IRDA, and with corrected IRQ) iff SW2 has a non-default setting.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add platform_device definition and pio init code for the second
ethernet controller in AT32AP7000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Rename portmux_set_func to at32_select_periph, add at32_select_gpio
and add flags parameter to specify the initial state of the pins.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Allow the board to remap actual USART peripheral devices to serial
devices by calling at32_map_usart(hw_id, serial_line). This ensures
that even though ATSTK1002 uses USART1 as the first serial port, it
will still have a ttyS0 device.
This also adds a board-specific early setup hook and moves the
at32_setup_serial_console() call there from the platform code.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
In order to initialize the serial console early, the atmel_serial
driver had to do a hack where it compared the physical address of the
port with an address known to be permanently mapped, and used it as a
virtual address. This got around the limitation that ioremap() isn't
always available when the console is being initalized.
This patch removes that hack and replaces it with a new "regs" field
in struct atmel_uart_data that the board-specific code can initialize
to a fixed virtual mapping for platform devices where this is possible.
It also initializes the DBGU's regs field with the address the driver
used to check against.
On AVR32, the "regs" field is initialized from the physical base
address when this it can be accessed through a permanently 1:1 mapped
segment, i.e. the P4 segment.
If regs is NULL, the console initialization is delayed until the "real"
driver is up and running and ioremap() can be used.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patchset adds the necessary drivers and infrastructure to access the
external flash on the ATSTK1000 board through the MTD subsystem. With this
stuff in place, it will be possible to use a jffs2 filesystem stored in the
external flash as a root filesystem. It might also be possible to update the
boot loader if you drop the write protection of partition 0.
As suggested by David Woodhouse, I reworked the patches to use the physmap
driver instead of introducing a separate mapping driver for the ATSTK1000.
I've also cleaned up the hsmc header by removing useless comments and
converting spaces to tabs (my headerfile generator needs some work.)
Unfortunately, I couldn't unlock the flash in fixup_use_atmel_lock because the
erase regions hadn't been set up yet, so I had to do it from cfi_amdstd_setup
instead.
This patch:
This adds a simple API for configuring the static memory controller along with
an implementation for the Atmel HSMC.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
