2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-19 02:34:01 +08:00
Commit Graph

16 Commits

Author SHA1 Message Date
Olof Johansson
0f600f40d7 Merge tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into fixes
ARM: tegra: fixes for 3.8

This branch contains a few miscellaneous fixes that have shown up in the
last few weeks.

By Sivaram Nair (2) and Hiroshi Doyu (1)
via Stephen Warren
* tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  amba: tegra-ahb: Fix warning w/o PM_SLEEP
  ARM: tegra: fix comment in dsib clk set_parent
  ARM: tegra: select correct parent clk for pll_p

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-12-17 10:04:27 -08:00
Sivaram Nair
6e25e1b178 ARM: tegra: fix comment in dsib clk set_parent
Since the clk framework has already taken necessary locks before calling
into the arch clk ops code, no further locks are needed while setting
the parent of dsib clk. This patch removes a comment that indicated
otherwise, and yet did not take any locks.

Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-26 13:44:04 -07:00
Joseph Lo
a6e293eef2 ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops
Add suspend, resume and rail_off_ready API into tegra_cpu_car_ops. These
functions were used for CPU powered-down state maintenance. One thing
needs to notice the rail_off_ready API only availalbe for cpu_g cluster
not cpu_lp cluster.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo
d534b5d4a5 ARM: tegra30: clocks: add AHB and APB clocks
Adding the AHB and APB bus clock for Tegra30.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:22 -07:00
Stephen Warren
2be39c079d ARM: tegra: move iomap.h to mach-tegra
Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.

Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../iomap.h" becaue of this change. uncompress.h will soon
be deleted in later multi-platform/single-zImage patches. debug-macro.S
will need to continue to include this header using an explicit relative
path, to avoid duplicating the physical->virtual address mapping that
iomap.h dictates.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:06 -07:00
Mark Zhang
786621308c ARM: tegra30: clk: Fix output_rate overflow
Change the type of variable from "unsigned long" to "u64".
This avoids the overflow while clock rate calculating.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-16 11:14:34 -06:00
Joseph Lo
dab403ef23 ARM: tegra: introduce tegra_cpu_car_ops structures
The tegra_cpu_car_ops provide the interface for CPU to control
it's clock gating and reset status. The other drivers should use
this for CPU control. And should not directly access CAR registers
to control CPU.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:41:05 -06:00
Prashant Gaikwad
fa67ccb61d ARM: tegra: Fix data type for io address
Warnings were generated because following commit changed data type for
address pointer

195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors

arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq':
arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
.../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-07 09:20:37 -06:00
Joseph Lo
b78c030ceb ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30
Currently the tegra20 and tegra30 share the same symbol for
tegra_clk_32k_ops. This will cause a compile error when building
a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and
modify tegra30_clk_32k_ops for tegra30.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06 11:47:20 -06:00
Prashant Gaikwad
92fe58f07f ARM: tegra: Port tegra to generic clock framework
This patch converts tegra clock code to generic clock framework in following way:
 - Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c)
 - Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk.
 - Initialize all clock data statically. (tegraXX_clocks_data.c)

Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions.
Removed init function. It's functionality is splitted into recalc_rate and is_enabled.

Static initialization is used since slab is not up in .init_early and clock
is needed to be initialized before clockevent/clocksource initialization.
Macros redefined for clk_tegra.

Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This
is to move quickly to generic common clock framework so that other dependent features will
not be blocked (such as DT binding).

Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20
and Tegra30.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06 11:47:20 -06:00
Prashant Gaikwad
88e790a445 ARM: tegra30: Separate out clk ops and clk data
Move clock initialization data to separate file. This is
required for migrating to generic clock framework if static
initialization is used.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06 11:47:19 -06:00
Thierry Reding
0944799156 ARM: tegra: Provide clock for only one PWM controller
A subsequent patch will add a generic PWM API driver for the Tegra PWFM
controller, supporting all four PWM devices with a single PWM chip. The
device will be named tegra-pwm and only one clock needs to be provided.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-07-02 15:01:34 -06:00
Laxman Dewangan
72d967eda2 ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
Rename the driver name of the clock entry of Tegra APBDMA to
tegra-apbdma from of tegra-dma.

This name is more aligned towards the movement of dmaengine based
new DMA driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-26 13:04:58 -06:00
Prashant Gaikwad
0b5168f92d ARM: tegra: Remove second instance of uart clk
In Tegra30 clock file two clk objects were created for same UART clock.
Remove the duplicates and add clock aliases instead.

Update the Tegra20 clock file to make the names consistent.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-25 12:18:52 -06:00
Stephen Warren
8703612b0a ARM: tegra: provide clock aliases for AHUB configlink
The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all
devices on the AHUB's configlink bus. The AHUB driver must be able to
call clk_get_sys() to retrieve the clock parameter for this function.
Add the necessary clock aliases to allow this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-04-25 15:22:01 -06:00
Peter De Schrijver
d9cc6f76b6 ARM: tegra: implement basic tegra30 clock framework
Add basic tegra30 clock framework. Not all clocks are supported yet. Mainly
clocks requiring voltage scaling are not yet implemented in this version.

Based on work by Alex Frid <afrid@nvidia.com> and
Scott Williams <scwilliams@nvidia.com>.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 09:16:15 -08:00